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configs, tests: Amend stdlib configs to use WalkCache hierarchy

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As X86 and RISCV are relying on a Table Walker cache, we
change their stdlib configs to use the newly defined

PrivateL1PrivateL2WalkCacheHierarchy

Change-Id: I63c3f70a9daa3b2c7a8306e51af8065bf1bea92b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
This commit is contained in:
Giacomo Travaglini
2024-03-14 15:15:46 +00:00
parent d32a438913
commit 058dd7e195
10 changed files with 30 additions and 30 deletions
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6
configs/example/gem5_library/checkpoints/simpoints-se-restore.py
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@@ -60,8 +60,8 @@ from m5.stats import (
)
from gem5.components.boards.simple_board import SimpleBoard
from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
PrivateL1PrivateL2CacheHierarchy,
from gem5.components.cachehierarchies.classic.private_l1_private_l2_walk_cache_hierarchy import (
PrivateL1PrivateL2WalkCacheHierarchy,
)
from gem5.components.memory import DualChannelDDR4_2400
from gem5.components.processors.cpu_types import CPUTypes
@@ -80,7 +80,7 @@ requires(isa_required=ISA.X86)
# The cache hierarchy can be different from the cache hierarchy used in taking
# the checkpoints
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
l1d_size="32kB",
l1i_size="32kB",
l2_size="256kB",

6
configs/example/gem5_library/looppoints/restore-looppoint-checkpoint.py
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@@ -48,8 +48,8 @@ from m5.stats import (
)
from gem5.components.boards.simple_board import SimpleBoard
from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
PrivateL1PrivateL2CacheHierarchy,
from gem5.components.cachehierarchies.classic.private_l1_private_l2_walk_cache_hierarchy import (
PrivateL1PrivateL2WalkCacheHierarchy,
)
from gem5.components.memory import DualChannelDDR4_2400
from gem5.components.processors.cpu_types import CPUTypes
@@ -90,7 +90,7 @@ args = parser.parse_args()
# The cache hierarchy can be different from the cache hierarchy used in taking
# the checkpoints
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
l1d_size="32kB",
l1i_size="32kB",
l2_size="256kB",

6
configs/example/gem5_library/riscv-fs.py
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@@ -40,8 +40,8 @@ Characteristics
"""
from gem5.components.boards.riscv_board import RiscvBoard
from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
PrivateL1PrivateL2CacheHierarchy,
from gem5.components.cachehierarchies.classic.private_l1_private_l2_walk_cache_hierarchy import (
PrivateL1PrivateL2WalkCacheHierarchy,
)
from gem5.components.memory import SingleChannelDDR3_1600
from gem5.components.processors.cpu_types import CPUTypes
@@ -57,7 +57,7 @@ requires(isa_required=ISA.RISCV)
# Setup the cache hierarchy.
# For classic, PrivateL1PrivateL2 and NoCache have been tested.
# For Ruby, MESI_Two_Level and MI_example have been tested.
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB"
)

6
configs/example/gem5_library/riscv-ubuntu-run.py
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@@ -57,12 +57,12 @@ from gem5.utils.requires import requires
requires(isa_required=ISA.RISCV)
# With RISCV, we use simple caches.
from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
PrivateL1PrivateL2CacheHierarchy,
from gem5.components.cachehierarchies.classic.private_l1_private_l2_walk_cache_hierarchy import (
PrivateL1PrivateL2WalkCacheHierarchy,
)
# Here we setup the parameters of the l1 and l2 caches.
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
l1d_size="16kB", l1i_size="16kB", l2_size="256kB"
)

6
configs/example/lupv/run_lupv.py
View File

@@ -49,8 +49,8 @@ from gem5.utils.requires import requires
# Run a check to ensure the right version of gem5 is being used.
requires(isa_required=ISA.RISCV)
from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
PrivateL1PrivateL2CacheHierarchy,
from gem5.components.cachehierarchies.classic.private_l1_private_l2_walk_cache_hierarchy import (
PrivateL1PrivateL2WalkCacheHierarchy,
)
parser = argparse.ArgumentParser(description="Runs Linux fs test with RISCV.")
@@ -72,7 +72,7 @@ parser.add_argument(
args = parser.parse_args()
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB"
)