Regression: Fix some bugs in simple-timing-mp-ruby.py.
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@@ -77,11 +77,13 @@ Ruby.create_system(options, system)
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assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
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for (i, cpu) in enumerate(system.cpu):
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# create the interrupt controller
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cpu.createInterruptController()
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#
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# Tie the cpu ports to the ruby cpu ports
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#
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cpu.icache_port = system.ruby._cpu_ruby_ports[i].port
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cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port
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cpu.connectAllPorts(system.ruby._cpu_ruby_ports[i])
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# -----------------------
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# run simulation
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