SPARC: Truncate syscall args and return values appropriately.

This commit is contained in:
Gabe Black
2008-12-16 23:06:37 -08:00
parent ab5eeb4b62
commit 02cd18f536
2 changed files with 21 additions and 4 deletions

View File

@@ -50,13 +50,23 @@ namespace SparcISA
tc->setIntReg(NumIntArchRegs + 2,
tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
//tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
tc->setIntReg(ReturnValueReg, return_value.value());
IntReg val = return_value.value();
if (bits(tc->readMiscRegNoEffect(
SparcISA::MISCREG_PSTATE), 3, 3)) {
val = bits(val, 31, 0);
}
tc->setIntReg(ReturnValueReg, val);
} else {
// got an error, set XCC.C
tc->setIntReg(NumIntArchRegs + 2,
tc->readIntReg(NumIntArchRegs + 2) | 0x11);
//tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
tc->setIntReg(ReturnValueReg, -return_value.value());
IntReg val = -return_value.value();
if (bits(tc->readMiscRegNoEffect(
SparcISA::MISCREG_PSTATE), 3, 3)) {
val = bits(val, 31, 0);
}
tc->setIntReg(ReturnValueReg, val);
}
}
};

View File

@@ -385,8 +385,15 @@ class SimpleThread : public ThreadState
TheISA::IntReg getSyscallArg(int i)
{
assert(i < TheISA::NumArgumentRegs);
return regs.readIntReg(TheISA::flattenIntIndex(getTC(),
TheISA::ArgumentReg[i]));
TheISA::IntReg val = regs.readIntReg(
TheISA::flattenIntIndex(getTC(), TheISA::ArgumentReg[i]));
#if THE_ISA == SPARC_ISA
if (bits(this->readMiscRegNoEffect(
SparcISA::MISCREG_PSTATE), 3, 3)) {
val = bits(val, 31, 0);
}
#endif
return val;
}
// used to shift args for indirect syscall