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dev-arm: SMMUv3, enable interrupt interface

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Users can set "irq_interface_enable" to allow software to program
SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+
in a reasonable time. Notice the model does not implement architectural
interrupt sources, so no assertions will happen.

Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38555
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Adrian Herrera
2020-12-10 18:07:21 +00:00
parent 131ae4a2eb
commit 00dd0d7b3d
3 changed files with 17 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/dev/arm/SMMUv3.py
View File

@@ -91,6 +91,11 @@ class SMMUv3(ClockedObject):
reg_map = Param.AddrRange('Address range for control registers')
system = Param.System(Parent.any, "System this device is part of")
irq_interface_enable = Param.Bool(False,
"This flag enables software to program SMMU_IRQ_CTRL and "
"SMMU_IRQ_CTRLACK as if the model implemented architectural "
"interrupt sources")
device_interfaces = VectorParam.SMMUv3DeviceInterface([],
"Responder interfaces")

10
src/dev/arm/smmu_v3.cc
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013, 2018-2019 ARM Limited
* Copyright (c) 2013, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -58,6 +58,7 @@ SMMUv3::SMMUv3(const SMMUv3Params &params) :
requestPort(name() + ".request", *this),
tableWalkPort(name() + ".walker", *this),
controlPort(name() + ".control", *this, params.reg_map),
irqInterfaceEnable(params.irq_interface_enable),
tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy, this),
configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy, this),
ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy, this),
@@ -627,6 +628,13 @@ SMMUv3::writeControl(PacketPtr pkt)
assert(pkt->getSize() == sizeof(uint32_t));
regs.cr0 = regs.cr0ack = pkt->getLE<uint32_t>();
break;
case offsetof(SMMURegs, irq_ctrl):
assert(pkt->getSize() == sizeof(uint32_t));
if (irqInterfaceEnable) {
warn("SMMUv3::%s No support for interrupt sources", __func__);
regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE<uint32_t>();
}
break;
case offsetof(SMMURegs, cr1):
case offsetof(SMMURegs, cr2):

4
src/dev/arm/smmu_v3.hh
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013, 2018-2019 ARM Limited
* Copyright (c) 2013, 2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -94,6 +94,8 @@ class SMMUv3 : public ClockedObject
SMMUTableWalkPort tableWalkPort;
SMMUControlPort controlPort;
const bool irqInterfaceEnable;
ARMArchTLB tlb;
ConfigCache configCache;
IPACache ipaCache;