165 lines
7.9 KiB
C++
165 lines
7.9 KiB
C++
/*
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* Copyright (c) 2019, Technische Universität Kaiserslautern
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors:
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* Lukas Steiner
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*/
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#include "MemSpecLPDDR4.h"
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using namespace tlm;
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using json = nlohmann::json;
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MemSpecLPDDR4::MemSpecLPDDR4(json &memspec)
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: MemSpec(memspec, MemoryType::LPDDR4,
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parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"),
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parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"),
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1,
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks")
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* parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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1),
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tREFI (tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")),
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tREFIpb (tCK * parseUint(memspec["memtimingspec"]["REFIPB"], "REFIPB")),
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tRFCab (tCK * parseUint(memspec["memtimingspec"]["RFCAB"], "RFCAB")),
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tRFCpb (tCK * parseUint(memspec["memtimingspec"]["RFCPB"], "RFCPB")),
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tRPab (tCK * parseUint(memspec["memtimingspec"]["RPAB"], "RPAB")),
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tRPpb (tCK * parseUint(memspec["memtimingspec"]["RPPB"], "RPPB")),
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tRCab (tCK * parseUint(memspec["memtimingspec"]["RCAB"], "RCAB")),
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tRCpb (tCK * parseUint(memspec["memtimingspec"]["RCPB"], "RCPB")),
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tPPD (tCK * parseUint(memspec["memtimingspec"]["PPD"], "PPD")),
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tRAS (tCK * parseUint(memspec["memtimingspec"]["RAS"], "RAS")),
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tRCD (tCK * parseUint(memspec["memtimingspec"]["RCD"], "RCD")),
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tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")),
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tRRD (tCK * parseUint(memspec["memtimingspec"]["RRD"], "RRD")),
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tCCD (tCK * parseUint(memspec["memtimingspec"]["CCD"], "CCD")),
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tRL (tCK * parseUint(memspec["memtimingspec"]["RL"], "RL")),
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tRPST (tCK * parseUint(memspec["memtimingspec"]["RPST"], "RPST")),
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tDQSCK (tCK * parseUint(memspec["memtimingspec"]["DQSCK"], "DQSCK")),
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tRTP (tCK * parseUint(memspec["memtimingspec"]["RTP"], "RTP")),
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tWL (tCK * parseUint(memspec["memtimingspec"]["WL"], "WL")),
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tDQSS (tCK * parseUint(memspec["memtimingspec"]["DQSS"], "DQSS")),
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tDQS2DQ (tCK * parseUint(memspec["memtimingspec"]["DQS2DQ"], "DQS2DQ")),
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tWR (tCK * parseUint(memspec["memtimingspec"]["WR"], "WR")),
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tWPRE (tCK * parseUint(memspec["memtimingspec"]["WPRE"], "WPRE")),
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tWTR (tCK * parseUint(memspec["memtimingspec"]["WTR"], "WTR")),
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tXP (tCK * parseUint(memspec["memtimingspec"]["XP"], "XP")),
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tSR (tCK * parseUint(memspec["memtimingspec"]["SR"], "SR")),
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tXSR (tCK * parseUint(memspec["memtimingspec"]["XSR"], "XSR")),
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tESCKE (tCK * parseUint(memspec["memtimingspec"]["ESCKE"], "ESCKE")),
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tCKE (tCK * parseUint(memspec["memtimingspec"]["CKE"], "CKE")),
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tCMDCKE (tCK * parseUint(memspec["memtimingspec"]["CMDCKE"], "CMDCKE")),
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tRTRS (tCK * parseUint(memspec["memtimingspec"]["RTRS"], "RTRS"))
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{
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commandLengthInCycles[Command::ACT] = 4;
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commandLengthInCycles[Command::PRE] = 2;
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commandLengthInCycles[Command::PREA] = 2;
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commandLengthInCycles[Command::RD] = 4;
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commandLengthInCycles[Command::RDA] = 4;
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commandLengthInCycles[Command::WR] = 4;
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commandLengthInCycles[Command::WRA] = 4;
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commandLengthInCycles[Command::REFA] = 2;
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commandLengthInCycles[Command::REFB] = 2;
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commandLengthInCycles[Command::SREFEN] = 2;
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commandLengthInCycles[Command::SREFEX] = 2;
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uint64_t deviceSizeBits = static_cast<uint64_t>(banksPerRank) * numberOfRows * numberOfColumns * bitWidth;
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uint64_t deviceSizeBytes = deviceSizeBits / 8;
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memorySizeBytes = deviceSizeBytes * numberOfRanks * numberOfChannels;
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std::cout << headline << std::endl;
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std::cout << "Memory Configuration:" << std::endl << std::endl;
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std::cout << " Memory type: " << "LPDDR4" << std::endl;
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std::cout << " Memory size in bytes: " << memorySizeBytes << std::endl;
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std::cout << " Channels: " << numberOfChannels << std::endl;
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std::cout << " Ranks per channel: " << numberOfRanks << std::endl;
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std::cout << " Banks per rank: " << banksPerRank << std::endl;
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std::cout << " Rows per bank: " << numberOfRows << std::endl;
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std::cout << " Columns per row: " << numberOfColumns << std::endl;
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std::cout << " Device width in bits: " << bitWidth << std::endl;
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std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
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std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
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std::cout << std::endl;
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}
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sc_time MemSpecLPDDR4::getRefreshIntervalAB() const
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{
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return tREFI;
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}
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sc_time MemSpecLPDDR4::getRefreshIntervalPB() const
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{
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return tREFIpb;
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}
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sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_payload &) const
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{
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if (command == Command::PRE)
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return tRPpb + tCK;
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else if (command == Command::PREA)
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return tRPab + tCK;
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else if (command == Command::ACT)
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return tRCD + 3 * tCK;
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else if (command == Command::RD)
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return tRL + tDQSCK + burstDuration + 3 * tCK;
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else if (command == Command::RDA)
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return burstDuration + tRTP - 5 * tCK + tRPpb;
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else if (command == Command::WR)
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return tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK;
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else if (command == Command::WRA)
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return tWL + 4 * tCK + burstDuration + tWR + tRPpb;
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else if (command == Command::REFA)
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return tRFCab + tCK;
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else if (command == Command::REFB)
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return tRFCpb + tCK;
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else
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{
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SC_REPORT_FATAL("getExecutionTime",
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"command not known or command doesn't have a fixed execution time");
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return SC_ZERO_TIME;
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}
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}
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TimeInterval MemSpecLPDDR4::getIntervalOnDataStrobe(Command command, const tlm_generic_payload &) const
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{
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if (command == Command::RD || command == Command::RDA)
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return {tRL + tDQSCK + 3 * tCK, tRL + tDQSCK + burstDuration + 3 * tCK};
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else if (command == Command::WR || command == Command::WRA)
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return {tWL + tDQSS + tDQS2DQ + 3 * tCK, tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK};
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else
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{
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SC_REPORT_FATAL("MemSpecLPDDR4", "Method was called with invalid argument");
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return {};
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}
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}
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