derek/DRAMSys
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
1,868 Commits 1 Branch 0 Tags
f626badc54e0f151cd8105aead752d88517865bc
Commit Graph

1868 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Derek Christ
f626badc54 Make ranks collapsible in TraceAnalyzer 
All individual ranks in the TraceAnalyzer are now collapsible, making it
easier to display simulation results with many ranks.
 2021-06-14 10:14:16 +02:00
Derek Christ
b2345be678 Add a scroll bar for TraceAnalyzer 
A scroll bar was added to the TraceAnalyzer to prepare for the upcoming
changes of collapsing/folding ranks to increase readability when many
ranks are displayed. The scroll bar is hidden up to a number of 25 rows
in the TracePlot.
 2021-06-14 09:42:20 +02:00
Lukas Steiner
49838ea7d8 Merge branch 'STT-MRAM' into 'develop' 
Add STT-MRAM standard.

See merge request ems/astdm/dram.sys!283
 2021-05-19 08:44:46 +00:00
Lukas Steiner
dbe76bd906 Remove comments from memspec file. 2021-05-19 09:41:45 +02:00
Lukas Steiner
d4609ff669 Rename copyright notice. 2021-05-19 09:34:30 +02:00
Lukas Steiner
4d8d5caf72 Add STT-MRAM copyright notice. 2021-05-19 09:32:32 +02:00
Lukas Steiner
cb4455710d Add config files for STT-MRAM. 2021-05-17 15:51:55 +02:00
Lukas Steiner
77b79aac13 Initial version of STT-MRAM. 2021-05-17 14:03:34 +02:00
Lukas Steiner
08f0331a06 Merge branch 'develop' into 'STT-MRAM' 
Merge latest updates.

See merge request ems/astdm/dram.sys!282
 2021-05-17 11:48:00 +00:00
Lukas Steiner
99694d37cd Merge branch 'BL32_OTF' into 'develop' 
Add OTF burst length selection for DDR5.

See merge request ems/astdm/dram.sys!281
 2021-05-17 11:45:02 +00:00
Lukas Steiner
d84a065087 Small improvements in DDR5 checker. 2021-05-12 16:10:04 +02:00
Lukas Steiner
7e05226f8c Add blocked interval for dummy CAS commands to DDR5 checker. 2021-05-11 17:33:46 +02:00
Lukas Steiner
ad6eb6c7a2 Adapt bandwidth calculation to OTF burst length selection. 2021-05-10 15:53:56 +02:00
Lukas Steiner
fabc686e8c Initial version of BL32 OTF. 2021-05-10 14:32:05 +02:00
Lukas Steiner
e38d0aae1f Introduce burst length parameter. 2021-05-05 17:10:08 +02:00
Lukas Steiner
add4cf1a66 Merge branch 'clock_sync' into 'develop' 
Fix clock sync in STL player.

See merge request ems/astdm/dram.sys!278
 2021-05-05 14:04:26 +00:00
Lukas Steiner
9b7e2611ef Fix clock sync in STL player. 2021-05-05 15:55:06 +02:00
Lukas Steiner
3c476f4925 Simpler clock sync calculation in arbiter. 2021-05-05 15:43:52 +02:00
Lukas Steiner
24ef997180 Link thread library in simulator. 2021-05-04 10:56:45 +02:00
Lukas Steiner
1b0e6b1d33 Bugfix: Earliest time for ready command has to be sc_time_stamp(). 2021-04-29 10:58:24 +02:00
Lukas Steiner
b82a446c60 Ignore vscode config folder. 2021-04-28 14:20:46 +02:00
Lukas Steiner
4f7ab8db09 Merge branch 'cmdmux_rascas' into 'develop' 
Add special command muxes for standards with separate RAS and CAS command buses (HBM).

See merge request ems/astdm/dram.sys!275
 2021-04-23 08:56:11 +00:00
Lukas Steiner
399a073912 Code formatting. 2021-04-23 10:51:35 +02:00
Lukas Steiner
fc44d319bb New strict cmd mux working. 2021-04-22 11:27:22 +02:00
Lukas Steiner
ae85f6cd83 New oldest cmd mux working. 2021-04-21 09:38:22 +02:00
Lukas Steiner
f4bf06219b Do not use scientific notation for metric results. 2021-04-20 15:27:31 +02:00
Lukas Steiner
0c51a4e1f8 First version of RasCas command mux, not working. 2021-03-24 09:10:12 +01:00
Lukas Steiner
81bbe066c8 Markdown formatting. 2021-03-23 09:34:49 +01:00
Lukas Steiner
ba3c09b2ad Updated readme, code formatting. 2021-03-23 09:31:06 +01:00
Lukas Steiner
4650951026 Update gem5 readme. 2021-02-09 15:27:25 +01:00
Lukas Steiner
28b2fee54c Fix wrong standard display. 2021-02-09 15:08:27 +01:00
Lukas Steiner
2143f7cbff Set payload extensions in arbiter at END_REQ. 2021-02-02 16:40:44 +01:00
Lukas Steiner
0e01cc5ccd Fix starvation of new arbiters. 2021-02-02 15:34:21 +01:00
Lukas Steiner
fe144934b2 Use 1 as first payload ID. 2021-02-02 12:12:48 +01:00
Lukas Steiner
465bbdbe7e Add new configuration parameters for arbiter. 2021-02-02 12:08:31 +01:00
Lukas Steiner
28e7874a0e Fix bug in controller with ROB. 2021-02-02 12:07:52 +01:00
Lukas Steiner
a06bd9fc5b Minor changes in arbiter. 2021-01-27 13:57:01 +01:00
Lukas Steiner
d86dc97a28 Bugfix in fifo and reorder arbiter. 2021-01-27 13:12:36 +01:00
Lukas Steiner
a6ce8f63cb Improve command mux for multicycle commands, RAS/CAS bus missing. 2021-01-22 15:54:37 +01:00
Lukas Steiner
d198a78e5a Add new protocol to trace player. 2021-01-21 15:25:22 +01:00
Lukas Steiner
0f6611bacd Use sc_max_time() instead of SC_ZERO_TIME in all checkers. 2021-01-20 17:19:20 +01:00
Lukas Steiner
6c2b99a70a Fix fifo and reorder arbiter. 2021-01-20 15:29:55 +01:00
Lukas Steiner
0ab6562524 Add FW and BW think delay and PHY delay. 2021-01-20 14:20:44 +01:00
Lukas Steiner
3187c59183 Stagger refresh on different ranks. 2021-01-20 11:30:37 +01:00
Lukas Steiner
c50b089f76 Renaming of refresh policies. 2021-01-20 09:28:06 +01:00
Lukas Steiner
ca026981e1 Remove think delay from scheduler. 2021-01-20 08:50:15 +01:00
Lukas Steiner
020a01fd78 Only allow pointer to const for memspec. 2021-01-19 13:53:28 +01:00
Lukas Steiner
aff5802a7c Increase selectable area of a transaction in Trace Analyzer. 2021-01-19 13:49:02 +01:00
Lukas Steiner
679d70fa65 Increase selectable area of phases with zero span. 2021-01-15 11:13:11 +01:00
Lukas Steiner
abe8ef38b8 Implement first version of arbitration delay and think delay. 2021-01-14 16:48:21 +01:00