d27a29ca80
Refactor configuration library
...
The configuration library has been refactored to make use of nlohmann
macros to reduce boilerplate code.
The nlohmann parser callback is used to decide whether to include
configuration json objects directly, or if they need to be loaded
from a sperate file.
2023-04-13 11:18:39 +02:00
Lukas Steiner
5f1c74790b
Remove duplicate checks in DDR5 checker.
2023-04-12 13:45:44 +00:00
507c1d32d6
Update tCCD_L_WR, tCCD_L_WR2 and tCCD_M_WR timings in DDR5 timing checker
2023-04-12 09:40:18 +02:00
60b2bcbffa
Fix DDR5 write-to-write delay in TimingChecker
2023-04-11 14:08:32 +02:00
49954df6ee
Add tCCD_M DDR5 timings, MemSpecs still incomplete
2023-04-06 10:38:48 +02:00
Lukas Steiner
b086fa985d
Change names of LPDDR5 timings from tRCDRD/tRCDWR to tRCD_L/tRCD_S.
2023-03-30 15:06:17 +02:00
5d7171e537
Add LPDDR5X configurations and separate tRCD into tRCDRD and tRCDWR
2023-03-29 16:49:15 +02:00
Lukas Steiner
b29c67481d
Merge branch 'fix/plots' into 'develop'
...
Update plots python script to new database layout
See merge request ems/astdm/modeling.dram/dram.sys.5!11
2023-03-24 13:24:49 +00:00
6cb2128612
Update plots python script to new database layout
2023-03-24 09:18:06 +01:00
Lukas Steiner
bb99b9e883
Add fix for LP5 rank2rank timings.
2023-03-20 16:51:36 +01:00
b3277b2e52
Revert the design choice of making the PythonCaller a static singleton
2023-03-07 11:39:16 +01:00
Lukas Steiner
e848d776cc
Fix Trace Analyzer cmake.
2023-02-22 17:11:17 +01:00
Lukas Steiner
fe08c833c8
Make Trace Analyzer run again.
2023-02-22 15:18:58 +01:00
Lukas Steiner
1bd6d61d23
Adapt more paths.
2023-02-22 15:18:17 +01:00
Thomas Psota
f434026ccd
Added extension mechanism and ported DDR5, LPDDR5, HBM3, TraceAnalyzer
2023-02-09 14:22:34 +01:00
