Code cleanup.
This commit is contained in:
@@ -55,17 +55,17 @@ void BankMachine::updateState(Command command)
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switch (command)
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{
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case Command::ACT:
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currentState = BmState::Activated;
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currentRow = DramExtension::getRow(currentPayload);
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state = State::Activated;
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openRow = DramExtension::getRow(currentPayload);
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break;
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case Command::PRE: case Command::PREA:
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currentState = BmState::Precharged;
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state = State::Precharged;
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break;
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case Command::RD: case Command::WR:
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currentPayload = nullptr;
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break;
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case Command::RDA: case Command::WRA:
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currentState = BmState::Precharged;
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state = State::Precharged;
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currentPayload = nullptr;
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break;
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case Command::PDEA: case Command::PDEP: case Command::SREFEN:
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@@ -105,12 +105,12 @@ Bank BankMachine::getBank()
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Row BankMachine::getOpenRow()
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{
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return currentRow;
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return openRow;
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}
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BmState BankMachine::getState()
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BankMachine::State BankMachine::getState()
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{
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return currentState;
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return state;
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}
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bool BankMachine::isIdle()
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@@ -133,14 +133,14 @@ sc_time BankMachineOpen::start()
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if (currentPayload == nullptr)
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return timeToSchedule;
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if (currentState == BmState::Precharged && !blocked) // row miss
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if (state == State::Precharged && !blocked) // row miss
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{
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nextCommand = Command::ACT;
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timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank);
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}
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else if (currentState == BmState::Activated)
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else if (state == State::Activated)
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{
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if (DramExtension::getRow(currentPayload) == currentRow) // row hit
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if (DramExtension::getRow(currentPayload) == openRow) // row hit
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{
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if (currentPayload->get_command() == TLM_READ_COMMAND)
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nextCommand = Command::RD;
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@@ -175,12 +175,12 @@ sc_time BankMachineClosed::start()
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if (currentPayload == nullptr)
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return timeToSchedule;
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if (currentState == BmState::Precharged && !blocked) // row miss
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if (state == State::Precharged && !blocked) // row miss
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{
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nextCommand = Command::ACT;
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timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank);
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}
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else if (currentState == BmState::Activated)
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else if (state == State::Activated)
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{
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if (currentPayload->get_command() == TLM_READ_COMMAND)
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nextCommand = Command::RDA;
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@@ -209,16 +209,16 @@ sc_time BankMachineOpenAdaptive::start()
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if (currentPayload == nullptr)
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return timeToSchedule;
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if (currentState == BmState::Precharged && !blocked) // row miss
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if (state == State::Precharged && !blocked) // row miss
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{
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nextCommand = Command::ACT;
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timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank);
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}
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else if (currentState == BmState::Activated)
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else if (state == State::Activated)
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{
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if (DramExtension::getRow(currentPayload) == currentRow) // row hit
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if (DramExtension::getRow(currentPayload) == openRow) // row hit
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{
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if (scheduler->hasFurtherRequest(bank) && !scheduler->hasFurtherRowHit(bank, currentRow))
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if (scheduler->hasFurtherRequest(bank) && !scheduler->hasFurtherRowHit(bank, openRow))
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{
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if (currentPayload->get_command() == TLM_READ_COMMAND)
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nextCommand = Command::RDA;
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@@ -262,16 +262,16 @@ sc_time BankMachineClosedAdaptive::start()
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if (currentPayload == nullptr)
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return timeToSchedule;
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if (currentState == BmState::Precharged && !blocked) // row miss
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if (state == State::Precharged && !blocked) // row miss
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{
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nextCommand = Command::ACT;
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timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank);
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}
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else if (currentState == BmState::Activated)
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else if (state == State::Activated)
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{
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if (DramExtension::getRow(currentPayload) == currentRow) // row hit
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if (DramExtension::getRow(currentPayload) == openRow) // row hit
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{
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if (scheduler->hasFurtherRowHit(bank, currentRow))
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if (scheduler->hasFurtherRowHit(bank, openRow))
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{
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if (currentPayload->get_command() == TLM_READ_COMMAND)
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nextCommand = Command::RD;
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@@ -43,12 +43,6 @@
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#include "scheduler/SchedulerIF.h"
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#include "checker/CheckerIF.h"
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enum class BmState
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{
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Precharged,
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Activated
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};
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class BankMachine
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{
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public:
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@@ -58,11 +52,13 @@ public:
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void updateState(Command);
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void block();
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enum class State {Precharged, Activated};
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Rank getRank();
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BankGroup getBankGroup();
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Bank getBank();
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Row getOpenRow();
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BmState getState();
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State getState();
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bool isIdle();
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protected:
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@@ -71,8 +67,8 @@ protected:
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SchedulerIF *scheduler;
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CheckerIF *checker;
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Command nextCommand = Command::NOP;
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BmState currentState = BmState::Precharged;
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Row currentRow;
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State state = State::Precharged;
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Row openRow;
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sc_time timeToSchedule = sc_max_time();
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Rank rank = Rank(0);
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BankGroup bankgroup = BankGroup(0);
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@@ -47,7 +47,7 @@ void PowerDownManagerStaggered::triggerEntry()
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{
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controllerIdle = true;
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if (state == PdmState::Idle)
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if (state == State::Idle)
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entryTriggered = true;
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}
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@@ -57,7 +57,7 @@ void PowerDownManagerStaggered::triggerExit()
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enterSelfRefresh = false;
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entryTriggered = false;
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if (state != PdmState::Idle)
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if (state != State::Idle)
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exitTriggered = true;
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}
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@@ -65,7 +65,7 @@ void PowerDownManagerStaggered::triggerInterruption()
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{
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entryTriggered = false;
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if (state != PdmState::Idle)
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if (state != State::Idle)
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exitTriggered = true;
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}
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@@ -81,13 +81,13 @@ sc_time PowerDownManagerStaggered::start()
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if (exitTriggered)
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{
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if (state == PdmState::ActivePdn)
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if (state == State::ActivePdn)
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nextCommand = Command::PDXA;
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else if (state == PdmState::PrechargePdn)
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else if (state == State::PrechargePdn)
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nextCommand = Command::PDXP;
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else if (state == PdmState::SelfRefresh)
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else if (state == State::SelfRefresh)
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nextCommand = Command::SREFEX;
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else if (state == PdmState::ExtraRefresh)
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else if (state == State::ExtraRefresh)
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nextCommand = Command::REFA;
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timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, BankGroup(0), Bank(0));
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@@ -124,35 +124,35 @@ void PowerDownManagerStaggered::updateState(Command command)
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activatedBanks = 0;
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break;
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case Command::PDEA:
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state = PdmState::ActivePdn;
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state = State::ActivePdn;
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entryTriggered = false;
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break;
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case Command::PDEP:
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state = PdmState::PrechargePdn;
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state = State::PrechargePdn;
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entryTriggered = false;
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break;
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case Command::SREFEN:
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state = PdmState::SelfRefresh;
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state = State::SelfRefresh;
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entryTriggered = false;
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enterSelfRefresh = false;
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break;
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case Command::PDXA:
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state = PdmState::Idle;
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state = State::Idle;
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exitTriggered = false;
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break;
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case Command::PDXP:
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state = PdmState::Idle;
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state = State::Idle;
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exitTriggered = false;
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if (controllerIdle)
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enterSelfRefresh = true;
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break;
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case Command::SREFEX:
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state = PdmState::ExtraRefresh;
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state = State::ExtraRefresh;
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break;
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case Command::REFA:
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if (state == PdmState::ExtraRefresh)
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if (state == State::ExtraRefresh)
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{
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state = PdmState::Idle;
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state = State::Idle;
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exitTriggered = false;
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}
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else if (controllerIdle)
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@@ -53,7 +53,7 @@ public:
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virtual sc_time start() override;
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private:
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enum class PdmState {Idle, ActivePdn, PrechargePdn, SelfRefresh, ExtraRefresh} state = PdmState::Idle;
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enum class State {Idle, ActivePdn, PrechargePdn, SelfRefresh, ExtraRefresh} state = State::Idle;
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tlm::tlm_generic_payload powerDownPayload;
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Rank rank;
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CheckerIF *checker;
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@@ -80,10 +80,10 @@ sc_time RefreshManagerBankwise::start()
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if (sc_time_stamp() >= timeForNextTrigger + memSpec->getRefreshIntervalPB())
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{
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timeForNextTrigger += memSpec->getRefreshIntervalPB();
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state = RmState::Regular;
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state = State::Regular;
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}
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if (state == RmState::Regular)
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if (state == State::Regular)
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{
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bool forcedRefresh = (flexibilityCounter == maxPostponed);
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bool allBanksBusy = true;
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@@ -113,7 +113,7 @@ sc_time RefreshManagerBankwise::start()
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}
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else
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{
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if (currentBankMachine->getState() == BmState::Activated)
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if (currentBankMachine->getState() == BankMachine::State::Activated)
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nextCommand = Command::PRE;
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else
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{
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@@ -148,13 +148,13 @@ sc_time RefreshManagerBankwise::start()
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if (allBanksBusy)
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{
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state = RmState::Regular;
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state = State::Regular;
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timeForNextTrigger += memSpec->getRefreshIntervalPB();
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return timeForNextTrigger;
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}
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else
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{
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if (currentBankMachine->getState() == BmState::Activated)
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if (currentBankMachine->getState() == BankMachine::State::Activated)
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nextCommand = Command::PRE;
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else
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nextCommand = Command::REFB;
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@@ -178,20 +178,20 @@ void RefreshManagerBankwise::updateState(Command command)
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if (remainingBankMachines.empty())
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remainingBankMachines = allBankMachines;
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if (state == RmState::Pulledin)
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if (state == State::Pulledin)
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flexibilityCounter--;
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else
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state = RmState::Pulledin;
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state = State::Pulledin;
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if (flexibilityCounter == maxPulledin)
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{
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state = RmState::Regular;
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state = State::Regular;
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timeForNextTrigger += memSpec->getRefreshIntervalPB();
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}
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break;
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case Command::REFA:
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// Refresh command after SREFEX
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state = RmState::Regular; // TODO: check if this assignment is necessary
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state = State::Regular; // TODO: check if this assignment is necessary
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timeForNextTrigger = sc_time_stamp() + memSpec->getRefreshIntervalPB();
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sleeping = false;
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break;
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@@ -53,7 +53,7 @@ public:
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virtual void updateState(Command) override;
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private:
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enum class RmState {Regular, Pulledin} state = RmState::Regular;
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enum class State {Regular, Pulledin} state = State::Regular;
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const MemSpec *memSpec;
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std::vector<BankMachine *> &bankMachinesOnRank;
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PowerDownManagerIF *powerDownManager;
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@@ -71,10 +71,10 @@ sc_time RefreshManagerRankwise::start()
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if (sc_time_stamp() >= timeForNextTrigger + memSpec->getRefreshIntervalAB())
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{
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timeForNextTrigger += memSpec->getRefreshIntervalAB();
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state = RmState::Regular;
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state = State::Regular;
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}
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if (state == RmState::Regular)
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if (state == State::Regular)
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{
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if (flexibilityCounter == maxPostponed) // forced refresh
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{
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@@ -122,7 +122,7 @@ sc_time RefreshManagerRankwise::start()
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if (controllerBusy)
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{
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state = RmState::Regular;
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state = State::Regular;
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timeForNextTrigger += memSpec->getRefreshIntervalAB();
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return timeForNextTrigger;
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}
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@@ -155,20 +155,20 @@ void RefreshManagerRankwise::updateState(Command command)
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if (sleeping)
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{
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// Refresh command after SREFEX
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state = RmState::Regular; // TODO: check if this assignment is necessary
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state = State::Regular; // TODO: check if this assignment is necessary
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timeForNextTrigger = sc_time_stamp() + memSpec->getRefreshIntervalAB();
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sleeping = false;
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}
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else
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{
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if (state == RmState::Pulledin)
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if (state == State::Pulledin)
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flexibilityCounter--;
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else
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state = RmState::Pulledin;
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state = State::Pulledin;
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if (flexibilityCounter == maxPulledin)
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{
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state = RmState::Regular;
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state = State::Regular;
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timeForNextTrigger += memSpec->getRefreshIntervalAB();
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}
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}
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@@ -51,7 +51,7 @@ public:
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virtual void updateState(Command) override;
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private:
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enum class RmState {Regular, Pulledin} state = RmState::Regular;
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enum class State {Regular, Pulledin} state = State::Regular;
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const MemSpec *memSpec;
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std::vector<BankMachine *> &bankMachinesOnRank;
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PowerDownManagerIF *powerDownManager;
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@@ -80,7 +80,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine) c
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unsigned bankID = bankMachine->getBank().ID();
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if (!buffer[bankID].empty())
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{
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if (bankMachine->getState() == BmState::Activated)
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if (bankMachine->getState() == BankMachine::State::Activated)
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{
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// Search for row hit
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Row openRow = bankMachine->getOpenRow();
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@@ -81,7 +81,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine
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unsigned bankID = bankMachine->getBank().ID();
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if (!buffer[bankID].empty())
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{
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if (bankMachine->getState() == BmState::Activated)
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if (bankMachine->getState() == BankMachine::State::Activated)
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{
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// Filter all row hits
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Row openRow = bankMachine->getOpenRow();
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@@ -40,7 +40,6 @@
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#include "../../common/dramExtensions.h"
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#include "../../common/DebugManager.h"
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enum class BmState;
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class BankMachine;
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class SchedulerIF
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@@ -58,7 +58,7 @@ public:
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Arbiter(sc_module_name, std::string);
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SC_HAS_PROCESS(Arbiter);
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virtual ~Arbiter();
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virtual ~Arbiter() override;
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private:
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virtual void end_of_elaboration() override;
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Reference in New Issue
Block a user