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Bankwise Refresh Manager and some minor refactoring fun

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This commit is contained in:
Janik Schlemminger
2014-03-21 16:22:49 +01:00
parent cd556eb572
commit f7fa821e12
22 changed files with 231 additions and 376 deletions
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10
dram/.cproject
View File

@@ -5,8 +5,6 @@
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.config.gnu.exe.debug.513647443" moduleId="org.eclipse.cdt.core.settings" name="build-simulation">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
@@ -16,13 +14,9 @@
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug,org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.gnu.exe.debug.513647443" name="build-simulation" parent="cdt.managedbuild.config.gnu.exe.debug">
<folderInfo id="cdt.managedbuild.config.gnu.exe.debug.513647443." name="/" resourcePath="">
<toolChain id="cdt.managedbuild.toolchain.gnu.exe.debug.784929216" name="Linux GCC" superClass="cdt.managedbuild.toolchain.gnu.exe.debug">
<toolChain id="cdt.managedbuild.toolchain.gnu.exe.debug.784929216" name="Linux GCC" nonInternalBuilderId="cdt.managedbuild.target.gnu.builder.exe.debug" superClass="cdt.managedbuild.toolchain.gnu.exe.debug">
<targetPlatform id="cdt.managedbuild.target.gnu.platform.exe.debug.2061818651" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.exe.debug"/>
<builder buildPath="${workspace_loc:/dram}/build-simulation" id="cdt.managedbuild.target.gnu.builder.exe.debug.268713955" keepEnvironmentInBuildfile="false" name="Gnu Make Builder" superClass="cdt.managedbuild.target.gnu.builder.exe.debug">
<outputEntries>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="outputPath" name="build-simulation"/>
</outputEntries>
</builder>
<builder autoBuildTarget="all" buildPath="${workspace_loc:/dram}/build-simulation" cleanBuildTarget="clean" enableAutoBuild="false" id="org.eclipse.cdt.build.core.internal.builder.1698165306" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.internal.builder"/>
<tool id="cdt.managedbuild.tool.gnu.archiver.base.1509734096" name="GCC Archiver" superClass="cdt.managedbuild.tool.gnu.archiver.base"/>
<tool id="cdt.managedbuild.tool.gnu.cpp.compiler.exe.debug.789860529" name="GCC C++ Compiler" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.exe.debug">
<option id="gnu.cpp.compiler.exe.debug.option.optimization.level.2041174282" name="Optimization Level" superClass="gnu.cpp.compiler.exe.debug.option.optimization.level" value="gnu.cpp.compiler.optimization.level.none" valueType="enumerated"/>

19
dram/src/common/DebugManager.cpp
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@@ -16,19 +16,16 @@ DebugManager& DebugManager::getInstance()
return manager;
}
void DebugManager::printDebug(Importance importancy, Sender sender, sc_time time, std::string message)
void DebugManager::printDebug(string message, Sender sender, Importance importance)
{
cout << "[" << importancyToString(importancy) << "]";
if(printTime) std::cout << " at " << time;
cout << "[" << importanceToString(importance) << "]";
if(printTime) std::cout << " at " << sc_time_stamp();
if(printLocation) std::cout << " in " << senderToString(sender);
cout << ": " << message << endl;
}
string DebugManager::importancyToString(Importance importancy)
string DebugManager::importanceToString(Importance importancy)
{
//if((unsigned int)importancy == Importancy::Warning)
// return "Warning";
switch(importancy)
{
case Importance::Info: return "[Info]";
@@ -40,11 +37,11 @@ string DebugManager::importancyToString(Importance importancy)
string DebugManager::senderToString(Sender sender)
{
/*switch(sender)
switch(sender)
{
case Sender::Core: return "Core";
case Sender::Scheduler: return "Scheduler";
}*/
return "Core";
case Sender::TracePlayer: return "TracePlayer";
}
return "unknown sender";
}

6
dram/src/common/DebugManager.h
View File

@@ -11,24 +11,24 @@
#include <systemc.h>
enum class Importance {Warning, Error, Info};
enum class Sender {Core, Scheduler, TracePlayer};
class DebugManager
{
public:
static DebugManager& getInstance();
enum Sender {Core, Scheduler};
bool printTime;
bool printLocation;
void printDebug(Importance i, Sender s, sc_time time, std::string message);
void printDebug(std::string message, Sender sender, Importance importance=Importance::Info);
private:
DebugManager() : printTime(true), printLocation(true) {};
DebugManager(const DebugManager&);
std::string senderToString(Sender sender);
std::string importancyToString(Importance importancy);
std::string importanceToString(Importance importancy);
};

12
dram/src/common/protocol.h
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@@ -5,14 +5,15 @@
DECLARE_EXTENDED_PHASE(BEGIN_PRE);
DECLARE_EXTENDED_PHASE(END_PRE);
DECLARE_EXTENDED_PHASE(BEGIN_PRE_ALL);
DECLARE_EXTENDED_PHASE(END_PRE_ALL);
DECLARE_EXTENDED_PHASE(BEGIN_ACT);
DECLARE_EXTENDED_PHASE(END_ACT);
DECLARE_EXTENDED_PHASE(BEGIN_REFA);
DECLARE_EXTENDED_PHASE(END_REFA);
DECLARE_EXTENDED_PHASE(BEGIN_AUTO_REFRESH);
DECLARE_EXTENDED_PHASE(END_AUTO_REFRESH);
DECLARE_EXTENDED_PHASE(BEGIN_REFB);
DECLARE_EXTENDED_PHASE(END_REFB);
// Phases for Read and Write
@@ -39,9 +40,6 @@ DECLARE_EXTENDED_PHASE(END_PDNA);
DECLARE_EXTENDED_PHASE(BEGIN_SREF);
DECLARE_EXTENDED_PHASE(END_SREF);
// Internal Phases
DECLARE_EXTENDED_PHASE(START_PROCESSING);
DECLARE_EXTENDED_PHASE(AUTO_PRECHARGE);
//Triggers
DECLARE_EXTENDED_PHASE(REFRESH_TRIGGER);

6
dram/src/common/tlmDBPhaseRecorder.cpp
View File

@@ -9,10 +9,11 @@ using namespace std;
tlmDBPhaseRecorder::tlmDBPhaseRecorder(string name, string pathToConfigs) :
transactionIDCounter(1), PicosecondsPerNanosecond(1e3), pathToConfigs(pathToConfigs)
{
setUpTransactionTerminatingPhases();
openDB(name.c_str());
createTables();
cout << "Created tables in file " << name << std::endl;
setUpTransactionTerminatingPhases();
cout << "Set up terminating phases " << name << std::endl;
prepareSqlStatements();
cout << "Prepared statements " << name << std::endl;
@@ -94,8 +95,7 @@ void tlmDBPhaseRecorder::prepareSqlStatements()
void tlmDBPhaseRecorder::setUpTransactionTerminatingPhases()
{
transactionTerminatingPhases.push_back(tlm::END_RESP);
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_REFA));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_REFB));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_AUTO_REFRESH));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNP));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNA));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_SREF));

70
dram/src/core/CommandBus.cpp
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@@ -1,70 +0,0 @@
/*
* InternalScheduler.cpp
*
* Created on: Mar 9, 2014
* Author: jonny
*/
#include <algorithm>
#include "CommandBus.h"
namespace core {
void CommandBus::schedule(ScheduledCommand& command)
{
std::cout<<command.getCommand()<<" Before cmd bus"<<command.getStart()<<std::endl;
scheduleOnBus(command);
state.change(command);
std::cout<<command.getCommand()<<" After cmd bus"<<command.getStart()<<std::endl;
}
void CommandBus::scheduleOnBus(ScheduledCommand& command)
{
//TODO write nicer -- make own bus checker
sc_time newStart = command.getStart();
//if(!isClkAligned(newStart, config.Timings.clk))
//std::cout<<command.getCommand()<<std::endl;
sc_assert(isClkAligned(newStart, config.Timings.clk));
std::set<sc_time>::iterator it = state.pendingBusCommands.begin();
while (it != state.pendingBusCommands.end() && *it <= newStart)
{
if (*it == newStart)
newStart += config.Timings.clk;
++it;
}
command.setStart(newStart);
}
void CommandBus::send(const Trigger trigger, sc_time time) const
{
wrapperConnector.send(trigger, time);
}
void CommandBus::send(const ScheduledCommand& command) const
{
wrapperConnector.send(command);
}
void CommandBus::send(const CommandSchedule& schedule) const
{
for(const ScheduledCommand& cmd : schedule.getScheduledCommands())
{
send(cmd);
}
}
void CommandBus::cleanUpBus(sc_time currentTime)
{
state.pendingBusCommands.erase(state.pendingBusCommands.begin(),
state.pendingBusCommands.lower_bound(currentTime));
}
} /* namespace controller */

54
dram/src/core/CommandBus.h
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@@ -1,54 +0,0 @@
/*
* InternalScheduler.h
*
* Created on: Mar 6, 2014
* Author: jonny
*/
#ifndef INTERNALSCHEDULER_H_
#define INTERNALSCHEDULER_H_
#include <map>
#include <set>
#include "ControllerState.h"
#include "IWrapperConnector.h"
#include "Configuration.h"
#include "scheduling/CommandSchedule.h"
#include "scheduling/Trigger.h"
#include "scheduling/checker/ICommandChecker.h"
namespace core {
class CommandBus
{
public:
CommandBus(IWrapperConnector& wrapperConnector, const Configuration& config, ControllerState& state):
wrapperConnector(wrapperConnector), config(config), state(state)
{
}
~CommandBus(){}
void schedule(ScheduledCommand& command);
void send(const ScheduledCommand& command) const;
void send(const Trigger trigger, sc_time time) const;
void send(const CommandSchedule& schedule) const;
void cleanUpBus(sc_time currentTime);
private:
IWrapperConnector& wrapperConnector;
const Configuration& config;
core::ControllerState& state;
void changeControllerState(const ScheduledCommand& command);
void refresh(const ScheduledCommand& command);
void precharge(const ScheduledCommand& command);
void activate(const ScheduledCommand& command);
void scheduleOnBus(ScheduledCommand& command);
};
}
#endif /* INTERNALSCHEDULER_H_ */

26
dram/src/core/Controller.cpp
View File

@@ -15,8 +15,8 @@
namespace core {
DramController::DramController(IWrapperConnector& wrapperConnector):
config(),state(config.numberOfBanks, config.nActivate), savedState(config.numberOfBanks, config.nActivate), commandSequenceGenerator(state), commandChecker(), commandSequenceScheduler(
bus, commandChecker), bus(wrapperConnector, config, state), refreshManager(bus, config.Timings.refreshTimings)
config(),state(config.numberOfBanks, config.nActivate), savedState(config.numberOfBanks, config.nActivate), commandSequenceGenerator(state), commandChecker(), busChecker(config, state), commandSequenceScheduler(
*this), refreshManager(*this), wrapper(wrapperConnector)
{
commandChecker[Activate] = new ActivateChecker(config, state);
@@ -46,12 +46,13 @@ void DramController::resetState()
void DramController::scheduleRefresh(sc_time time)
{
cleanUpBus(time);
refreshManager.scheduleRefresh(time);
}
bool DramController::schedule(sc_time start, tlm::tlm_generic_payload& payload)
{
bus.cleanUpBus(start);
cleanUpBus(start);
start = clkAlign(start, config.Timings.clk);
payload.set_streaming_width(config.burstlength);
@@ -69,12 +70,12 @@ bool DramController::schedule(sc_time start, tlm::tlm_generic_payload& payload)
}
else
{
bus.send(schedule);
send(schedule);
return true;
}
}
bool core::DramController::isBusy(sc_time currentTime, Bank bank)
bool DramController::isBusy(sc_time currentTime, Bank bank)
{
ScheduledCommand lastScheduledCommand = state.getLastCommand(bank);
if(lastScheduledCommand.isNoCommand())
@@ -95,6 +96,21 @@ bool core::DramController::isBusy(sc_time currentTime, Bank bank)
}
void DramController::send(const CommandSchedule& schedule) const
{
for(const ScheduledCommand& cmd : schedule.getScheduledCommands())
{
wrapper.send(cmd);
}
}
void DramController::cleanUpBus(sc_time currentTime)
{
state.pendingBusCommands.erase(state.pendingBusCommands.begin(),
state.pendingBusCommands.lower_bound(currentTime));
}
} /* namespace controller */

17
dram/src/core/Controller.h
View File

@@ -11,12 +11,12 @@
#include <tlm.h>
#include <map>
#include "IWrapperConnector.h"
#include "CommandBus.h"
#include "Configuration.h"
#include "powerdown/PowerDownManager.h"
#include "refresh/BankwiseRefreshManager.h"
#include "refresh/RefreshManager.h"
#include "scheduling/CommandSequenceGenerator.h"
#include "scheduling/checker/ICommandChecker.h"
#include "scheduling/checker/BusChecker.h"
#include "scheduling/CommandSequenceScheduler.h"
namespace core {
@@ -39,17 +39,20 @@ public:
void saveState();
void resetState();
private:
void cleanUpBus(sc_time time);
void send(const CommandSchedule& schedule) const;
BusChecker busChecker;
IWrapperConnector& wrapper;
ControllerState state;
std::map<Command, ICommandChecker*> commandChecker;
private:
ControllerState savedState;
CommandSequenceGenerator commandSequenceGenerator;
std::map<Command, ICommandChecker*> commandChecker;
CommandSequenceScheduler commandSequenceScheduler;
CommandBus bus;
BankwiseRefreshManager refreshManager;
RefreshManager refreshManager;
//std::vector<ICommandChecker*> allCommandChecker;
//PowerDownManager powerDownManager;
void addCommandChecker(Command command, ICommandChecker* checker);

48
dram/src/core/refresh/BankwiseRefreshManager.cpp
View File

@@ -1,48 +0,0 @@
/*
* BankwiseRefreshManager.cpp
*
* Created on: Mar 9, 2014
* Author: jonny
*/
#include "BankwiseRefreshManager.h"
using namespace std;
namespace core {
BankwiseRefreshManager::BankwiseRefreshManager(CommandBus& bus, vector<RefreshTiming> refreshTimings)
{
assert(!refreshTimings.empty());
for (unsigned int i = 0; i < refreshTimings.size(); ++i)
{
RefreshManager* manager = new RefreshManager(bus, refreshTimings.at(i), Bank(i));
refreshManagerForBanks.push_back(manager);
}
}
BankwiseRefreshManager::~BankwiseRefreshManager()
{
for (unsigned int i = 0; i < refreshManagerForBanks.size(); ++i)
{
delete(refreshManagerForBanks.at(i));
}
}
bool BankwiseRefreshManager::hasCollision(const CommandSchedule& schedule)
{
RefreshManager& manager = *refreshManagerForBanks.at(schedule.getBank().ID());
return manager.hasCollision(schedule);
}
void BankwiseRefreshManager::scheduleRefresh(sc_time time)
{
for (unsigned int i = 0; i < refreshManagerForBanks.size(); ++i)
{
RefreshManager& manager = *refreshManagerForBanks.at(i);
manager.scheduleRefresh(time);
}
}
} /* namespace controller */

32
dram/src/core/refresh/BankwiseRefreshManager.h
View File

@@ -1,32 +0,0 @@
/*
* BankwiseRefreshManager.h
*
* Created on: Mar 9, 2014
* Author: jonny
*/
#ifndef BANKWISEREFRESHMANAGER_H_
#define BANKWISEREFRESHMANAGER_H_
#include "IRefreshManager.h"
#include "../../common/dramExtension.h"
#include "RefreshManager.h"
namespace core {
class BankwiseRefreshManager : public IRefreshManager
{
public:
BankwiseRefreshManager(CommandBus& bus, std::vector<RefreshTiming> refreshTimings);
virtual ~BankwiseRefreshManager();
virtual bool hasCollision(const CommandSchedule& schedule);
virtual void scheduleRefresh(sc_time time);
private:
std::vector<RefreshManager*> refreshManagerForBanks;
};
} /* namespace controller */
#endif /* BANKWISEREFRESHMANAGER_H_ */

3
dram/src/core/refresh/IRefreshManager.h
View File

@@ -10,9 +10,8 @@
#include <systemc.h>
#include <vector>
#include "../CommandBus.h"
#include "../Configuration.h"
#include "../scheduling/ScheduledCommand.h"
#include "../scheduling/CommandSchedule.h"
namespace core {

84
dram/src/core/refresh/RefreshManager.cpp
View File

@@ -1,87 +1,49 @@
/*
* RefreshManager.cpp
* BankwiseRefreshManager.cpp
*
* Created on: Mar 6, 2014
* Created on: Mar 9, 2014
* Author: jonny
*/
#include "RefreshManager.h"
#include "../utils/Utils.h"
#include "../Controller.h"
using namespace std;
namespace core {
RefreshManager::RefreshManager(CommandBus& bus, const RefreshTiming& refreshTiming
) : bus(bus), refreshTiming(refreshTiming)
RefreshManager::RefreshManager(DramController& controller) : controller(controller)
{
setupTransaction(refreshTransaction, Bank(0));
nextPlannedRefresh = new ScheduledCommand(refreshTransaction, Refresh, SC_ZERO_TIME,
refreshTiming.tRFC);
planNextRefresh(*nextPlannedRefresh);
}
RefreshManager::RefreshManager(CommandBus& bus, const RefreshTiming& refreshTiming,
Bank bank) : bus(bus), refreshTiming(refreshTiming)
{
setupTransaction(refreshTransaction, bank);
nextPlannedRefresh = new ScheduledCommand(refreshTransaction, Refresh, SC_ZERO_TIME,
refreshTiming.tRFC);
planNextRefresh(*nextPlannedRefresh);
assert(!controller.config.Timings.refreshTimings.empty());
for(Bank bank : controller.state.bankStates.getBanks())
{
refreshManagerForBanks.push_back(new RefreshManagerForBank(controller, bank));
}
}
RefreshManager::~RefreshManager()
{
delete nextPlannedRefresh;
for(RefreshManagerForBank* manager : refreshManagerForBanks)
{
delete manager;
}
}
/*
* Checks for a scheduled CommandSequence, if there is a collision with the current planned,
* not yet scheduled, refresh command. In case of a collision the manager schedules the refresh
* (sends it out) and plans the next refresh. Afterwards the CommandSequence is re-scheduled
* with the new controller state (earliest start time is the end of the just scheduled refresh).
*/
bool RefreshManager::hasCollision(const CommandSchedule& schedule)
{
if (schedule.getEnd() < nextPlannedRefresh->getStart())
{
return false;
}
else
{
return true;
}
RefreshManagerForBank& manager = *refreshManagerForBanks.at(schedule.getBank().ID());
return manager.hasCollision(schedule);
}
void RefreshManager::scheduleRefresh(sc_time time)
{
if (time == nextPlannedRefresh->getStart())
scheduleRefresh(*nextPlannedRefresh);
}
void RefreshManager::scheduleRefresh(ScheduledCommand& refresh)
{
bus.schedule(refresh);
bus.send(refresh);
planNextRefresh(refresh);
}
void RefreshManager::planNextRefresh(ScheduledCommand& refresh) //TODO nicer to return the reference ?
{
refresh.delayStart(refreshTiming.tREFI);
bus.send(RefreshTrigger, refresh.getStart());
}
void RefreshManager::setupTransaction(tlm::tlm_generic_payload& transaction, Bank bank)
{
transaction.set_address(getStartAddress(bank));
transaction.set_command(tlm::TLM_READ_COMMAND);
transaction.set_data_length(0);
transaction.set_response_status(tlm::TLM_OK_RESPONSE);
transaction.set_dmi_allowed(false);
transaction.set_byte_enable_length(0);
transaction.set_streaming_width(0);
transaction.set_extension(new DramExtension(Thread(0), bank, Row(0), Column(0))); //payload takes ownership
for (unsigned int i = 0; i < refreshManagerForBanks.size(); ++i)
{
RefreshManagerForBank& manager = *refreshManagerForBanks.at(i);
manager.scheduleRefresh(time);
}
}
} /* namespace controller */

28
dram/src/core/refresh/RefreshManager.h
View File

@@ -1,41 +1,35 @@
/*
* RefreshManager.h
* BankwiseRefreshManager.h
*
* Created on: Mar 6, 2014
* Created on: Mar 9, 2014
* Author: jonny
*/
#ifndef REFRESHMANAGER_H_
#define REFRESHMANAGER_H_
#ifndef BANKWISEREFRESHMANAGER_H_
#define BANKWISEREFRESHMANAGER_H_
#include "IRefreshManager.h"
#include "../../common/dramExtension.h"
#include "RefreshManagerForBank.h"
namespace core {
class DramController;
class RefreshManager : public IRefreshManager
{
public:
RefreshManager(CommandBus& bus, const RefreshTiming& refreshTiming);
RefreshManager(CommandBus& bus, const RefreshTiming& refreshTiming, Bank bank);
RefreshManager(DramController& controller);
virtual ~RefreshManager();
virtual bool hasCollision(const CommandSchedule& schedule);
virtual void scheduleRefresh(sc_time time);
private:
CommandBus& bus;
const RefreshTiming& refreshTiming;
tlm::tlm_generic_payload refreshTransaction;
ScheduledCommand* nextPlannedRefresh;
void scheduleRefresh(ScheduledCommand& refresh);
void planNextRefresh(ScheduledCommand& refresh);
static void setupTransaction(tlm::tlm_generic_payload& transaction, Bank bank);
DramController& controller;
std::vector<RefreshManagerForBank*> refreshManagerForBanks;
};
} /* namespace controller */
#endif /* REFRESHMANAGER_H_ */
#endif /* BANKWISEREFRESHMANAGER_H_ */

81
dram/src/core/refresh/RefreshManagerForBank.cpp Normal file
View File

@@ -0,0 +1,81 @@
/*
* RefreshManager.cpp
*
* Created on: Mar 6, 2014
* Author: jonny
*/
#include "RefreshManagerForBank.h"
#include "../utils/Utils.h"
#include "../Controller.h"
namespace core {
RefreshManagerForBank::RefreshManagerForBank(DramController& controller, Bank bank) : controller(controller), timing(controller.config.Timings.refreshTimings.at(bank.ID()))
{
setupTransaction(refreshTransaction, bank);
nextPlannedRefresh = new ScheduledCommand(refreshTransaction, Refresh, SC_ZERO_TIME,
timing.tRFC);
planNextRefresh(*nextPlannedRefresh);
}
RefreshManagerForBank::~RefreshManagerForBank()
{
delete nextPlannedRefresh;
}
/*
* Checks for a scheduled CommandSequence, if there is a collision with the current planned,
* not yet scheduled, refresh command. In case of a collision the manager schedules the refresh
* (sends it out) and plans the next refresh. Afterwards the CommandSequence is re-scheduled
* with the new controller state (earliest start time is the end of the just scheduled refresh).
*/
bool RefreshManagerForBank::hasCollision(const CommandSchedule& schedule)
{
if (schedule.getEnd() < nextPlannedRefresh->getStart())
{
return false;
}
else
{
return true;
}
}
void RefreshManagerForBank::scheduleRefresh(sc_time time)
{
if (time == nextPlannedRefresh->getStart())
scheduleRefresh(*nextPlannedRefresh);
}
void RefreshManagerForBank::scheduleRefresh(ScheduledCommand& refresh)
{
if(controller.config.RefreshBankwise)
controller.busChecker.findSlotOnBus(refresh);
controller.state.change(refresh);
controller.wrapper.send(refresh);
planNextRefresh(refresh);
}
void RefreshManagerForBank::planNextRefresh(ScheduledCommand& refresh) //TODO nicer to return the reference ?
{
refresh.delayStart(timing.tREFI);
controller.wrapper.send(RefreshTrigger, refresh.getStart());
}
void RefreshManagerForBank::setupTransaction(tlm::tlm_generic_payload& transaction, Bank bank)
{
transaction.set_address(getStartAddress(bank));
transaction.set_command(tlm::TLM_READ_COMMAND);
transaction.set_data_length(0);
transaction.set_response_status(tlm::TLM_OK_RESPONSE);
transaction.set_dmi_allowed(false);
transaction.set_byte_enable_length(0);
transaction.set_streaming_width(0);
transaction.set_extension(new DramExtension(Thread(0), bank, Row(0), Column(0))); //payload takes ownership
}
} /* namespace controller */

42
dram/src/core/refresh/RefreshManagerForBank.h Normal file
View File

@@ -0,0 +1,42 @@
/*
* RefreshManager.h
*
* Created on: Mar 6, 2014
* Author: jonny
*/
#ifndef REFRESHMANAGER_H_
#define REFRESHMANAGER_H_
#include "IRefreshManager.h"
#include "../../common/dramExtension.h"
namespace core {
class DramController;
class RefreshManagerForBank
{
public:
RefreshManagerForBank(DramController& controller, Bank bank);
virtual ~RefreshManagerForBank();
virtual bool hasCollision(const CommandSchedule& schedule);
virtual void scheduleRefresh(sc_time time);
private:
DramController& controller;
RefreshTiming& timing;
tlm::tlm_generic_payload refreshTransaction;
ScheduledCommand* nextPlannedRefresh;
void scheduleRefresh(ScheduledCommand& refresh);
void planNextRefresh(ScheduledCommand& refresh);
static void setupTransaction(tlm::tlm_generic_payload& transaction, Bank bank);
};
} /* namespace controller */
#endif /* REFRESHMANAGER_H_ */

6
dram/src/core/scheduling/CommandSequenceScheduler.cpp
View File

@@ -18,12 +18,14 @@ CommandSchedule CommandSequenceScheduler::schedule(CommandSequence commands, sc_
sc_time endOfPrevious = start;
for (Command cmd : commands)
{
ICommandChecker& checker = *commandChecker.at(cmd);
ICommandChecker& checker = *controller.commandChecker.at(cmd);
sc_time executionTime = checker.getExecutionTime(transaction, cmd);
ScheduledCommand& scheduledCommand = schedule.add(cmd, endOfPrevious, executionTime);
checker.delayToSatisfyConstraints(scheduledCommand);
bus.schedule(scheduledCommand);
controller.busChecker.findSlotOnBus(scheduledCommand);
controller.state.change(scheduledCommand);
endOfPrevious = scheduledCommand.getEnd();
}

11
dram/src/core/scheduling/CommandSequenceScheduler.h
View File

@@ -8,13 +8,7 @@
#ifndef COMMANDSEQUENCESCHEDULER_H_
#define COMMANDSEQUENCESCHEDULER_H_
#include <map>
#include "CommandSchedule.h"
#include "../Command.h"
#include "../CommandBus.h"
#include "checker/ICommandChecker.h"
namespace core {
@@ -23,14 +17,13 @@ class DramController;
class CommandSequenceScheduler
{
public:
CommandSequenceScheduler(CommandBus& bus, std::map<Command, ICommandChecker*>& commandChecker) : bus(bus), commandChecker(commandChecker){}
CommandSequenceScheduler(DramController& controller) : controller(controller){}
virtual ~CommandSequenceScheduler(){}
CommandSchedule schedule(CommandSequence commands, sc_time start, tlm::tlm_generic_payload& transaction);
private:
CommandBus& bus;
std::map<Command, ICommandChecker*>& commandChecker;
DramController& controller;
};
} /* namespace controller */

11
dram/src/simulation/controllerwrapper.h
View File

@@ -72,7 +72,7 @@ public:
phase = BEGIN_WR;
break;
case Refresh:
phase = BEGIN_REFA;
phase = BEGIN_AUTO_REFRESH;
break;
case Activate:
phase = BEGIN_ACT;
@@ -209,17 +209,14 @@ private:
scheduleNextPayload(DramExtension::getExtension(payload).getBank());
sendToDram(payload, phase, SC_ZERO_TIME);
}
else if(phase == BEGIN_REFA || phase == BEGIN_ACT
else if(phase == BEGIN_AUTO_REFRESH || phase == BEGIN_ACT
|| phase == BEGIN_PRE)
{
sendToDram(payload, phase, SC_ZERO_TIME);
}
else if(phase == END_REFA)
else if(phase == END_AUTO_REFRESH)
{
//std::cout << " --- END_REFA --- @:" <<sc_time_stamp() << std::endl;
for(Bank bank:controller->getBankStates().getBanks())
scheduleNextPayload(bank);
scheduleNextPayload(DramExtension::getExtension(payload).getBank());
}
else if (phase == END_RD || phase == END_WR)
{

26
dram/src/simulation/dram.h
View File

@@ -54,7 +54,7 @@ struct Dram: sc_module
void peq_cb(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase)
{
if(phase == BEGIN_PRE || phase == AUTO_PRECHARGE)
if(phase == BEGIN_PRE || phase == BEGIN_PRE_ALL)
{
if(phase == BEGIN_PRE)
@@ -82,13 +82,9 @@ struct Dram: sc_module
{
send_end_rd(trans,false);
}
else if(phase == BEGIN_REFA)
else if(phase == BEGIN_AUTO_REFRESH)
{
send_end_refa(trans);
}
else if(phase == BEGIN_REFB)
{
send_end_refb(trans);
send_end_auto_refresh(trans);
}
else if(phase == BEGIN_PDNP)
{
@@ -121,24 +117,12 @@ struct Dram: sc_module
}
void send_end_refa(tlm::tlm_generic_payload& trans)
void send_end_auto_refresh(tlm::tlm_generic_payload& trans)
{
tlm::tlm_phase bw_phase;
sc_time delay;
bw_phase = END_REFA;
delay = xc.tREFA;
tSocket->nb_transport_bw( trans, bw_phase, delay );
}
void send_end_refb(tlm::tlm_generic_payload& trans)
{
tlm::tlm_phase bw_phase;
sc_time delay;
bw_phase = END_REFB;
bw_phase = END_AUTO_REFRESH;
delay = xc.tREFB;
tSocket->nb_transport_bw( trans, bw_phase, delay );

3
dram/src/simulation/main.cpp
View File

@@ -25,9 +25,6 @@
using namespace std;
int sc_main(int argc, char **argv) {
DebugManager::getInstance().printDebug(Importance::Warning, DebugManager::Sender::Core, SC_ZERO_TIME, "hhh");
string executableName(argv[0]);
string pathOfExecutable = executableName.substr(0,executableName.find_last_of('/'));
//string pathToStaticFolder = pathOfExecutable + string("../static");

12
dram/src/simulation/traceplayer.h
View File

@@ -18,6 +18,7 @@
#include <iostream>
#include <string>
#include "MemoryManager.h"
#include "../common/DebugManager.h"
using namespace std;
using namespace tlm;
@@ -27,10 +28,10 @@ struct TracePlayer: public sc_module
{
public:
tlm_utils::simple_initiator_socket<TracePlayer,BUSWIDTH, tlm::tlm_base_protocol_types> iSocket;
unsigned int transactionsSend;
unsigned int transactionsSent;
TracePlayer(sc_module_name name, string pathToTrace) :
payloadEventQueue(this, &TracePlayer::peqCallback), file(pathToTrace), numberOfPendingTransactions(0), transactionsSend(0)
payloadEventQueue(this, &TracePlayer::peqCallback), file(pathToTrace), numberOfPendingTransactions(0), transactionsSent(0)
{
if (!file.is_open())
SC_REPORT_FATAL(0, (string("Could not open trace ") + pathToTrace).c_str());
@@ -113,9 +114,8 @@ private:
{
payload.acquire();
sendToTarget(payload,phase,SC_ZERO_TIME);
//cout << "Sending transaction number: " << transactionsSend << std::endl;
transactionsSend++;
//cout << "Traceplayer: sending transaction at " << sc_time_stamp() << std::endl;
transactionsSent++;
DebugManager::getInstance().printDebug("Sending transaction number: " + std::to_string(transactionsSent), Sender::TracePlayer);
}
else if (phase == END_REQ)
@@ -127,8 +127,8 @@ private:
payload.release();
sendToTarget(payload,END_RESP,SC_ZERO_TIME);
numberOfPendingTransactions--;
//cout << numberOfPendingTransactions << std::endl;
DebugManager::getInstance().printDebug("Number of pending transactions: " + std::to_string(numberOfPendingTransactions), Sender::TracePlayer);
if(numberOfPendingTransactions == 0)
payloadEventQueue.notify(payload, END_RESP, SC_ZERO_TIME);
}