improvements
This commit is contained in:
13
DRAMSys/gem5/gem5_se/almabench/almabench.log
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DRAMSys/gem5/gem5_se/almabench/almabench.log
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Oct 11 2018 11:41:41
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gem5 started Nov 8 2018 17:18:25
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gem5 executing on botanix, pid 6721
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command line: build/ARM/gem5.opt -d se_output_2018.11.08-17.18.24/almabench configs/example/arm/starter_se.py --cpu=hpi --num-cores=1 --mem-channels=1 --tlm-memory=transactor /home/eder/gem5_tnt/benchmarks/test-suite/SingleSource/Benchmarks/CoyoteBench/almabench
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info: Standard input is not a terminal, disabling listeners.
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info: 1. command and arguments: ['/home/eder/gem5_tnt/benchmarks/test-suite/SingleSource/Benchmarks/CoyoteBench/almabench']
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Global frequency set at 1000000000000 ticks per second
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fatal: Can't find port handler type 'tlm_slave'
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Memory Usage: 285396 KBytes
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6731
DRAMSys/gem5/gem5_se/almabench/config.dot
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6731
DRAMSys/gem5/gem5_se/almabench/config.dot
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DRAMSys/gem5/gem5_se/almabench/config.dot.pdf
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DRAMSys/gem5/gem5_se/almabench/config.dot.pdf
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DRAMSys/gem5/gem5_se/almabench/config.dot.svg
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DRAMSys/gem5/gem5_se/almabench/config.dot.svg
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
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"http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
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<!-- Generated by graphviz version 2.38.0 (20140413.2041)
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-->
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<!-- Title: G Pages: 1 -->
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<svg width="984pt" height="1016pt"
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viewBox="0.00 0.00 984.00 1016.00" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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<g id="graph0" class="graph" transform="scale(1 1) rotate(0) translate(4 1012)">
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<title>G</title>
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||||
<polygon fill="white" stroke="none" points="-4,4 -4,-1012 980,-1012 980,4 -4,4"/>
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||||
<g id="clust1" class="cluster"><title>cluster_root</title>
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||||
<g id="a_clust1"><a xlink:title="eventq_index=0 full_system=false sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000">
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<text text-anchor="middle" x="488" y="-984.8" font-family="Arial" font-size="14.00" fill="#000000">root </text>
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<text text-anchor="middle" x="488" y="-969.8" font-family="Arial" font-size="14.00" fill="#000000">: Root</text>
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</a>
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</g>
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</g>
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<g id="clust2" class="cluster"><title>cluster_system</title>
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<g id="a_clust2"><a xlink:title="boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 kernel= kernel_addr_check=false kernel_extras= load_addr_mask=18446744073709551615 load_offset=0 mem_mode=timing mem_ranges=0:2147483647:0:0:0:0 memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 power_model= readfile= symbolfile= thermal_components= thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1">
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<text text-anchor="middle" x="488" y="-923.8" font-family="Arial" font-size="14.00" fill="#000000">: SimpleSeSystem</text>
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||||
</a>
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</g>
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</g>
|
||||
<g id="clust3" class="cluster"><title>cluster_system_membus</title>
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||||
<g id="a_clust3"><a xlink:title="clk_domain=system.clk_domain default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 point_of_coherency=true point_of_unification=true power_model= response_latency=2 snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false width=16">
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<text text-anchor="middle" x="309" y="-230.8" font-family="Arial" font-size="14.00" fill="#000000">membus </text>
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<text text-anchor="middle" x="309" y="-215.8" font-family="Arial" font-size="14.00" fill="#000000">: SystemXBar</text>
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||||
</a>
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||||
</g>
|
||||
</g>
|
||||
<g id="clust8" class="cluster"><title>cluster_system_cpu_cluster</title>
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||||
<g id="a_clust8"><a xlink:title="eventq_index=0 thermal_domain=Null">
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<text text-anchor="middle" x="540" y="-892.8" font-family="Arial" font-size="14.00" fill="#000000">cpu_cluster </text>
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||||
<text text-anchor="middle" x="540" y="-877.8" font-family="Arial" font-size="14.00" fill="#000000">: CpuCluster</text>
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||||
</a>
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||||
</g>
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||||
</g>
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||||
<g id="clust9" class="cluster"><title>cluster_system_cpu_cluster_toL2Bus</title>
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||||
<g id="a_clust9"><a xlink:title="clk_domain=system.cpu_cluster.clk_domain default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 point_of_coherency=false point_of_unification=true power_model= response_latency=1 snoop_filter=system.cpu_cluster.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false width=64">
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|
||||
<text text-anchor="middle" x="525" y="-492.8" font-family="Arial" font-size="14.00" fill="#000000">toL2Bus </text>
|
||||
<text text-anchor="middle" x="525" y="-477.8" font-family="Arial" font-size="14.00" fill="#000000">: L2XBar</text>
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||||
</a>
|
||||
</g>
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||||
</g>
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||||
<g id="clust12" class="cluster"><title>cluster_system_cpu_cluster_l2</title>
|
||||
<g id="a_clust12"><a xlink:title="addr_ranges=0:18446744073709551615:0:0:0:0 assoc=16 clk_domain=system.cpu_cluster.clk_domain clusivity=mostly_incl data_latency=13 default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 is_read_only=false max_miss_count=0 mshrs=4 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 power_model= prefetch_on_access=false prefetcher=Null replacement_policy=system.cpu_cluster.l2.replacement_policy response_latency=5 sequential_access=false size=1048576 system=system tag_latency=13 tags=system.cpu_cluster.l2.tags tgts_per_mshr=8 warmup_percentage=0 write_buffers=16 writeback_clean=false">
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||||
<text text-anchor="middle" x="422" y="-361.8" font-family="Arial" font-size="14.00" fill="#000000">l2 </text>
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||||
<text text-anchor="middle" x="422" y="-346.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_L2</text>
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||||
</a>
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||||
</g>
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||||
</g>
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||||
<g id="clust16" class="cluster"><title>cluster_system_cpu_cluster_cpus</title>
|
||||
<g id="a_clust16"><a xlink:title="branchPred=system.cpu_cluster.cpus.branchPred checker=Null clk_domain=system.cpu_cluster.clk_domain cpu_id=0 decodeCycleInput=true decodeInputBufferSize=3 decodeInputWidth=2 decodeToExecuteForwardDelay=1 default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dstage2_mmu=system.cpu_cluster.cpus.dstage2_mmu dtb=system.cpu_cluster.cpus.dtb enableIdling=true eventq_index=0 executeAllowEarlyMemoryIssue=true executeBranchDelay=1 executeCommitLimit=2 executeCycleInput=true executeFuncUnits=system.cpu_cluster.cpus.executeFuncUnits executeInputBufferSize=7 executeInputWidth=2 executeIssueLimit=2 executeLSQMaxStoreBufferStoresPerCycle=2 executeLSQRequestsQueueSize=1 executeLSQStoreBufferSize=5 executeLSQTransfersQueueSize=2 executeMaxAccessesInMemory=2 executeMemoryCommitLimit=1 executeMemoryIssueLimit=1 executeMemoryWidth=0 executeSetTraceTimeOnCommit=true executeSetTraceTimeOnIssue=false fetch1FetchLimit=1 fetch1LineSnapWidth=0 fetch1LineWidth=0 fetch1ToFetch2BackwardDelay=1 fetch1ToFetch2ForwardDelay=1 fetch2CycleInput=true fetch2InputBufferSize=2 fetch2ToDecodeForwardDelay=1 function_trace=false function_trace_start=0 interrupts=system.cpu_cluster.cpus.interrupts isa=system.cpu_cluster.cpus.isa istage2_mmu=system.cpu_cluster.cpus.istage2_mmu itb=system.cpu_cluster.cpus.itb max_insts_all_threads=0 max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 power_gating_on_idle=false power_model= profile=0 progress_interval=0 pwr_gating_latency=300 simpoint_start_insts= socket_id=0 switched_out=false syscallRetryLatency=10000 system=system threadPolicy=RoundRobin tracer=system.cpu_cluster.cpus.tracer wait_for_remote_gdb=false workload=system.cpu_cluster.cpus.workload">
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||||
<text text-anchor="middle" x="540" y="-846.8" font-family="Arial" font-size="14.00" fill="#000000">cpus </text>
|
||||
<text text-anchor="middle" x="540" y="-831.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust17" class="cluster"><title>cluster_system_cpu_cluster_cpus_dtb_walker_cache</title>
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||||
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|
||||
<text text-anchor="middle" x="840" y="-608.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_WalkCache</text>
|
||||
</a>
|
||||
</g>
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||||
</g>
|
||||
<g id="clust20" class="cluster"><title>cluster_system_cpu_cluster_cpus_icache</title>
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||||
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|
||||
<text text-anchor="middle" x="440" y="-623.8" font-family="Arial" font-size="14.00" fill="#000000">icache </text>
|
||||
<text text-anchor="middle" x="440" y="-608.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_ICache</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust23" class="cluster"><title>cluster_system_cpu_cluster_cpus_dtb</title>
|
||||
<g id="a_clust23"><a xlink:title="eventq_index=0 is_stage2=false size=256 sys=system walker=system.cpu_cluster.cpus.dtb.walker">
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||||
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|
||||
<text text-anchor="middle" x="794" y="-800.8" font-family="Arial" font-size="14.00" fill="#000000">dtb </text>
|
||||
<text text-anchor="middle" x="794" y="-785.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_DTB</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust24" class="cluster"><title>cluster_system_cpu_cluster_cpus_dtb_walker</title>
|
||||
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<text text-anchor="middle" x="794" y="-754.8" font-family="Arial" font-size="14.00" fill="#000000">walker </text>
|
||||
<text text-anchor="middle" x="794" y="-739.8" font-family="Arial" font-size="14.00" fill="#000000">: ArmTableWalker</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust26" class="cluster"><title>cluster_system_cpu_cluster_cpus_itb_walker_cache</title>
|
||||
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|
||||
<text text-anchor="middle" x="640" y="-623.8" font-family="Arial" font-size="14.00" fill="#000000">itb_walker_cache </text>
|
||||
<text text-anchor="middle" x="640" y="-608.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_WalkCache</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust29" class="cluster"><title>cluster_system_cpu_cluster_cpus_itb</title>
|
||||
<g id="a_clust29"><a xlink:title="eventq_index=0 is_stage2=false size=256 sys=system walker=system.cpu_cluster.cpus.itb.walker">
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|
||||
<text text-anchor="middle" x="589" y="-785.8" font-family="Arial" font-size="14.00" fill="#000000">: HPI_ITB</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust30" class="cluster"><title>cluster_system_cpu_cluster_cpus_itb_walker</title>
|
||||
<g id="a_clust30"><a xlink:title="clk_domain=system.cpu_cluster.clk_domain default_p_state=UNDEFINED eventq_index=0 is_stage2=false num_squash_per_cycle=2 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 power_model= sys=system">
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|
||||
<text text-anchor="middle" x="589" y="-754.8" font-family="Arial" font-size="14.00" fill="#000000">walker </text>
|
||||
<text text-anchor="middle" x="589" y="-739.8" font-family="Arial" font-size="14.00" fill="#000000">: ArmTableWalker</text>
|
||||
</a>
|
||||
</g>
|
||||
</g>
|
||||
<g id="clust38" class="cluster"><title>cluster_system_cpu_cluster_cpus_dcache</title>
|
||||
<g id="a_clust38"><a xlink:title="addr_ranges=0:18446744073709551615:0:0:0:0 assoc=4 clk_domain=system.cpu_cluster.clk_domain clusivity=mostly_incl data_latency=1 default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 is_read_only=false max_miss_count=0 mshrs=4 p_state_clk_gate_bins=20 p_state_clk_gate_max=1000000000000 p_state_clk_gate_min=1000 power_model= prefetch_on_access=false prefetcher=system.cpu_cluster.cpus.dcache.prefetcher replacement_policy=system.cpu_cluster.cpus.dcache.replacement_policy response_latency=1 sequential_access=false size=32768 system=system tag_latency=1 tags=system.cpu_cluster.cpus.dcache.tags tgts_per_mshr=8 warmup_percentage=0 write_buffers=4 writeback_clean=false">
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||||
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<text text-anchor="middle" x="345" y="-84.8" font-family="Arial" font-size="14.00" fill="#000000">: ExternalSlave</text>
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</a>
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<g id="node1" class="node"><title>system_system_port</title>
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<g id="node3" class="node"><title>system_membus_slave</title>
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<!-- system_system_port->system_membus_slave -->
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<g id="edge1" class="edge"><title>system_system_port->system_membus_slave</title>
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<g id="node2" class="node"><title>system_membus_master</title>
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<g id="node20" class="node"><title>system_external_memory_port</title>
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<g id="edge2" class="edge"><title>system_membus_master->system_external_memory_port</title>
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<g id="node4" class="node"><title>system_cpu_cluster_toL2Bus_master</title>
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<!-- system_cpu_cluster_l2_cpu_side -->
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<g id="node7" class="node"><title>system_cpu_cluster_l2_cpu_side</title>
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<g id="edge3" class="edge"><title>system_cpu_cluster_toL2Bus_master->system_cpu_cluster_l2_cpu_side</title>
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<g id="node5" class="node"><title>system_cpu_cluster_toL2Bus_slave</title>
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<!-- system_cpu_cluster_l2_mem_side -->
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<g id="node6" class="node"><title>system_cpu_cluster_l2_mem_side</title>
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<!-- system_cpu_cluster_l2_mem_side->system_membus_slave -->
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<g id="edge4" class="edge"><title>system_cpu_cluster_l2_mem_side->system_membus_slave</title>
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<!-- system_cpu_cluster_cpus_icache_port -->
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<g id="node8" class="node"><title>system_cpu_cluster_cpus_icache_port</title>
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<text text-anchor="middle" x="389" y="-701.8" font-family="Arial" font-size="14.00" fill="#000000">icache_port</text>
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</g>
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<!-- system_cpu_cluster_cpus_icache_cpu_side -->
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<g id="node13" class="node"><title>system_cpu_cluster_cpus_icache_cpu_side</title>
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<!-- system_cpu_cluster_cpus_icache_port->system_cpu_cluster_cpus_icache_cpu_side -->
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<g id="edge5" class="edge"><title>system_cpu_cluster_cpus_icache_port->system_cpu_cluster_cpus_icache_cpu_side</title>
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<g id="node9" class="node"><title>system_cpu_cluster_cpus_dcache_port</title>
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</g>
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<!-- system_cpu_cluster_cpus_dcache_cpu_side -->
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<g id="node19" class="node"><title>system_cpu_cluster_cpus_dcache_cpu_side</title>
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<!-- system_cpu_cluster_cpus_dcache_port->system_cpu_cluster_cpus_dcache_cpu_side -->
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<!-- system_cpu_cluster_cpus_dtb_walker_cache_mem_side -->
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<!-- system_cpu_cluster_cpus_dtb_walker_cache_mem_side->system_cpu_cluster_toL2Bus_slave -->
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<!-- system_cpu_cluster_cpus_icache_mem_side -->
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<g id="node12" class="node"><title>system_cpu_cluster_cpus_icache_mem_side</title>
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<!-- system_cpu_cluster_cpus_icache_mem_side->system_cpu_cluster_toL2Bus_slave -->
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<!-- system_cpu_cluster_cpus_dtb_walker_port->system_cpu_cluster_cpus_dtb_walker_cache_cpu_side -->
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After Width: | Height: | Size: 37 KiB |
5019
DRAMSys/gem5/gem5_se/almabench/config.ini
Normal file
5019
DRAMSys/gem5/gem5_se/almabench/config.ini
Normal file
File diff suppressed because it is too large
Load Diff
7803
DRAMSys/gem5/gem5_se/almabench/config.json
Normal file
7803
DRAMSys/gem5/gem5_se/almabench/config.json
Normal file
File diff suppressed because it is too large
Load Diff
@@ -39,11 +39,20 @@ rgrsim-gem5-se.xml
|
||||
|
||||
bins="
|
||||
8_cores
|
||||
almabench
|
||||
Bubblesort
|
||||
chomp
|
||||
exptree
|
||||
fldry
|
||||
FloatMM
|
||||
hello
|
||||
IntMM
|
||||
lpbench
|
||||
misr
|
||||
Oscar
|
||||
Perm
|
||||
Puzzle
|
||||
queens
|
||||
Queens
|
||||
Quicksort
|
||||
RealMM
|
||||
|
||||
Reference in New Issue
Block a user