memspec class
This commit is contained in:
Janik Schlemminger
@@ -6,7 +6,7 @@
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*/
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#include "MemSpecLoader.h"
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#include "TimingConfiguration.h"
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#include "MemSpec.h"
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#include "../TimingCalculation.h"
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using namespace tinyxml2;
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@@ -53,21 +53,21 @@ void MemSpecLoader::loadMemConfig(Configuration& config, XMLElement* memconfig)
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{
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config.powerDownMode = PowerDownMode::TimeoutSREF;
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}
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config.powerDownTimeout = queryUIntParameter(configuration, "powerDownTimeout") * config.Timings.clk;
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config.powerDownTimeout = queryUIntParameter(configuration, "powerDownTimeout") * config.memSpec.clk;
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config.databaseRecordingEnabled = queryBoolParameter(configuration, "databaseRecordingEnabled");
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}
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void MemSpecLoader::loadMemSpec(Configuration& config, XMLElement* memspec)
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{
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config.MemoryId = queryStringParameter(memspec, "memoryId");
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config.MemoryType = queryStringParameter(memspec, "memoryType");
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config.memSpec.MemoryId = queryStringParameter(memspec, "memoryId");
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config.memSpec.MemoryType = queryStringParameter(memspec, "memoryType");
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if (config.MemoryType == "DDR4")
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if (config.memSpec.MemoryType == "DDR4")
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{
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loadDDR4(config, memspec);
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}
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else if (config.MemoryType == "WIDEIO_SDR")
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else if (config.memSpec.MemoryType == "WIDEIO_SDR")
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{
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loadWideIO(config, memspec);
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}
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@@ -82,47 +82,47 @@ void MemSpecLoader::loadDDR4(Configuration& config, XMLElement* memspec)
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//MemSpecification
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XMLElement* architecture = memspec->FirstChildElement("memarchitecturespec");
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config.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
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config.NumberOfBankGroups = queryUIntParameter(architecture, "nbrOfBankGroups");
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config.BurstLength = queryUIntParameter(architecture, "burstLength");
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config.nActivate = 4;
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config.DataRate = queryUIntParameter(architecture, "dataRate");
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config.NumberOfRows = queryUIntParameter(architecture, "nbrOfRows");
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config.memSpec.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
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config.memSpec.NumberOfBankGroups = queryUIntParameter(architecture, "nbrOfBankGroups");
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config.memSpec.BurstLength = queryUIntParameter(architecture, "burstLength");
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config.memSpec.nActivate = 4;
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config.memSpec.DataRate = queryUIntParameter(architecture, "dataRate");
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config.memSpec.NumberOfRows = queryUIntParameter(architecture, "nbrOfRows");
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//MemTimings
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XMLElement* timings = memspec->FirstChildElement("memtimingspec");
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double clkMhz = queryDoubleParameter(timings, "clkMhz");
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config.Timings.clk = FrequencyToClk(clkMhz);
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sc_time clk = config.Timings.clk;
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config.Timings.tRP = clk * queryUIntParameter(timings, "RP");
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config.Timings.tRAS = clk * queryUIntParameter(timings, "RAS");
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config.Timings.tRC = clk * queryUIntParameter(timings, "RC");
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config.Timings.tRTP = clk * queryUIntParameter(timings, "RTP");
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config.Timings.tRRD_S = clk * queryUIntParameter(timings, "RRD_S");
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config.Timings.tRRD_L = clk * queryUIntParameter(timings, "RRD_L");
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config.Timings.tCCD_S = clk * queryUIntParameter(timings, "CCD_S");
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config.Timings.tCCD_L = clk * queryUIntParameter(timings, "CCD_L");
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config.Timings.tRCD = clk * queryUIntParameter(timings, "RCD");
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config.Timings.tNAW = clk * queryUIntParameter(timings, "FAW");
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config.Timings.tRL = clk * queryUIntParameter(timings, "RL");
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config.Timings.tWL = clk * queryUIntParameter(timings, "WL");
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config.Timings.tWR = clk * queryUIntParameter(timings, "WR");
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config.Timings.tWTR_S = clk * queryUIntParameter(timings, "WTR_S");
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config.Timings.tWTR_L = clk * queryUIntParameter(timings, "WTR_L");
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config.Timings.tCKESR = clk * queryUIntParameter(timings, "CKESR");
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config.Timings.tCKE = clk * queryUIntParameter(timings, "CKE");
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config.Timings.tXP = clk * queryUIntParameter(timings, "XP");
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config.Timings.tXPDLL = clk * queryUIntParameter(timings, "XPDLL");
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config.Timings.tXSR = clk * queryUIntParameter(timings, "XS");
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config.Timings.tXSRDLL = clk * queryUIntParameter(timings, "XSDLL");
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config.Timings.tAL = clk * queryUIntParameter(timings, "AL");
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config.Timings.tRFC = clk * queryUIntParameter(timings, "RFC");
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config.Timings.tREFI = clk * queryUIntParameter(timings, "REFI");
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config.memSpec.clk = FrequencyToClk(clkMhz);
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sc_time clk = config.memSpec.clk;
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config.memSpec.tRP = clk * queryUIntParameter(timings, "RP");
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config.memSpec.tRAS = clk * queryUIntParameter(timings, "RAS");
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config.memSpec.tRC = clk * queryUIntParameter(timings, "RC");
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config.memSpec.tRTP = clk * queryUIntParameter(timings, "RTP");
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config.memSpec.tRRD_S = clk * queryUIntParameter(timings, "RRD_S");
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config.memSpec.tRRD_L = clk * queryUIntParameter(timings, "RRD_L");
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config.memSpec.tCCD_S = clk * queryUIntParameter(timings, "CCD_S");
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config.memSpec.tCCD_L = clk * queryUIntParameter(timings, "CCD_L");
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config.memSpec.tRCD = clk * queryUIntParameter(timings, "RCD");
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config.memSpec.tNAW = clk * queryUIntParameter(timings, "FAW");
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config.memSpec.tRL = clk * queryUIntParameter(timings, "RL");
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config.memSpec.tWL = clk * queryUIntParameter(timings, "WL");
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config.memSpec.tWR = clk * queryUIntParameter(timings, "WR");
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config.memSpec.tWTR_S = clk * queryUIntParameter(timings, "WTR_S");
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config.memSpec.tWTR_L = clk * queryUIntParameter(timings, "WTR_L");
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config.memSpec.tCKESR = clk * queryUIntParameter(timings, "CKESR");
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config.memSpec.tCKE = clk * queryUIntParameter(timings, "CKE");
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config.memSpec.tXP = clk * queryUIntParameter(timings, "XP");
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config.memSpec.tXPDLL = clk * queryUIntParameter(timings, "XPDLL");
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config.memSpec.tXSR = clk * queryUIntParameter(timings, "XS");
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config.memSpec.tXSRDLL = clk * queryUIntParameter(timings, "XSDLL");
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config.memSpec.tAL = clk * queryUIntParameter(timings, "AL");
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config.memSpec.tRFC = clk * queryUIntParameter(timings, "RFC");
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config.memSpec.tREFI = clk * queryUIntParameter(timings, "REFI");
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config.Timings.refreshTimings.clear();
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for (unsigned int i = 0; i < config.NumberOfBanks; ++i)
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config.memSpec.refreshTimings.clear();
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for (unsigned int i = 0; i < config.memSpec.NumberOfBanks; ++i)
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{
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config.Timings.refreshTimings[Bank(i)] = RefreshTiming(config.Timings.tRFC, config.Timings.tREFI);
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config.memSpec.refreshTimings[Bank(i)] = RefreshTiming(config.memSpec.tRFC, config.memSpec.tREFI);
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}
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}
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@@ -131,48 +131,48 @@ void MemSpecLoader::loadWideIO(Configuration& config, XMLElement* memspec)
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//MemSpecification
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XMLElement* architecture = memspec->FirstChildElement("memarchitecturespec");
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config.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
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config.NumberOfBankGroups = 1;
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config.BurstLength = queryUIntParameter(architecture, "burstLength");
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config.nActivate = 2;
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config.DataRate = queryUIntParameter(architecture, "dataRate");
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config.NumberOfRows = queryUIntParameter(architecture, "nbrOfRows");
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config.memSpec.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
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config.memSpec.NumberOfBankGroups = 1;
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config.memSpec.BurstLength = queryUIntParameter(architecture, "burstLength");
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config.memSpec.nActivate = 2;
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config.memSpec.DataRate = queryUIntParameter(architecture, "dataRate");
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config.memSpec.NumberOfRows = queryUIntParameter(architecture, "nbrOfRows");
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//MemTimings
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XMLElement* timings = memspec->FirstChildElement("memtimingspec");
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double clkMhz = queryDoubleParameter(timings, "clkMhz");
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sc_time clk = sc_time(1 / clkMhz, SC_US);
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config.Timings.clk = clk;
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config.memSpec.clk = clk;
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config.Timings.tRP = clk * queryUIntParameter(timings, "RP");
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config.Timings.tRAS = clk * queryUIntParameter(timings, "RAS");
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config.Timings.tRC = clk * queryUIntParameter(timings, "RC");
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config.Timings.tRRD_S = clk * queryUIntParameter(timings, "RRD");
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config.Timings.tRRD_L = config.Timings.tRRD_S;
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config.Timings.tCCD_S = clk * queryUIntParameter(timings, "CCD");
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config.Timings.tCCD_L = config.Timings.tCCD_S;
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config.Timings.tRCD = clk * queryUIntParameter(timings, "RCD");
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config.Timings.tNAW = clk * queryUIntParameter(timings, "TAW");
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config.Timings.tRL = clk * queryUIntParameter(timings, "RL");
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config.Timings.tWL = clk * queryUIntParameter(timings, "WL");
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config.Timings.tWR = clk * queryUIntParameter(timings, "WR");
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config.Timings.tWTR_S = clk * queryUIntParameter(timings, "WTR");
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config.Timings.tWTR_L = config.Timings.tWTR_S;
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config.Timings.tRTP = clk * queryUIntParameter(timings, "RTP");
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config.Timings.tCKESR = clk * queryUIntParameter(timings, "CKESR");
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config.Timings.tCKE = clk * queryUIntParameter(timings, "CKE");
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config.Timings.tXP = clk * queryUIntParameter(timings, "XP");
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config.Timings.tXPDLL = config.Timings.tXP;
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config.Timings.tXSR = clk * queryUIntParameter(timings, "XS");
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config.Timings.tXSRDLL = config.Timings.tXSR;
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config.Timings.tAL = clk * queryUIntParameter(timings, "AL");
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config.Timings.tRFC = clk * queryUIntParameter(timings, "RFC");
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config.Timings.tREFI = clk * queryUIntParameter(timings, "REFI");
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config.memSpec.tRP = clk * queryUIntParameter(timings, "RP");
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config.memSpec.tRAS = clk * queryUIntParameter(timings, "RAS");
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config.memSpec.tRC = clk * queryUIntParameter(timings, "RC");
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config.memSpec.tRRD_S = clk * queryUIntParameter(timings, "RRD");
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config.memSpec.tRRD_L = config.memSpec.tRRD_S;
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config.memSpec.tCCD_S = clk * queryUIntParameter(timings, "CCD");
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config.memSpec.tCCD_L = config.memSpec.tCCD_S;
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config.memSpec.tRCD = clk * queryUIntParameter(timings, "RCD");
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config.memSpec.tNAW = clk * queryUIntParameter(timings, "TAW");
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config.memSpec.tRL = clk * queryUIntParameter(timings, "RL");
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config.memSpec.tWL = clk * queryUIntParameter(timings, "WL");
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config.memSpec.tWR = clk * queryUIntParameter(timings, "WR");
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config.memSpec.tWTR_S = clk * queryUIntParameter(timings, "WTR");
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config.memSpec.tWTR_L = config.memSpec.tWTR_S;
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config.memSpec.tRTP = clk * queryUIntParameter(timings, "RTP");
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config.memSpec.tCKESR = clk * queryUIntParameter(timings, "CKESR");
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config.memSpec.tCKE = clk * queryUIntParameter(timings, "CKE");
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config.memSpec.tXP = clk * queryUIntParameter(timings, "XP");
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config.memSpec.tXPDLL = config.memSpec.tXP;
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config.memSpec.tXSR = clk * queryUIntParameter(timings, "XS");
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config.memSpec.tXSRDLL = config.memSpec.tXSR;
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config.memSpec.tAL = clk * queryUIntParameter(timings, "AL");
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config.memSpec.tRFC = clk * queryUIntParameter(timings, "RFC");
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config.memSpec.tREFI = clk * queryUIntParameter(timings, "REFI");
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config.Timings.refreshTimings.clear();
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for (unsigned int i = 0; i < config.NumberOfBanks; ++i)
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config.memSpec.refreshTimings.clear();
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for (unsigned int i = 0; i < config.memSpec.NumberOfBanks; ++i)
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{
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config.Timings.refreshTimings[Bank(i)] = RefreshTiming(config.Timings.tRFC, config.Timings.tREFI);
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config.memSpec.refreshTimings[Bank(i)] = RefreshTiming(config.memSpec.tRFC, config.memSpec.tREFI);
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}
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}
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