doc improved
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20
README.md
20
README.md
@@ -909,10 +909,10 @@ there are no pending requests in the memory controller's buffer. This can be
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done in order to prepare for possible accesses that might happen in the
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future. When a burst of REF commands is initiated a REF command is issued (due
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to the current tREFIx) followed by one or more REF commands separated in time
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by tRFCx. If, at any point, requests start coming in, the burst is
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interrupted, meaning that the maximum amount of time, considering the worst
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case scenario (a request arrives at the same time a REF was issued), is a
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refresh cycle time (tRFCx).
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by tRFCx. The burst is interrupted if requests arrive, meaning that the
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maximum additional delay for a request (considering the worst case scenario in
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which a request arrives at the same time a REF is issued) is a refresh cycle
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time (tRFCx).
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The advantage of pulling-in refreshes is that they will not be issued in the
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near future, i.e., in their actual times multiples of tREFIx, allowing for
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@@ -926,12 +926,12 @@ controller's buffer. Buffered requests may generate row-hits, so postponing
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refreshes may be beneficial for it avoids breaking row-hit sequences what
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reduces the number of commands (e.g., ACT, PRE) to carry out the memory
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accesses and improves the overall system preformance because accesses that are
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row-hits consume less time. If the memory is idle, in the next refresh
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interval (tREFIx) a burst is issued for the same number of REF commands
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postponed plus the actual refresh for that tREFIx. When the maximum number of
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postponed refreshes is reached a burst is issued in the next tREFIx despite
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the state of the memory controller's buffer (empty or not). A burst of
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postponed refreshes cannot be interrupted.
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row-hits consume less time. After postponing refreshes, if there are no
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pending requests in the next refresh interval (tREFIx) a burst is issued for
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the same number of REF commands postponed plus the actual refresh for that
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tREFIx. When the maximum number of postponed refreshes is reached a burst is
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issued in the next tREFIx despite the state of the memory controller's buffer
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(empty or not). A burst of postponed refreshes cannot be interrupted.
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**The Flexible Refresh FSM**
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