Readme file updated: added info about simulation setups.
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56
README.md
56
README.md
@@ -116,9 +116,11 @@ The XML code below shows a typic configuration:
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<simulation>
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<simconfig>
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<Debug value="1" />
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<DatabaseRecording value="1" />
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<PowerAnalysis value="1" />
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<Debug value="1"/>
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<DatabaseRecording value="1"/>
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<PowerAnalysis value="1"/>
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<NumberOfTracePlayers value="5"/>
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<NumberOfMemChannels value="1"/>
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</simconfig>
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<memspecs>
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@@ -134,7 +136,16 @@ The XML code below shows a typic configuration:
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</memconfigs>
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<tracesetups>
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<!-- Multiple trace setups are allowed for the same simulation setup -->
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<tracesetup id="fifo">
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<!--
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Specify here a trace file for each of the trace players. Trace
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players without a file will not generate transactions.
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It is also possible to choose "cklMhz" and the "bl" for every
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player.
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-->
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<device clkMhz="200">voco2.stl</device>
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<device clkMhz="200">voco2.stl</device>
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<device clkMhz="200">voco2.stl</device>
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</tracesetup>
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</tracesetups>
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@@ -150,6 +161,34 @@ The XML configuration files are parsed by the program and the configuration
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details extracted are assigned to the correspondent attributes of the internal
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configuration structure.
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#### Simulation Setups
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Every possible combination of **memory specification**, **address mapping**
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and **memory configuration** corresponds to a **simulation setup**.
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Each of the **trace setups** listed in the configuration is added to every
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simulation setup.
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A **trace setup** is composed of an id string and one or more **devices**.
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A **device** configuration consists of two configuration fields - clkMhz
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(operation frequence for this device) and bl (burst length) - and a
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**trace file**.
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A **trace file** is a pre-recorded file containing memory transactions. All
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memory transactions have a timestamp that tells the simulator when they shall
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happen, a transaction type (e.g.: read, write) and a memory address.
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A **trace player** is the **equivalent** to bus master **device**, i.e. a
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device that locks a bus and generates memory transactions. The **device**
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section within a **trace setup** makes it is possible to add a trace file, and
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specify the operation frequence and the burst length as well, for each of the
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trace players. Trace players without a corresponding device configuration will
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not generate transactions.
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**DRAMSys** executes all the simulation setups within the configuration file
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providing **flexibility** for **exhaustive explorations.**
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#### Configuration File Sections
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The main configuration file is divided into self-contained sections, each of
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@@ -168,6 +207,10 @@ Below are listed the configuration sections and configuration fields.
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- *PowerAnalysis* (boolean)
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- "1": enables live power analysis with the DRAMPower tool
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- "0": disables power analysis
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- *NumberOfTracePlayers* (unsigned int)
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- Number of trace players
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- *NumberOfMemChannels* (unsigned int)
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- Number of memory channels
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- **Memory specification**
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@@ -265,10 +308,15 @@ Below are listed the configuration sections and configuration fields.
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- **Trace setups**
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- *id* (string)
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- Trace setup id. Two files are generated by DRAMSys: an SQLite database
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file ".tdb" and a text file ".txt" containing the program output. The
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file (.tdb) and a text file (.txt) containing the program output. The
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name of these files comes from this field.
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- *clkMhz*
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- Speed of the trace player
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- *bl*
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- Burst length
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- *trace file*
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- A pre-recorded file containing memory transactions to be executed by a
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trace player.
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Some attributes are self-explanatory while others require some previous
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knowhow of memory technologies or some knowledge of the simulator source code.
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