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Insert payload into scheduler after END_REQ.

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This commit is contained in:
Lukas Steiner
2021-01-14 09:50:12 +01:00
parent 2845ebabc6
commit e5e65a9323
3 changed files with 52 additions and 66 deletions
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110
DRAMSys/library/src/controller/Controller.cpp
View File

@@ -221,40 +221,37 @@ Controller::~Controller()
void Controller::controllerMethod()
{
// (1) Release payload if arbiter has accepted the result (finish END_RESP)
finishEndResp();
// (1) Finish last response (END_RESP) and start new response (BEGIN_RESP)
manageResponses();
// (2) Send next result to arbiter (start BEGIN_RESP)
startBeginResp();
// (2) Insert new request into scheduler and send END_REQ or use backpressure
manageRequests();
// (3) Insert new request from arbiter into scheduler and restart appropriate BM (finish BEGIN_REQ)
finishBeginReq();
// (4) Start refresh and power-down managers to issue requests for the current time
// (3) Start refresh and power-down managers to issue requests for the current time
for (auto it : refreshManagers)
it->start();
for (auto it : powerDownManagers)
it->start();
// (5) Collect all ready commands from BMs, RMs and PDMs
// (4) Collect all ready commands from BMs, RMs and PDMs
CommandTuple::Type commandTuple;
// clear command buffer
readyCommands.clear();
for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++)
{
// (5.1) Check for power-down commands (PDEA/PDEP/SREFEN or PDXA/PDXP/SREFEX)
// (4.1) Check for power-down commands (PDEA/PDEP/SREFEN or PDXA/PDXP/SREFEX)
commandTuple = powerDownManagers[rankID]->getNextCommand();
if (std::get<CommandTuple::Command>(commandTuple) != Command::NOP)
readyCommands.emplace_back(commandTuple);
else
{
// (5.2) Check for refresh commands (PREA/PRE or REFA/REFB)
// (4.2) Check for refresh commands (PREA/PRE or REFA/REFB)
commandTuple = refreshManagers[rankID]->getNextCommand();
if (std::get<CommandTuple::Command>(commandTuple) != Command::NOP)
readyCommands.emplace_back(commandTuple);
// (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA)
// (4.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA)
for (auto it : bankMachinesOnRank[rankID])
{
commandTuple = it->getNextCommand();
@@ -264,7 +261,7 @@ void Controller::controllerMethod()
}
}
// (6) Select one of the ready commands and issue it to the DRAM
// (5) Select one of the ready commands and issue it to the DRAM
bool readyCmdBlocked = false;
if (!readyCommands.empty())
{
@@ -316,10 +313,7 @@ void Controller::controllerMethod()
readyCmdBlocked = true;
}
// (7) Accept request from arbiter if scheduler is not full, otherwise backpressure (start END_REQ)
startEndReq();
// (8) Restart bank machines, refresh managers and power-down managers to issue new requests for the future
// (6) Restart bank machines, refresh managers and power-down managers to issue new requests for the future
sc_time timeForNextTrigger = sc_max_time();
for (auto it : bankMachines)
{
@@ -373,49 +367,59 @@ unsigned int Controller::transport_dbg(tlm_generic_payload &trans)
return iSocket->transport_dbg(trans);
}
void Controller::finishBeginReq()
void Controller::manageRequests()
{
if (transToAcquire.payload != nullptr && transToAcquire.time <= sc_time_stamp())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToAcquire.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " entered system.");
if (totalNumberOfPayloads == 0)
idleTimeCollector.end();
totalNumberOfPayloads++;
Rank rank = DramExtension::getRank(transToAcquire.payload);
if (ranksNumberOfPayloads[rank.ID()] == 0)
powerDownManagers[rank.ID()]->triggerExit();
ranksNumberOfPayloads[rank.ID()]++;
scheduler->storeRequest(transToAcquire.payload);
transToAcquire.payload->acquire();
transToAcquire.time = sc_max_time();
Bank bank = DramExtension::getBank(transToAcquire.payload);
bankMachines[bank.ID()]->start();
}
}
void Controller::startEndReq()
{
if (transToAcquire.payload != nullptr && transToAcquire.time == sc_max_time())
{
if (scheduler->hasBufferSpace())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToAcquire.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " entered system.");
if (totalNumberOfPayloads == 0)
idleTimeCollector.end();
totalNumberOfPayloads++;
Rank rank = DramExtension::getRank(transToAcquire.payload);
if (ranksNumberOfPayloads[rank.ID()] == 0)
powerDownManagers[rank.ID()]->triggerExit();
ranksNumberOfPayloads[rank.ID()]++;
scheduler->storeRequest(transToAcquire.payload);
transToAcquire.payload->acquire();
//transToAcquire.time = sc_max_time();
Bank bank = DramExtension::getBank(transToAcquire.payload);
bankMachines[bank.ID()]->start();
transToAcquire.payload->set_response_status(TLM_OK_RESPONSE);
sendToFrontend(transToAcquire.payload, END_REQ);
transToAcquire.payload = nullptr;
}
else
{
PRINTDEBUGMESSAGE(name(), "Total number of payloads exceeded, backpressure!");
}
}
}
void Controller::startBeginResp()
void Controller::manageResponses()
{
if (transToRelease.payload != nullptr && transToRelease.time <= sc_time_stamp())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToRelease.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " left system.");
transToRelease.payload->release();
transToRelease.payload = nullptr;
totalNumberOfPayloads--;
if (totalNumberOfPayloads == 0)
idleTimeCollector.start();
}
if (transToRelease.payload == nullptr)
{
transToRelease.payload = respQueue->nextPayload();
@@ -435,22 +439,6 @@ void Controller::startBeginResp()
}
}
void Controller::finishEndResp()
{
if (transToRelease.payload != nullptr && transToRelease.time <= sc_time_stamp())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToRelease.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " left system.");
transToRelease.payload->release();
transToRelease.payload = nullptr;
totalNumberOfPayloads--;
if (totalNumberOfPayloads == 0)
idleTimeCollector.start();
}
}
void Controller::sendToFrontend(tlm_generic_payload *payload, tlm_phase phase)
{
sc_time delay = SC_ZERO_TIME;

6
DRAMSys/library/src/controller/Controller.h
View File

@@ -98,10 +98,8 @@ private:
sc_time time = sc_max_time();
} transToAcquire, transToRelease;
void finishBeginReq();
void startEndReq();
void startBeginResp();
void finishEndResp();
void manageResponses();
void manageRequests();
sc_event beginReqEvent, endRespEvent, controllerEvent, dataResponseEvent;
};

2
DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.h
View File

@@ -51,7 +51,7 @@ public:
private:
const unsigned requestBufferSize;
std::vector<unsigned> numRequestsOnBank;
unsigned lastBankID;
unsigned lastBankID = 0;
};
#endif // BUFFERCOUNTERBANKWISE_H