all memspec files updated
This commit is contained in:
62
DRAMSys/library/resources/configs/memspecs/DDR4.json
Normal file
62
DRAMSys/library/resources/configs/memspecs/DDR4.json
Normal file
@@ -0,0 +1,62 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 8,
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"dataRate": 2,
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"nbrOfBankGroups": 4,
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"nbrOfBanks": 16,
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"nbrOfColumns": 1024,
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"nbrOfRanks": 1,
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"nbrOfRows": 32768,
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"width": 8
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},
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"memoryId": "MICRON_4Gb_DDR4-2400_8bit_A",
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"memoryType": "DDR4",
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"mempowerspec": {
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"idd0": 60.75,
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"idd02": 4.05,
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"idd2n": 38.25,
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"idd2p0": 17.0,
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"idd2p1": 17.0,
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"idd3n": 44.0,
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"idd3p0": 22.5,
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"idd3p1": 22.5,
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"idd4r": 184.5,
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"idd4w": 168.75,
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"idd5": 118.0,
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"idd6": 20.25,
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"idd62": 2.6,
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"vdd": 1.2,
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"vdd2": 2.5
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},
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"memtimingspec": {
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"AL": 0,
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"CCD_L": 6,
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"CCD_S": 4,
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"CKE": 6,
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"CKESR": 7,
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"CL": 16,
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"DQSCK": 2,
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"FAW": 26,
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"RAS": 39,
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"RC": 55,
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"RCD": 16,
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"REFI": 4680,
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"RFC": 313,
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"RL": 16,
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"RP": 16,
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"RRD_L": 6,
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"RRD_S": 4,
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"RTP": 12,
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"WL": 16,
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"WR": 18,
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"WTR_L": 9,
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"WTR_S": 3,
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"XP": 8,
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"XPDLL": 325,
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"XS": 324,
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"XSDLL": 512,
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"clkMhz": 1200
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}
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}
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}
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@@ -1,61 +0,0 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<memspec>
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<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-2400_8bit_A" />
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<parameter id="memoryType" type="string" value="DDR4" />
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<memarchitecturespec>
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<parameter id="width" type="uint" value="8" />
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<parameter id="nbrOfBankGroups" type="uint" value="4" />
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<parameter id="nbrOfBanks" type="uint" value="16" />
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<parameter id="nbrOfRanks" type="uint" value="1" />
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<parameter id="nbrOfColumns" type="uint" value="1024" />
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<parameter id="nbrOfRows" type="uint" value="32768" />
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<parameter id="dataRate" type="uint" value="2" />
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<parameter id="burstLength" type="uint" value="8" />
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</memarchitecturespec>
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<memtimingspec>
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<parameter id="clkMhz" type="double" value="1200" />
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<parameter id="REFI" type="uint" value="4680" />
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<parameter id="RFC" type="uint" value="313" />
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<parameter id="RL" type="uint" value="16" />
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<parameter id="WL" type="uint" value="16" />
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<parameter id="CL" type="uint" value="16" />
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<parameter id="AL" type="uint" value="0" />
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<parameter id="RP" type="uint" value="16" />
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<parameter id="RAS" type="uint" value="39" />
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<parameter id="RCD" type="uint" value="16" />
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<parameter id="RC" type="uint" value="55" />
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<parameter id="FAW" type="uint" value="26" />
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<parameter id="RTP" type="uint" value="12" />
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<parameter id="WR" type="uint" value="18" />
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<parameter id="RRD_S" type="uint" value="4" />
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<parameter id="RRD_L" type="uint" value="6" />
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<parameter id="CCD_S" type="uint" value="4" />
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<parameter id="CCD_L" type="uint" value="6" />
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<parameter id="WTR_S" type="uint" value="3" />
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<parameter id="WTR_L" type="uint" value="9" />
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<parameter id="DQSCK" type="uint" value="2" />
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<parameter id="XP" type="uint" value="8" />
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<parameter id="XPDLL" type="uint" value="325" />
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<parameter id="XS" type="uint" value="324" />
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<parameter id="XSDLL" type="uint" value="512" />
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<parameter id="CKE" type="uint" value="6" />
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<parameter id="CKESR" type="uint" value="7" />
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</memtimingspec>
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<mempowerspec>
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<parameter id="idd0" type="double" value="60.75" />
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<parameter id="idd02" type="double" value="4.05" />
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<parameter id="idd2p0" type="double" value="17.0" />
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<parameter id="idd2p1" type="double" value="17.0" />
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<parameter id="idd2n" type="double" value="38.25" />
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<parameter id="idd3p0" type="double" value="22.5" />
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<parameter id="idd3p1" type="double" value="22.5" />
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<parameter id="idd3n" type="double" value="44.0" />
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<parameter id="idd4r" type="double" value="184.5" />
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<parameter id="idd4w" type="double" value="168.75" />
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<parameter id="idd5" type="double" value="118.0" />
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<parameter id="idd6" type="double" value="20.25" />
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<parameter id="idd62" type="double" value="2.6" />
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<parameter id="vdd" type="double" value="1.2" />
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<parameter id="vdd2" type="double" value="2.5" />
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</mempowerspec>
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</memspec>
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46
DRAMSys/library/resources/configs/memspecs/HBM2.json
Normal file
46
DRAMSys/library/resources/configs/memspecs/HBM2.json
Normal file
@@ -0,0 +1,46 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 4,
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"dataRate": 2,
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"nbrOfBankGroups": 4,
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"nbrOfBanks": 16,
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"nbrOfColumns": 128,
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"nbrOfRanks": 2,
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"nbrOfRows": 32768,
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"width": 64
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},
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"memoryId": "https://www.computerbase.de/2019-05/amd-memory-tweak-vram-oc/#bilder",
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"memoryType": "HBM2",
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"memtimingspec": {
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"CCDL": 3,
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"CCDS": 2,
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"CKE": 8,
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"DQSCK": 1,
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"FAW": 16,
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"PL": 0,
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"RAS": 28,
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"RC": 42,
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"RCDRD": 12,
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"RCDWR": 6,
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"REFI": 3900,
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"REFISB": 244,
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"RFC": 220,
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"RFCSB": 96,
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"RL": 17,
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"RP": 14,
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"RRDL": 6,
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"RRDS": 4,
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"RREFD": 8,
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"RTP": 5,
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"RTW": 18,
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"WL": 7,
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"WR": 14,
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"WTRL": 9,
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"WTRS": 4,
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"XP": 8,
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"XS": 216,
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"clkMhz": 1000
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}
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}
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}
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@@ -1,49 +0,0 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<!--8GiB, 8 channels, 1GiB per channel-->
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<memspec>
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<parameter id="memoryId" type="string" value="https://www.computerbase.de/2019-05/amd-memory-tweak-vram-oc/#bilder" />
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<parameter id="memoryType" type="string" value="HBM2" />
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<memarchitecturespec>
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<parameter id="width" type="uint" value="64" />
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<parameter id="nbrOfBanks" type="uint" value="16" />
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<parameter id="nbrOfBankGroups" type="uint" value="4" />
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<parameter id="nbrOfRanks" type="uint" value="2" />
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<parameter id="nbrOfColumns" type="uint" value="128" />
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<parameter id="nbrOfRows" type="uint" value="32768" />
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<parameter id="dataRate" type="uint" value="2" />
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<parameter id="burstLength" type="uint" value="4" />
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</memarchitecturespec>
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<memtimingspec>
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<parameter id="clkMhz" type="double" value="1000" />
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<parameter id="DQSCK" type="uint" value="1" />
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<parameter id="RC" type="uint" value="42" />
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<parameter id="RAS" type="uint" value="28" />
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<parameter id="RCDRD" type="uint" value="12" />
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<parameter id="RCDWR" type="uint" value="6" />
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<parameter id="RRDL" type="uint" value="6" />
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<parameter id="RRDS" type="uint" value="4" />
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<parameter id="FAW" type="uint" value="16" />
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<parameter id="RTP" type="uint" value="5" />
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<parameter id="RP" type="uint" value="14" />
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<parameter id="RL" type="uint" value="17" />
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<parameter id="WL" type="uint" value="7" />
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<parameter id="PL" type="uint" value="0" />
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<parameter id="WR" type="uint" value="14" />
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<parameter id="CCDL" type="uint" value="3" />
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<parameter id="CCDS" type="uint" value="2" />
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<parameter id="WTRL" type="uint" value="9" />
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<parameter id="WTRS" type="uint" value="4" />
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<parameter id="RTW" type="uint" value="18" />
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<parameter id="XP" type="uint" value="8" />
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<parameter id="CKE" type="uint" value="8" />
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<parameter id="XS" type="uint" value="216" />
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<parameter id="RFC" type="uint" value="220" />
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<parameter id="RFCSB" type="uint" value="96" />
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<parameter id="RREFD" type="uint" value="8" />
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<parameter id="REFI" type="uint" value="3900" />
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<parameter id="REFISB" type="uint" value="244" />
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</memtimingspec>
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<mempowerspec>
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<!-- to be completed -->
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</mempowerspec>
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</memspec>
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@@ -1 +1,64 @@
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{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "JEDEC_256Mb_WIDEIO_SDR-200_128bit"}, {"@id": "memoryType", "@type": "string", "@value": "WIDEIO_SDR"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "128"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "4"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "128"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "4096"}, {"@id": "dataRate", "@type": "uint", "@value": "1"}, {"@id": "burstLength", "@type": "uint", "@value": "4"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "200"}, {"@id": "RC", "@type": "uint", "@value": "12"}, {"@id": "RCD", "@type": "uint", "@value": "4"}, {"@id": "RL", "@type": "uint", "@value": "3"}, {"@id": "RP", "@type": "uint", "@value": "4"}, {"@id": "RFC", "@type": "uint", "@value": "18"}, {"@id": "RAS", "@type": "uint", "@value": "9"}, {"@id": "WL", "@type": "uint", "@value": "1"}, {"@id": "DQSCK", "@type": "uint", "@value": "1"}, {"@id": "AC", "@type": "uint", "@value": "1"}, {"@id": "WR", "@type": "uint", "@value": "3"}, {"@id": "XP", "@type": "uint", "@value": "2"}, {"@id": "XS", "@type": "uint", "@value": "20"}, {"@id": "REFI", "@type": "uint", "@value": "3120"}, {"@id": "TAW", "@type": "uint", "@value": "10"}, {"@id": "RRD", "@type": "uint", "@value": "2"}, {"@id": "CCD_R", "@type": "uint", "@value": "2"}, {"@id": "CCD_W", "@type": "uint", "@value": "1"}, {"@id": "WTR", "@type": "uint", "@value": "3"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "3"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "5.88"}, {"@id": "idd02", "@type": "double", "@value": "21.18"}, {"@id": "idd2p0", "@type": "double", "@value": "0.05"}, {"@id": "idd2p02", "@type": "double", "@value": "0.17"}, {"@id": "idd2p1", "@type": "double", "@value": "0.05"}, {"@id": "idd2p12", "@type": "double", "@value": "0.17"}, {"@id": "idd2n", "@type": "double", "@value": "0.13"}, {"@id": "idd2n2", "@type": "double", "@value": "4.04"}, {"@id": "idd3p0", "@type": "double", "@value": "0.25"}, {"@id": "idd3p02", "@type": "double", "@value": "1.49"}, {"@id": "idd3p1", "@type": "double", "@value": "0.25"}, {"@id": "idd3p12", "@type": "double", "@value": "1.49"}, {"@id": "idd3n", "@type": "double", "@value": "0.52"}, {"@id": "idd3n2", "@type": "double", "@value": "6.55"}, {"@id": "idd4r", "@type": "double", "@value": "1.41"}, {"@id": "idd4r2", "@type": "double", "@value": "85.73"}, {"@id": "idd4w", "@type": "double", "@value": "1.42"}, {"@id": "idd4w2", "@type": "double", "@value": "60.79"}, {"@id": "idd5", "@type": "double", "@value": "14.43"}, {"@id": "idd52", "@type": "double", "@value": "48.17"}, {"@id": "idd6", "@type": "double", "@value": "0.07"}, {"@id": "idd62", "@type": "double", "@value": "0.27"}, {"@id": "vdd", "@type": "double", "@value": "1.8"}, {"@id": "vdd2", "@type": "double", "@value": "1.2"}]}}}
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 4,
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"dataRate": 1,
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"nbrOfBanks": 4,
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||||
"nbrOfColumns": 128,
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||||
"nbrOfRanks": 1,
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||||
"nbrOfRows": 4096,
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||||
"width": 128
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},
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||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
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||||
"idd0": 5.88,
|
||||
"idd02": 21.18,
|
||||
"idd2n": 0.13,
|
||||
"idd2n2": 4.04,
|
||||
"idd2p0": 0.05,
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||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.52,
|
||||
"idd3n2": 6.55,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.41,
|
||||
"idd4r2": 85.73,
|
||||
"idd4w": 1.42,
|
||||
"idd4w2": 60.79,
|
||||
"idd5": 14.43,
|
||||
"idd52": 48.17,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AC": 1,
|
||||
"CCD_R": 2,
|
||||
"CCD_W": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 9,
|
||||
"RC": 12,
|
||||
"RCD": 4,
|
||||
"REFI": 3120,
|
||||
"RFC": 18,
|
||||
"RL": 3,
|
||||
"RP": 4,
|
||||
"RRD": 2,
|
||||
"TAW": 10,
|
||||
"WL": 1,
|
||||
"WR": 3,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XS": 20,
|
||||
"clkMhz": 200
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,64 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<!--BL 2/4, REFM 1/0.5/0.25-->
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-200_128bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="128" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="4" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="128" />
|
||||
<parameter id="nbrOfRows" type="uint" value="4096" />
|
||||
<parameter id="dataRate" type="uint" value="1" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="200" />
|
||||
<parameter id="RC" type="uint" value="12" />
|
||||
<parameter id="RCD" type="uint" value="4" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="RP" type="uint" value="4" />
|
||||
<parameter id="RFC" type="uint" value="18" />
|
||||
<parameter id="RAS" type="uint" value="9" />
|
||||
<parameter id="WL" type="uint" value="1" />
|
||||
<parameter id="DQSCK" type="uint" value="1" />
|
||||
<parameter id="AC" type="uint" value="1" />
|
||||
<parameter id="WR" type="uint" value="3" />
|
||||
<parameter id="XP" type="uint" value="2" />
|
||||
<parameter id="XS" type="uint" value="20" />
|
||||
<parameter id="REFI" type="uint" value="3120" />
|
||||
<parameter id="TAW" type="uint" value="10" />
|
||||
<parameter id="RRD" type="uint" value="2" />
|
||||
<parameter id="CCD_R" type="uint" value="2" />
|
||||
<parameter id="CCD_W" type="uint" value="1" />
|
||||
<parameter id="WTR" type="uint" value="3" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="3" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="5.88" />
|
||||
<parameter id="idd02" type="double" value="21.18" />
|
||||
<parameter id="idd2p0" type="double" value="0.05" />
|
||||
<parameter id="idd2p02" type="double" value="0.17" />
|
||||
<parameter id="idd2p1" type="double" value="0.05" />
|
||||
<parameter id="idd2p12" type="double" value="0.17" />
|
||||
<parameter id="idd2n" type="double" value="0.13" />
|
||||
<parameter id="idd2n2" type="double" value="4.04" />
|
||||
<parameter id="idd3p0" type="double" value="0.25" />
|
||||
<parameter id="idd3p02" type="double" value="1.49" />
|
||||
<parameter id="idd3p1" type="double" value="0.25" />
|
||||
<parameter id="idd3p12" type="double" value="1.49" />
|
||||
<parameter id="idd3n" type="double" value="0.52" />
|
||||
<parameter id="idd3n2" type="double" value="6.55" />
|
||||
<parameter id="idd4r" type="double" value="1.41" />
|
||||
<parameter id="idd4r2" type="double" value="85.73" />
|
||||
<parameter id="idd4w" type="double" value="1.42" />
|
||||
<parameter id="idd4w2" type="double" value="60.79" />
|
||||
<parameter id="idd5" type="double" value="14.43" />
|
||||
<parameter id="idd52" type="double" value="48.17" />
|
||||
<parameter id="idd6" type="double" value="0.07" />
|
||||
<parameter id="idd62" type="double" value="0.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,64 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 128,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 4096,
|
||||
"width": 128
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-266_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 6.06,
|
||||
"idd02": 21.82,
|
||||
"idd2n": 0.16,
|
||||
"idd2n2": 4.76,
|
||||
"idd2p0": 0.05,
|
||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.58,
|
||||
"idd3n2": 7.24,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.82,
|
||||
"idd4r2": 111.22,
|
||||
"idd4w": 1.82,
|
||||
"idd4w2": 78.0,
|
||||
"idd5": 14.48,
|
||||
"idd52": 48.34,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AC": 1,
|
||||
"CCD_R": 2,
|
||||
"CCD_W": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"DQSCK": 1,
|
||||
"RAS": 12,
|
||||
"RC": 16,
|
||||
"RCD": 5,
|
||||
"REFI": 4160,
|
||||
"RFC": 24,
|
||||
"RL": 3,
|
||||
"RP": 5,
|
||||
"RRD": 3,
|
||||
"TAW": 14,
|
||||
"WL": 1,
|
||||
"WR": 4,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XS": 27,
|
||||
"clkMhz": 266
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,64 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<!--BL 2/4, REFM 1/0.5/0.25-->
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-266_128bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="128" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="4" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="128" />
|
||||
<parameter id="nbrOfRows" type="uint" value="4096" />
|
||||
<parameter id="dataRate" type="uint" value="1" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="266" />
|
||||
<parameter id="RC" type="uint" value="16" />
|
||||
<parameter id="RCD" type="uint" value="5" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="RP" type="uint" value="5" />
|
||||
<parameter id="RFC" type="uint" value="24" />
|
||||
<parameter id="RAS" type="uint" value="12" />
|
||||
<parameter id="WL" type="uint" value="1" />
|
||||
<parameter id="DQSCK" type="uint" value="1" />
|
||||
<parameter id="AC" type="uint" value="1" />
|
||||
<parameter id="WR" type="uint" value="4" />
|
||||
<parameter id="XP" type="uint" value="3" />
|
||||
<parameter id="XS" type="uint" value="27" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="TAW" type="uint" value="14" />
|
||||
<parameter id="RRD" type="uint" value="3" />
|
||||
<parameter id="CCD_R" type="uint" value="2" />
|
||||
<parameter id="CCD_W" type="uint" value="1" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="6.06" />
|
||||
<parameter id="idd02" type="double" value="21.82" />
|
||||
<parameter id="idd2p0" type="double" value="0.05" />
|
||||
<parameter id="idd2p02" type="double" value="0.17" />
|
||||
<parameter id="idd2p1" type="double" value="0.05" />
|
||||
<parameter id="idd2p12" type="double" value="0.17" />
|
||||
<parameter id="idd2n" type="double" value="0.16" />
|
||||
<parameter id="idd2n2" type="double" value="4.76" />
|
||||
<parameter id="idd3p0" type="double" value="0.25" />
|
||||
<parameter id="idd3p02" type="double" value="1.49" />
|
||||
<parameter id="idd3p1" type="double" value="0.25" />
|
||||
<parameter id="idd3p12" type="double" value="1.49" />
|
||||
<parameter id="idd3n" type="double" value="0.58" />
|
||||
<parameter id="idd3n2" type="double" value="7.24" />
|
||||
<parameter id="idd4r" type="double" value="1.82" />
|
||||
<parameter id="idd4r2" type="double" value="111.22" />
|
||||
<parameter id="idd4w" type="double" value="1.82" />
|
||||
<parameter id="idd4w2" type="double" value="78.0" />
|
||||
<parameter id="idd5" type="double" value="14.48" />
|
||||
<parameter id="idd52" type="double" value="48.34" />
|
||||
<parameter id="idd6" type="double" value="0.07" />
|
||||
<parameter id="idd62" type="double" value="0.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 128,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 2048,
|
||||
"width": 128
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 5.88,
|
||||
"idd02": 21.18,
|
||||
"idd2n": 0.13,
|
||||
"idd2n2": 4.04,
|
||||
"idd2p0": 0.05,
|
||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.52,
|
||||
"idd3n2": 6.55,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.41,
|
||||
"idd4r2": 85.73,
|
||||
"idd4w": 1.42,
|
||||
"idd4w2": 60.79,
|
||||
"idd5": 14.43,
|
||||
"idd52": 48.17,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 3,
|
||||
"CL": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 9,
|
||||
"RC": 12,
|
||||
"RCD": 4,
|
||||
"REFI": 3120,
|
||||
"RFC": 18,
|
||||
"RL": 3,
|
||||
"RP": 4,
|
||||
"RRD": 2,
|
||||
"RTP": 4,
|
||||
"TAW": 10,
|
||||
"WL": 1,
|
||||
"WR": 3,
|
||||
"WTR": 4,
|
||||
"XP": 2,
|
||||
"XPDLL": 2,
|
||||
"XS": 20,
|
||||
"XSDLL": 20,
|
||||
"clkMhz": 200
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml
|
||||
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 128,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 2048,
|
||||
"width": 128
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-266_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 6.06,
|
||||
"idd02": 21.82,
|
||||
"idd2n": 0.16,
|
||||
"idd2n2": 4.76,
|
||||
"idd2p0": 0.05,
|
||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.58,
|
||||
"idd3n2": 7.24,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.82,
|
||||
"idd4r2": 111.22,
|
||||
"idd4w": 1.82,
|
||||
"idd4w2": 78.0,
|
||||
"idd5": 14.48,
|
||||
"idd52": 48.34,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 6,
|
||||
"CL": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 12,
|
||||
"RC": 16,
|
||||
"RCD": 5,
|
||||
"REFI": 3120,
|
||||
"RFC": 24,
|
||||
"RL": 3,
|
||||
"RP": 5,
|
||||
"RRD": 3,
|
||||
"RTP": 4,
|
||||
"TAW": 14,
|
||||
"WL": 1,
|
||||
"WR": 4,
|
||||
"WTR": 6,
|
||||
"XP": 3,
|
||||
"XPDLL": 3,
|
||||
"XS": 27,
|
||||
"XSDLL": 27,
|
||||
"clkMhz": 266
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/JEDEC_256Mb_WIDEIO_SDR-266_128bit.xml
|
||||
@@ -0,0 +1,64 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-1866_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 56.25,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 33.75,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 39.5,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 157.5,
|
||||
"idd4w": 135.0,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 5,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 13,
|
||||
"DQSCK": 2,
|
||||
"FAW": 22,
|
||||
"RAS": 32,
|
||||
"RC": 45,
|
||||
"RCD": 13,
|
||||
"REFI": 7280,
|
||||
"RFC": 243,
|
||||
"RFC2": 150,
|
||||
"RFC4": 103,
|
||||
"RL": 13,
|
||||
"RP": 13,
|
||||
"RRD_L": 5,
|
||||
"RRD_S": 4,
|
||||
"RTP": 8,
|
||||
"WL": 12,
|
||||
"WR": 14,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 255,
|
||||
"XS": 252,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 933
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,64 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-1866_8bit_A" />
|
||||
<parameter id="memoryType" type="string" value="DDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBankGroups" type="uint" value="4" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="16" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="933" />
|
||||
<parameter id="REFI" type="uint" value="7280" />
|
||||
<parameter id="RFC" type="uint" value="243" />
|
||||
<parameter id="RFC2" type="uint" value="150" />
|
||||
<parameter id="RFC4" type="uint" value="103" />
|
||||
<parameter id="RL" type="uint" value="13" />
|
||||
<parameter id="WL" type="uint" value="12" />
|
||||
<parameter id="CL" type="uint" value="13" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="13" />
|
||||
<parameter id="RAS" type="uint" value="32" />
|
||||
<parameter id="RCD" type="uint" value="13" />
|
||||
<parameter id="RC" type="uint" value="45" />
|
||||
<parameter id="FAW" type="uint" value="22" />
|
||||
<parameter id="RTP" type="uint" value="8" />
|
||||
<parameter id="WR" type="uint" value="14" />
|
||||
<parameter id="RRD_S" type="uint" value="4" />
|
||||
<parameter id="RRD_L" type="uint" value="5" />
|
||||
<parameter id="CCD_S" type="uint" value="4" />
|
||||
<parameter id="CCD_L" type="uint" value="5" />
|
||||
<parameter id="WTR_S" type="uint" value="3" />
|
||||
<parameter id="WTR_L" type="uint" value="7" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="8" />
|
||||
<parameter id="XPDLL" type="uint" value="255" />
|
||||
<parameter id="XS" type="uint" value="252" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="7" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="56.25" />
|
||||
<parameter id="idd02" type="double" value="4.05" />
|
||||
<parameter id="idd2p0" type="double" value="17.0" />
|
||||
<parameter id="idd2p1" type="double" value="17.0" />
|
||||
<parameter id="idd2n" type="double" value="33.75" />
|
||||
<parameter id="idd3p0" type="double" value="22.5" />
|
||||
<parameter id="idd3p1" type="double" value="22.5" />
|
||||
<parameter id="idd3n" type="double" value="39.5" />
|
||||
<parameter id="idd4r" type="double" value="157.5" />
|
||||
<parameter id="idd4w" type="double" value="135.0" />
|
||||
<parameter id="idd5" type="double" value="118.0" />
|
||||
<parameter id="idd6" type="double" value="20.25" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.2" />
|
||||
<parameter id="vdd2" type="double" value="2.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,64 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-2400_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.75,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 38.25,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 44.0,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 184.5,
|
||||
"idd4w": 168.75,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 6,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 16,
|
||||
"DQSCK": 2,
|
||||
"FAW": 26,
|
||||
"RAS": 39,
|
||||
"RC": 55,
|
||||
"RCD": 16,
|
||||
"REFI": 9360,
|
||||
"RFC": 312,
|
||||
"RFC2": 192,
|
||||
"RFC4": 132,
|
||||
"RL": 16,
|
||||
"RP": 16,
|
||||
"RRD_L": 6,
|
||||
"RRD_S": 4,
|
||||
"RTP": 12,
|
||||
"WL": 16,
|
||||
"WR": 18,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 325,
|
||||
"XS": 324,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 1200
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,64 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-2400_8bit_A" />
|
||||
<parameter id="memoryType" type="string" value="DDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBankGroups" type="uint" value="4" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="16" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="1200" />
|
||||
<parameter id="REFI" type="uint" value="9360" />
|
||||
<parameter id="RFC" type="uint" value="312" />
|
||||
<parameter id="RFC2" type="uint" value="192" />
|
||||
<parameter id="RFC4" type="uint" value="132" />
|
||||
<parameter id="RL" type="uint" value="16" />
|
||||
<parameter id="WL" type="uint" value="16" />
|
||||
<parameter id="CL" type="uint" value="16" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="16" />
|
||||
<parameter id="RAS" type="uint" value="39" />
|
||||
<parameter id="RCD" type="uint" value="16" />
|
||||
<parameter id="RC" type="uint" value="55" />
|
||||
<parameter id="FAW" type="uint" value="26" />
|
||||
<parameter id="RTP" type="uint" value="12" />
|
||||
<parameter id="WR" type="uint" value="18" />
|
||||
<parameter id="RRD_S" type="uint" value="4" />
|
||||
<parameter id="RRD_L" type="uint" value="6" />
|
||||
<parameter id="CCD_S" type="uint" value="4" />
|
||||
<parameter id="CCD_L" type="uint" value="6" />
|
||||
<parameter id="WTR_S" type="uint" value="3" />
|
||||
<parameter id="WTR_L" type="uint" value="9" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="8" />
|
||||
<parameter id="XPDLL" type="uint" value="325" />
|
||||
<parameter id="XS" type="uint" value="324" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="7" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="60.75" />
|
||||
<parameter id="idd02" type="double" value="4.05" />
|
||||
<parameter id="idd2p0" type="double" value="17.0" />
|
||||
<parameter id="idd2p1" type="double" value="17.0" />
|
||||
<parameter id="idd2n" type="double" value="38.25" />
|
||||
<parameter id="idd3p0" type="double" value="22.5" />
|
||||
<parameter id="idd3p1" type="double" value="22.5" />
|
||||
<parameter id="idd3n" type="double" value="44.0" />
|
||||
<parameter id="idd4r" type="double" value="184.5" />
|
||||
<parameter id="idd4w" type="double" value="168.75" />
|
||||
<parameter id="idd5" type="double" value="118.0" />
|
||||
<parameter id="idd6" type="double" value="20.25" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.2" />
|
||||
<parameter id="vdd2" type="double" value="2.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,40 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 512,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "JEDEC_4x64_2Gb_WIDEIO2-400_64bit",
|
||||
"memoryType": "WIDEIO2",
|
||||
"memtimingspec": {
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 6,
|
||||
"FAW": 24,
|
||||
"RAS": 17,
|
||||
"RCAB": 26,
|
||||
"RCD": 8,
|
||||
"RCPB": 24,
|
||||
"REFI": 1560,
|
||||
"REFM": 1,
|
||||
"RFCAB": 72,
|
||||
"RFCPB": 36,
|
||||
"RL": 7,
|
||||
"RPAB": 9,
|
||||
"RPPB": 8,
|
||||
"RRD": 4,
|
||||
"RTP": 3,
|
||||
"WL": 5,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XS": 76,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,43 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<!--BL 4/8, DBI disabled/enabled, REFM 0.25/0.5/1/2/4-->
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_4x64_2Gb_WIDEIO2-400_64bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO2" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="512" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="400" />
|
||||
<parameter id="RCD" type="uint" value="8" />
|
||||
<parameter id="RPPB" type="uint" value="8" />
|
||||
<parameter id="RPAB" type="uint" value="9" />
|
||||
<parameter id="RAS" type="uint" value="17" />
|
||||
<parameter id="RCPB" type="uint" value="24" />
|
||||
<parameter id="RCAB" type="uint" value="26" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="REFM" type="uint" value="1" />
|
||||
<parameter id="REFI" type="uint" value="1560" />
|
||||
<parameter id="RFCAB" type="uint" value="72" />
|
||||
<parameter id="RFCPB" type="uint" value="36" />
|
||||
<parameter id="CKESR" type="uint" value="6" />
|
||||
<parameter id="XS" type="uint" value="76" />
|
||||
<parameter id="XP" type="uint" value="3" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="WL" type="uint" value="5" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="RTP" type="uint" value="3" />
|
||||
<parameter id="CCD" type="uint" value="2" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<!-- to be completed -->
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,40 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 512,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "JEDEC_4x64_2Gb_WIDEIO2-533_64bit",
|
||||
"memoryType": "WIDEIO2",
|
||||
"memtimingspec": {
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 8,
|
||||
"FAW": 32,
|
||||
"RAS": 23,
|
||||
"RCAB": 34,
|
||||
"RCD": 10,
|
||||
"RCPB": 32,
|
||||
"REFI": 2078,
|
||||
"REFM": 1,
|
||||
"RFCAB": 96,
|
||||
"RFCPB": 48,
|
||||
"RL": 9,
|
||||
"RPAB": 12,
|
||||
"RPPB": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 7,
|
||||
"WR": 11,
|
||||
"WTR": 6,
|
||||
"XP": 4,
|
||||
"XS": 102,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,43 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<!--BL 4/8, DBI disabled/enabled, REFM 0.25/0.5/1/2/4-->
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_4x64_2Gb_WIDEIO2-533_64bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO2" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="512" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RPPB" type="uint" value="10" />
|
||||
<parameter id="RPAB" type="uint" value="12" />
|
||||
<parameter id="RAS" type="uint" value="23" />
|
||||
<parameter id="RCPB" type="uint" value="32" />
|
||||
<parameter id="RCAB" type="uint" value="34" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="REFM" type="uint" value="1" />
|
||||
<parameter id="REFI" type="uint" value="2078" />
|
||||
<parameter id="RFCAB" type="uint" value="96" />
|
||||
<parameter id="RFCPB" type="uint" value="48" />
|
||||
<parameter id="CKESR" type="uint" value="8" />
|
||||
<parameter id="XS" type="uint" value="102" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="RL" type="uint" value="9" />
|
||||
<parameter id="WL" type="uint" value="7" />
|
||||
<parameter id="WR" type="uint" value="11" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="2" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<!-- to be completed -->
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,46 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "JEDEC_8Gb_LPDDR4-3200_16bit",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 12,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 2,
|
||||
"DQSCK": 6,
|
||||
"DQSS": 1,
|
||||
"ESCKE": 3,
|
||||
"FAW": 64,
|
||||
"PPD": 4,
|
||||
"RAS": 68,
|
||||
"RCD": 29,
|
||||
"REFI": 6246,
|
||||
"REFIPB": 780,
|
||||
"RFCAB": 448,
|
||||
"RFCPB": 224,
|
||||
"RL": 28,
|
||||
"RPAB": 34,
|
||||
"RPPB": 29,
|
||||
"RPST": 0,
|
||||
"RRD": 16,
|
||||
"RTP": 12,
|
||||
"SR": 24,
|
||||
"WL": 14,
|
||||
"WPRE": 2,
|
||||
"WR": 29,
|
||||
"WTR": 16,
|
||||
"XP": 12,
|
||||
"XSR": 460,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,50 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<!--Single channel device with 8Gb, Set A WL-->
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_8Gb_LPDDR4-3200_16bit" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfRows" type="uint" value="65536" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="16" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="1600" />
|
||||
<parameter id="REFI" type="uint" value="6246" />
|
||||
<parameter id="REFIPB" type="uint" value="780" />
|
||||
<parameter id="RFCAB" type="uint" value="448" />
|
||||
<parameter id="RFCPB" type="uint" value="224" />
|
||||
<parameter id="RPAB" type="uint" value="34" />
|
||||
<parameter id="RPPB" type="uint" value="29" />
|
||||
<parameter id="PPD" type="uint" value="4" />
|
||||
<parameter id="RAS" type="uint" value="68" />
|
||||
<parameter id="RCD" type="uint" value="29" />
|
||||
<parameter id="FAW" type="uint" value="64" />
|
||||
<parameter id="RRD" type="uint" value="16" />
|
||||
<parameter id="CCD" type="uint" value="8" />
|
||||
<parameter id="RL" type="uint" value="28" />
|
||||
<parameter id="RPST" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="6" />
|
||||
<parameter id="RTP" type="uint" value="12" />
|
||||
<parameter id="WL" type="uint" value="14" />
|
||||
<parameter id="DQSS" type="uint" value="1" />
|
||||
<parameter id="DQS2DQ" type="uint" value="2" />
|
||||
<!--parameter id="nWR" type="uint" value="30" /-->
|
||||
<parameter id="WR" type="uint" value="29" />
|
||||
<parameter id="WPRE" type="uint" value="2" />
|
||||
<parameter id="WTR" type="uint" value="16" />
|
||||
<parameter id="XP" type="uint" value="12" />
|
||||
<parameter id="SR" type="uint" value="24" />
|
||||
<parameter id="XSR" type="uint" value="460" />
|
||||
<parameter id="ESCKE" type="uint" value="3" />
|
||||
<parameter id="CKE" type="uint" value="12" />
|
||||
<parameter id="CMDCKE" type="uint" value="3" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<!-- to be completed -->
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR2-1066_16bit_H",
|
||||
"memoryType": "DDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 90.0,
|
||||
"idd2n": 36.0,
|
||||
"idd2p0": 7.0,
|
||||
"idd2p1": 7.0,
|
||||
"idd3n": 42.0,
|
||||
"idd3p0": 10.0,
|
||||
"idd3p1": 23.0,
|
||||
"idd4r": 180.0,
|
||||
"idd4w": 185.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 7.0,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 24,
|
||||
"RC": 31,
|
||||
"RCD": 7,
|
||||
"REFI": 3120,
|
||||
"RFC": 68,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XPDLL": 10,
|
||||
"XS": 74,
|
||||
"XSDLL": 200,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR2-800_16bit_H",
|
||||
"memoryType": "DDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 80.0,
|
||||
"idd2n": 30.0,
|
||||
"idd2p0": 7.0,
|
||||
"idd2p1": 7.0,
|
||||
"idd3n": 35.0,
|
||||
"idd3p0": 10.0,
|
||||
"idd3p1": 20.0,
|
||||
"idd4r": 150.0,
|
||||
"idd4w": 160.0,
|
||||
"idd5": 150.0,
|
||||
"idd6": 7.0,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 5,
|
||||
"DQSCK": 0,
|
||||
"FAW": 18,
|
||||
"RAS": 16,
|
||||
"RC": 23,
|
||||
"RCD": 5,
|
||||
"REFI": 3120,
|
||||
"RFC": 51,
|
||||
"RL": 5,
|
||||
"RP": 5,
|
||||
"RRD": 4,
|
||||
"RTP": 3,
|
||||
"WL": 4,
|
||||
"WR": 6,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XPDLL": 8,
|
||||
"XS": 55,
|
||||
"XSDLL": 200,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR2-800_16bit_H.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 75.0,
|
||||
"idd2n": 35.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 45.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 140.0,
|
||||
"idd4w": 155.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.xml
|
||||
@@ -1 +1,55 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_1Gb_DDR3-1066_16bit_G_2s"}, {"@id": "memoryType", "@type": "string", "@value": "DDR3"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "16"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "8192"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "533"}, {"@id": "RC", "@type": "uint", "@value": "27"}, {"@id": "RCD", "@type": "uint", "@value": "7"}, {"@id": "RL", "@type": "uint", "@value": "7"}, {"@id": "RP", "@type": "uint", "@value": "7"}, {"@id": "RFC", "@type": "uint", "@value": "59"}, {"@id": "RAS", "@type": "uint", "@value": "20"}, {"@id": "WL", "@type": "uint", "@value": "6"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "DQSCK", "@type": "uint", "@value": "0"}, {"@id": "RTP", "@type": "uint", "@value": "4"}, {"@id": "WR", "@type": "uint", "@value": "8"}, {"@id": "XP", "@type": "uint", "@value": "4"}, {"@id": "XPDLL", "@type": "uint", "@value": "13"}, {"@id": "XS", "@type": "uint", "@value": "64"}, {"@id": "XSDLL", "@type": "uint", "@value": "512"}, {"@id": "REFI", "@type": "uint", "@value": "4160"}, {"@id": "CL", "@type": "uint", "@value": "7"}, {"@id": "FAW", "@type": "uint", "@value": "27"}, {"@id": "RRD", "@type": "uint", "@value": "6"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "4"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "4"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "70.22"}, {"@id": "idd2p0", "@type": "double", "@value": "9.07"}, {"@id": "idd2p1", "@type": "double", "@value": "18.90"}, {"@id": "idd2n", "@type": "double", "@value": "30.95"}, {"@id": "idd3p0", "@type": "double", "@value": "26.0"}, {"@id": "idd3p1", "@type": "double", "@value": "26.0"}, {"@id": "idd3n", "@type": "double", "@value": "39.0"}, {"@id": "idd4w", "@type": "double", "@value": "144.31"}, {"@id": "idd4r", "@type": "double", "@value": "128.59"}, {"@id": "idd5", "@type": "double", "@value": "150.64"}, {"@id": "idd6", "@type": "double", "@value": "6.02"}, {"@id": "vdd", "@type": "double", "@value": "1.5"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.22,
|
||||
"idd2n": 30.95,
|
||||
"idd2p0": 9.07,
|
||||
"idd2p1": 18.9,
|
||||
"idd3n": 39.0,
|
||||
"idd3p0": 26.0,
|
||||
"idd3p1": 26.0,
|
||||
"idd4r": 128.59,
|
||||
"idd4w": 144.31,
|
||||
"idd5": 150.64,
|
||||
"idd6": 6.02,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.xml
|
||||
@@ -1 +1,55 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_1Gb_DDR3-1066_16bit_G_3s"}, {"@id": "memoryType", "@type": "string", "@value": "DDR3"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "16"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "8192"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "533"}, {"@id": "RC", "@type": "uint", "@value": "27"}, {"@id": "RCD", "@type": "uint", "@value": "7"}, {"@id": "RL", "@type": "uint", "@value": "7"}, {"@id": "RP", "@type": "uint", "@value": "7"}, {"@id": "RFC", "@type": "uint", "@value": "59"}, {"@id": "RAS", "@type": "uint", "@value": "20"}, {"@id": "WL", "@type": "uint", "@value": "6"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "DQSCK", "@type": "uint", "@value": "0"}, {"@id": "RTP", "@type": "uint", "@value": "4"}, {"@id": "WR", "@type": "uint", "@value": "8"}, {"@id": "XP", "@type": "uint", "@value": "4"}, {"@id": "XPDLL", "@type": "uint", "@value": "13"}, {"@id": "XS", "@type": "uint", "@value": "64"}, {"@id": "XSDLL", "@type": "uint", "@value": "512"}, {"@id": "REFI", "@type": "uint", "@value": "4160"}, {"@id": "CL", "@type": "uint", "@value": "7"}, {"@id": "FAW", "@type": "uint", "@value": "27"}, {"@id": "RRD", "@type": "uint", "@value": "6"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "4"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "4"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "71.81"}, {"@id": "idd2p0", "@type": "double", "@value": "10.04"}, {"@id": "idd2p1", "@type": "double", "@value": "20.93"}, {"@id": "idd2n", "@type": "double", "@value": "32.3"}, {"@id": "idd3p0", "@type": "double", "@value": "27.33"}, {"@id": "idd3p1", "@type": "double", "@value": "27.33"}, {"@id": "idd3n", "@type": "double", "@value": "41.0"}, {"@id": "idd4w", "@type": "double", "@value": "147.87"}, {"@id": "idd4r", "@type": "double", "@value": "132.39"}, {"@id": "idd5", "@type": "double", "@value": "153.76"}, {"@id": "idd6", "@type": "double", "@value": "6.68"}, {"@id": "vdd", "@type": "double", "@value": "1.5"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 71.81,
|
||||
"idd2n": 32.3,
|
||||
"idd2p0": 10.04,
|
||||
"idd2p1": 20.93,
|
||||
"idd3n": 41.0,
|
||||
"idd3p0": 27.33,
|
||||
"idd3p1": 27.33,
|
||||
"idd4r": 132.39,
|
||||
"idd4w": 147.87,
|
||||
"idd5": 153.76,
|
||||
"idd6": 6.68,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 67.04,
|
||||
"idd2n": 28.25,
|
||||
"idd2p0": 7.12,
|
||||
"idd2p1": 14.83,
|
||||
"idd3n": 35.01,
|
||||
"idd3p0": 23.34,
|
||||
"idd3p1": 23.34,
|
||||
"idd4r": 120.98,
|
||||
"idd4w": 137.19,
|
||||
"idd5": 144.41,
|
||||
"idd6": 4.7,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_8bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.0,
|
||||
"idd2n": 35.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 40.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 105.0,
|
||||
"idd4w": 110.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_8bit_G_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 56.18,
|
||||
"idd2n": 30.95,
|
||||
"idd2p0": 9.07,
|
||||
"idd2p1": 18.9,
|
||||
"idd3n": 34.67,
|
||||
"idd3p0": 26.0,
|
||||
"idd3p1": 26.0,
|
||||
"idd4r": 96.88,
|
||||
"idd4w": 102.0,
|
||||
"idd5": 150.64,
|
||||
"idd6": 6.02,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.xml
|
||||
@@ -1 +1,55 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_1Gb_DDR3-1066_8bit_G_3s"}, {"@id": "memoryType", "@type": "string", "@value": "DDR3"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "8"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "16384"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "533"}, {"@id": "RC", "@type": "uint", "@value": "27"}, {"@id": "RCD", "@type": "uint", "@value": "7"}, {"@id": "RL", "@type": "uint", "@value": "7"}, {"@id": "RP", "@type": "uint", "@value": "7"}, {"@id": "RFC", "@type": "uint", "@value": "59"}, {"@id": "RAS", "@type": "uint", "@value": "20"}, {"@id": "WL", "@type": "uint", "@value": "6"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "DQSCK", "@type": "uint", "@value": "0"}, {"@id": "RTP", "@type": "uint", "@value": "4"}, {"@id": "WR", "@type": "uint", "@value": "8"}, {"@id": "XP", "@type": "uint", "@value": "4"}, {"@id": "XPDLL", "@type": "uint", "@value": "13"}, {"@id": "XS", "@type": "uint", "@value": "64"}, {"@id": "XSDLL", "@type": "uint", "@value": "512"}, {"@id": "REFI", "@type": "uint", "@value": "4160"}, {"@id": "CL", "@type": "uint", "@value": "7"}, {"@id": "FAW", "@type": "uint", "@value": "20"}, {"@id": "RRD", "@type": "uint", "@value": "4"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "4"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "4"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "57.45"}, {"@id": "idd2p0", "@type": "double", "@value": "10.04"}, {"@id": "idd2p1", "@type": "double", "@value": "20.93"}, {"@id": "idd2n", "@type": "double", "@value": "32.3"}, {"@id": "idd3p0", "@type": "double", "@value": "27.33"}, {"@id": "idd3p1", "@type": "double", "@value": "27.33"}, {"@id": "idd3n", "@type": "double", "@value": "36.45"}, {"@id": "idd4w", "@type": "double", "@value": "104.67"}, {"@id": "idd4r", "@type": "double", "@value": "99.59"}, {"@id": "idd5", "@type": "double", "@value": "153.76"}, {"@id": "idd6", "@type": "double", "@value": "6.68"}, {"@id": "vdd", "@type": "double", "@value": "1.5"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_8bit_G_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 57.45,
|
||||
"idd2n": 32.3,
|
||||
"idd2p0": 10.04,
|
||||
"idd2p1": 20.93,
|
||||
"idd3n": 36.45,
|
||||
"idd3p0": 27.33,
|
||||
"idd3p1": 27.33,
|
||||
"idd4r": 99.59,
|
||||
"idd4w": 104.67,
|
||||
"idd5": 153.76,
|
||||
"idd6": 6.68,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_8bit_G_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 53.63,
|
||||
"idd2n": 28.25,
|
||||
"idd2p0": 7.12,
|
||||
"idd2p1": 14.83,
|
||||
"idd3n": 31.12,
|
||||
"idd3p0": 23.34,
|
||||
"idd3p1": 23.34,
|
||||
"idd4r": 91.47,
|
||||
"idd4w": 96.68,
|
||||
"idd5": 144.41,
|
||||
"idd6": 4.7,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.xml
|
||||
@@ -1,51 +1,55 @@
|
||||
{"memspec": {
|
||||
"memoryId" : "MICRON_1Gb_DDR3-1600_8bit_G",
|
||||
"memoryType" : "DDR3",
|
||||
"memarchitecturespec": {
|
||||
"width": 8,
|
||||
"nbrOfBanks" : 8,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfColumns" : 1024,
|
||||
"nbrOfRows": 16384,
|
||||
"dataRate": 2,
|
||||
"burstLength": 8},
|
||||
"memtimingspec": {
|
||||
"clkMhz" : 800,
|
||||
"RC" : 38,
|
||||
"RCD" : 10,
|
||||
"RL" : 10,
|
||||
"RP": 10,
|
||||
"RFC" : 88,
|
||||
"RAS": 28,
|
||||
"WL": 8,
|
||||
"AL": 0,
|
||||
"DQSCK": 0,
|
||||
"RTP": 6,
|
||||
"WR" : 12,
|
||||
"XP" : 6,
|
||||
"XPDLL" : 20,
|
||||
"XS" : 96,
|
||||
"XSDLL": 512,
|
||||
"REFI" : 6240,
|
||||
"CL" : 10,
|
||||
"FAW" : 24,
|
||||
"RRD" : 5,
|
||||
"CCD" : 4,
|
||||
"WTR" : 6,
|
||||
"CKE" : 3,
|
||||
"CKESR": 4},
|
||||
"mempowerspec" : {
|
||||
"idd0" : 70.0,
|
||||
"idd2p0" : 12.0,
|
||||
"idd2p1" : 30.0,
|
||||
"idd2n" : 45.0,
|
||||
"idd3p0" : 35.0,
|
||||
"idd3p1" : 35.0,
|
||||
"idd3n" : 45.0,
|
||||
"idd4w" : 145.0,
|
||||
"idd4r" : 140.0,
|
||||
"idd5" :170.0,
|
||||
"idd6" : 8.0,
|
||||
"vdd" :1.5}}
|
||||
}
|
||||
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.0,
|
||||
"idd2n": 45.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 30.0,
|
||||
"idd3n": 45.0,
|
||||
"idd3p0": 35.0,
|
||||
"idd3p1": 35.0,
|
||||
"idd4r": 140.0,
|
||||
"idd4w": 145.0,
|
||||
"idd5": 170.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 6240,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 5,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 6,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 65.19,
|
||||
"idd2n": 40.0,
|
||||
"idd2p0": 9.07,
|
||||
"idd2p1": 22.68,
|
||||
"idd3n": 40.07,
|
||||
"idd3p0": 31.16,
|
||||
"idd3p1": 31.16,
|
||||
"idd4r": 127.49,
|
||||
"idd4w": 130.17,
|
||||
"idd5": 159.28,
|
||||
"idd6": 6.02,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 6240,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 5,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 6,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 66.79,
|
||||
"idd2n": 41.67,
|
||||
"idd2p0": 10.04,
|
||||
"idd2p1": 25.12,
|
||||
"idd3n": 41.71,
|
||||
"idd3p0": 32.44,
|
||||
"idd3p1": 32.44,
|
||||
"idd4r": 131.66,
|
||||
"idd4w": 135.11,
|
||||
"idd5": 162.85,
|
||||
"idd6": 6.68,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 6240,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 5,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 6,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.0,
|
||||
"idd2n": 45.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 30.0,
|
||||
"idd3n": 45.0,
|
||||
"idd3p0": 35.0,
|
||||
"idd3p1": 35.0,
|
||||
"idd4r": 140.0,
|
||||
"idd4w": 145.0,
|
||||
"idd5": 170.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 300000000,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 5,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 6,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,55 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1600_8bit_G" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="300000000" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="RRD" type="uint" value="5" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="70.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="30.0" />
|
||||
<parameter id="idd2n" type="double" value="45.0" />
|
||||
<parameter id="idd3p0" type="double" value="35.0" />
|
||||
<parameter id="idd3p1" type="double" value="35.0" />
|
||||
<parameter id="idd3n" type="double" value="45.0" />
|
||||
<parameter id="idd4w" type="double" value="145.0" />
|
||||
<parameter id="idd4r" type="double" value="140.0" />
|
||||
<parameter id="idd5" type="double" value="170.0" />
|
||||
<parameter id="idd6" type="double" value="8.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 61.99,
|
||||
"idd2n": 36.68,
|
||||
"idd2p0": 7.12,
|
||||
"idd2p1": 17.8,
|
||||
"idd3n": 36.78,
|
||||
"idd3p0": 28.61,
|
||||
"idd3p1": 28.61,
|
||||
"idd4r": 119.16,
|
||||
"idd4w": 120.28,
|
||||
"idd5": 152.13,
|
||||
"idd6": 4.7,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 6240,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 5,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 6,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-800_8bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.0,
|
||||
"idd2n": 35.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 40.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 105.0,
|
||||
"idd4w": 110.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 5,
|
||||
"DQSCK": 0,
|
||||
"FAW": 16,
|
||||
"RAS": 15,
|
||||
"RC": 20,
|
||||
"RCD": 5,
|
||||
"REFI": 3120,
|
||||
"RFC": 44,
|
||||
"RL": 5,
|
||||
"RP": 5,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 5,
|
||||
"WR": 6,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XPDLL": 10,
|
||||
"XS": 48,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,55 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-800_8bit_G" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="400" />
|
||||
<parameter id="RC" type="uint" value="20" /> <!-- 50 ns -->
|
||||
<parameter id="RCD" type="uint" value="5" /> <!-- 12.5 ns -->
|
||||
<parameter id="RL" type="uint" value="5" /> <!-- 12.5 ns -->
|
||||
<parameter id="RP" type="uint" value="5" /> <!-- 12.5 ns -->
|
||||
<parameter id="RFC" type="uint" value="44" /> <!-- 110 ns for 1Gb -->
|
||||
<parameter id="RAS" type="uint" value="15" /> <!-- 37.5 ns -->
|
||||
<parameter id="WL" type="uint" value="5" /> <!-- jedec 5 clk cycles -->
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" /> <!-- 0.4 ns -->
|
||||
<parameter id="RTP" type="uint" value="4" /> <!-- 4 clk cycles -->
|
||||
<parameter id="WR" type="uint" value="6" /> <!-- 15 ns -->
|
||||
<parameter id="XP" type="uint" value="3" /> <!-- 3 clk cycles -->
|
||||
<parameter id="XPDLL" type="uint" value="10" /> <!-- 10 clk cycles -->
|
||||
<parameter id="XS" type="uint" value="48" /> <!-- 110ns + 10ns -->
|
||||
<parameter id="XSDLL" type="uint" value="512" /> <!-- 512 clk cycles ns -->
|
||||
<parameter id="REFI" type="uint" value="3120" /> <!-- 78 000 ns -->
|
||||
<parameter id="CL" type="uint" value="5" /> <!-- jedec 5 clk cycles -->
|
||||
<parameter id="FAW" type="uint" value="16" /> <!-- 40 ns -->
|
||||
<parameter id="RRD" type="uint" value="4" /> <!-- 4 clk cycles -->
|
||||
<parameter id="CCD" type="uint" value="4" /> <!-- 4 clk cycles -->
|
||||
<parameter id="WTR" type="uint" value="4" /> <!-- 4 clk cycles -->
|
||||
<parameter id="CKE" type="uint" value="3" /> <!-- 3 clk cycles -->
|
||||
<parameter id="CKESR" type="uint" value="4" /> <!-- 4 clk cycles -->
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="60.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="25.0" />
|
||||
<parameter id="idd2n" type="double" value="35.0" />
|
||||
<parameter id="idd3p0" type="double" value="30.0" />
|
||||
<parameter id="idd3p1" type="double" value="30.0" />
|
||||
<parameter id="idd3n" type="double" value="40.0" />
|
||||
<parameter id="idd4w" type="double" value="110.0" />
|
||||
<parameter id="idd4r" type="double" value="105.0" />
|
||||
<parameter id="idd5" type="double" value="160.0" />
|
||||
<parameter id="idd6" type="double" value="8.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 2,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 720.0,
|
||||
"idd2n": 400.0,
|
||||
"idd2p0": 80.0,
|
||||
"idd2p1": 200.0,
|
||||
"idd3n": 440.0,
|
||||
"idd3p0": 240.0,
|
||||
"idd3p1": 240.0,
|
||||
"idd4r": 1200.0,
|
||||
"idd4w": 1200.0,
|
||||
"idd5": 1760.0,
|
||||
"idd6": 48.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 2,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "MICRON_2GB_DDR3-1066_64bit_G_UDIMM",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 432.0,
|
||||
"idd2n": 315.0,
|
||||
"idd2p0": 108.0,
|
||||
"idd2p1": 225.0,
|
||||
"idd3n": 360.0,
|
||||
"idd3p0": 270.0,
|
||||
"idd3p1": 270.0,
|
||||
"idd4r": 882.0,
|
||||
"idd4w": 837.0,
|
||||
"idd5": 1332.0,
|
||||
"idd6": 90.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 2,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "MICRON_2GB_DDR3-1333_64bit_D_SODIMM",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 800.0,
|
||||
"idd2n": 440.0,
|
||||
"idd2p0": 80.0,
|
||||
"idd2p1": 200.0,
|
||||
"idd3n": 480.0,
|
||||
"idd3p0": 280.0,
|
||||
"idd3p1": 280.0,
|
||||
"idd4r": 1440.0,
|
||||
"idd4w": 1520.0,
|
||||
"idd5": 1920.0,
|
||||
"idd6": 48.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 4,
|
||||
"CKESR": 5,
|
||||
"CL": 9,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 24,
|
||||
"RC": 33,
|
||||
"RCD": 9,
|
||||
"REFI": 5200,
|
||||
"RFC": 74,
|
||||
"RL": 9,
|
||||
"RP": 9,
|
||||
"RRD": 4,
|
||||
"RTP": 5,
|
||||
"WL": 7,
|
||||
"WR": 10,
|
||||
"WTR": 5,
|
||||
"XP": 4,
|
||||
"XPDLL": 16,
|
||||
"XS": 80,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 666
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 2,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 64
|
||||
},
|
||||
"memoryId": "MICRON_2GB_DDR3-1600_64bit_G_UDIMM",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 522.0,
|
||||
"idd2n": 405.0,
|
||||
"idd2p0": 108.0,
|
||||
"idd2p1": 270.0,
|
||||
"idd3n": 405.0,
|
||||
"idd3p0": 315.0,
|
||||
"idd3p1": 315.0,
|
||||
"idd4r": 1197.0,
|
||||
"idd4w": 1152.0,
|
||||
"idd5": 1422.0,
|
||||
"idd6": 90.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 5,
|
||||
"CKESR": 5,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 32,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 4160,
|
||||
"RFC": 88,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 5,
|
||||
"XPDLL": 20,
|
||||
"XS": 96,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2GB_DDR3-1600_64bit_G_UDIMM.xml
|
||||
@@ -1 +1,55 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_2Gb_DDR3-1066_8bit_D"}, {"@id": "memoryType", "@type": "string", "@value": "DDR3"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "8"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "32768"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "533"}, {"@id": "RC", "@type": "uint", "@value": "27"}, {"@id": "RCD", "@type": "uint", "@value": "7"}, {"@id": "RL", "@type": "uint", "@value": "7"}, {"@id": "RP", "@type": "uint", "@value": "7"}, {"@id": "RFC", "@type": "uint", "@value": "86"}, {"@id": "RAS", "@type": "uint", "@value": "20"}, {"@id": "WL", "@type": "uint", "@value": "6"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "DQSCK", "@type": "uint", "@value": "0"}, {"@id": "RTP", "@type": "uint", "@value": "4"}, {"@id": "WR", "@type": "uint", "@value": "8"}, {"@id": "XP", "@type": "uint", "@value": "4"}, {"@id": "XPDLL", "@type": "uint", "@value": "13"}, {"@id": "XS", "@type": "uint", "@value": "92"}, {"@id": "XSDLL", "@type": "uint", "@value": "512"}, {"@id": "REFI", "@type": "uint", "@value": "4160"}, {"@id": "CL", "@type": "uint", "@value": "7"}, {"@id": "FAW", "@type": "uint", "@value": "20"}, {"@id": "RRD", "@type": "uint", "@value": "4"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "4"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "4"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "75.0"}, {"@id": "idd2p0", "@type": "double", "@value": "12.0"}, {"@id": "idd2p1", "@type": "double", "@value": "25.0"}, {"@id": "idd2n", "@type": "double", "@value": "32.0"}, {"@id": "idd3p0", "@type": "double", "@value": "30.0"}, {"@id": "idd3p1", "@type": "double", "@value": "30.0"}, {"@id": "idd3n", "@type": "double", "@value": "35.0"}, {"@id": "idd4w", "@type": "double", "@value": "145.0"}, {"@id": "idd4r", "@type": "double", "@value": "140.0"}, {"@id": "idd5", "@type": "double", "@value": "190.0"}, {"@id": "idd6", "@type": "double", "@value": "12.0"}, {"@id": "vdd", "@type": "double", "@value": "1.5"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1066_8bit_D",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 75.0,
|
||||
"idd2n": 32.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 35.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 140.0,
|
||||
"idd4w": 145.0,
|
||||
"idd5": 190.0,
|
||||
"idd6": 12.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 86,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 92,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1066_8bit_D.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1066_8bit_D_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.08,
|
||||
"idd2n": 27.52,
|
||||
"idd2p0": 8.78,
|
||||
"idd2p1": 18.29,
|
||||
"idd3n": 30.6,
|
||||
"idd3p0": 26.23,
|
||||
"idd3p1": 26.23,
|
||||
"idd4r": 128.07,
|
||||
"idd4w": 131.42,
|
||||
"idd5": 178.56,
|
||||
"idd6": 8.41,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 86,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 92,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_2s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1066_8bit_D_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 71.72,
|
||||
"idd2n": 29.02,
|
||||
"idd2p0": 9.85,
|
||||
"idd2p1": 20.53,
|
||||
"idd3n": 32.06,
|
||||
"idd3p0": 27.48,
|
||||
"idd3p1": 27.48,
|
||||
"idd4r": 132.05,
|
||||
"idd4w": 135.95,
|
||||
"idd5": 182.37,
|
||||
"idd6": 9.6,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 86,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 92,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_3s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1066_8bit_D_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 66.8,
|
||||
"idd2n": 24.54,
|
||||
"idd2p0": 6.63,
|
||||
"idd2p1": 13.82,
|
||||
"idd3n": 27.67,
|
||||
"idd3p0": 23.71,
|
||||
"idd3p1": 23.71,
|
||||
"idd4r": 120.13,
|
||||
"idd4w": 122.38,
|
||||
"idd5": 170.93,
|
||||
"idd6": 6.01,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 86,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 92,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1600_16bit_D",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 110.0,
|
||||
"idd2n": 42.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 40.0,
|
||||
"idd3n": 45.0,
|
||||
"idd3p0": 45.0,
|
||||
"idd3p1": 45.0,
|
||||
"idd4r": 270.0,
|
||||
"idd4w": 280.0,
|
||||
"idd5": 215.0,
|
||||
"idd6": 12.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 32,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 4160,
|
||||
"RFC": 128,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 5,
|
||||
"XPDLL": 20,
|
||||
"XS": 136,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.xml
|
||||
@@ -1 +1,55 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_2Gb_DDR3-1600_16bit_D_2s"}, {"@id": "memoryType", "@type": "string", "@value": "DDR3"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "16"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "16384"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "800"}, {"@id": "RC", "@type": "uint", "@value": "38"}, {"@id": "RCD", "@type": "uint", "@value": "10"}, {"@id": "RL", "@type": "uint", "@value": "10"}, {"@id": "RP", "@type": "uint", "@value": "10"}, {"@id": "RFC", "@type": "uint", "@value": "128"}, {"@id": "RAS", "@type": "uint", "@value": "28"}, {"@id": "WL", "@type": "uint", "@value": "8"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "DQSCK", "@type": "uint", "@value": "0"}, {"@id": "RTP", "@type": "uint", "@value": "6"}, {"@id": "WR", "@type": "uint", "@value": "12"}, {"@id": "XP", "@type": "uint", "@value": "5"}, {"@id": "XPDLL", "@type": "uint", "@value": "20"}, {"@id": "XS", "@type": "uint", "@value": "136"}, {"@id": "XSDLL", "@type": "uint", "@value": "512"}, {"@id": "REFI", "@type": "uint", "@value": "4160"}, {"@id": "CL", "@type": "uint", "@value": "10"}, {"@id": "FAW", "@type": "uint", "@value": "32"}, {"@id": "RRD", "@type": "uint", "@value": "6"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "6"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "4"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "102.83"}, {"@id": "idd2p0", "@type": "double", "@value": "8.77"}, {"@id": "idd2p1", "@type": "double", "@value": "29.25"}, {"@id": "idd2n", "@type": "double", "@value": "36.89"}, {"@id": "idd3p0", "@type": "double", "@value": "38.75"}, {"@id": "idd3p1", "@type": "double", "@value": "38.75"}, {"@id": "idd3n", "@type": "double", "@value": "38.75"}, {"@id": "idd4w", "@type": "double", "@value": "260.04"}, {"@id": "idd4r", "@type": "double", "@value": "247.34"}, {"@id": "idd5", "@type": "double", "@value": "202.17"}, {"@id": "idd6", "@type": "double", "@value": "8.67"}, {"@id": "vdd", "@type": "double", "@value": "1.5"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1600_16bit_D_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 102.83,
|
||||
"idd2n": 36.89,
|
||||
"idd2p0": 8.77,
|
||||
"idd2p1": 29.25,
|
||||
"idd3n": 38.75,
|
||||
"idd3p0": 38.75,
|
||||
"idd3p1": 38.75,
|
||||
"idd4r": 247.34,
|
||||
"idd4w": 260.04,
|
||||
"idd5": 202.17,
|
||||
"idd6": 8.67,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 32,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 4160,
|
||||
"RFC": 128,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 5,
|
||||
"XPDLL": 20,
|
||||
"XS": 136,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1600_16bit_D_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 105.25,
|
||||
"idd2n": 38.59,
|
||||
"idd2p0": 9.85,
|
||||
"idd2p1": 32.83,
|
||||
"idd3n": 40.83,
|
||||
"idd3p0": 40.83,
|
||||
"idd3p1": 40.83,
|
||||
"idd4r": 254.89,
|
||||
"idd4w": 266.69,
|
||||
"idd5": 206.44,
|
||||
"idd6": 9.78,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 32,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 4160,
|
||||
"RFC": 128,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 5,
|
||||
"XPDLL": 20,
|
||||
"XS": 136,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.xml
|
||||
@@ -0,0 +1,55 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_DDR3-1600_16bit_D_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 98.06,
|
||||
"idd2n": 33.49,
|
||||
"idd2p0": 6.62,
|
||||
"idd2p1": 22.09,
|
||||
"idd3n": 34.59,
|
||||
"idd3p0": 34.59,
|
||||
"idd3p1": 34.59,
|
||||
"idd4r": 232.24,
|
||||
"idd4w": 246.74,
|
||||
"idd5": 193.62,
|
||||
"idd6": 6.45,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 10,
|
||||
"DQSCK": 0,
|
||||
"FAW": 32,
|
||||
"RAS": 28,
|
||||
"RC": 38,
|
||||
"RCD": 10,
|
||||
"REFI": 4160,
|
||||
"RFC": 128,
|
||||
"RL": 10,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 6,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 6,
|
||||
"XP": 5,
|
||||
"XPDLL": 20,
|
||||
"XS": 136,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.xml
|
||||
@@ -0,0 +1,54 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_LPDDR-266_16bit_A",
|
||||
"memoryType": "LPDDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.0,
|
||||
"idd2n": 12.0,
|
||||
"idd2p0": 0.6,
|
||||
"idd2p1": 0.6,
|
||||
"idd3n": 16.0,
|
||||
"idd3p0": 3.6,
|
||||
"idd3p1": 3.6,
|
||||
"idd4r": 105.0,
|
||||
"idd4w": 105.0,
|
||||
"idd5": 170.0,
|
||||
"idd6": 1.7,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 1,
|
||||
"CKESR": 2,
|
||||
"CL": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 6,
|
||||
"RC": 9,
|
||||
"RCD": 3,
|
||||
"REFI": 2080,
|
||||
"RFC": 10,
|
||||
"RL": 3,
|
||||
"RP": 3,
|
||||
"RRD": 2,
|
||||
"RTP": 3,
|
||||
"WL": 3,
|
||||
"WR": 2,
|
||||
"WTR": 1,
|
||||
"XP": 1,
|
||||
"XPDLL": 1,
|
||||
"XS": 15,
|
||||
"XSDLL": 15,
|
||||
"clkMhz": 133
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.xml
|
||||
@@ -1 +1,54 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_2Gb_LPDDR-333_16bit_A"}, {"@id": "memoryType", "@type": "string", "@value": "LPDDR"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "16"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "4"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "2048"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "16384"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "166"}, {"@id": "REFI", "@type": "uint", "@value": "2600"}, {"@id": "RFC", "@type": "uint", "@value": "12"}, {"@id": "RL", "@type": "uint", "@value": "3"}, {"@id": "WL", "@type": "uint", "@value": "3"}, {"@id": "CL", "@type": "uint", "@value": "3"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "RP", "@type": "uint", "@value": "3"}, {"@id": "RAS", "@type": "uint", "@value": "7"}, {"@id": "RCD", "@type": "uint", "@value": "3"}, {"@id": "RC", "@type": "uint", "@value": "10"}, {"@id": "RRD", "@type": "uint", "@value": "2"}, {"@id": "RTP", "@type": "uint", "@value": "3"}, {"@id": "WR", "@type": "uint", "@value": "3"}, {"@id": "CCD", "@type": "uint", "@value": "2"}, {"@id": "WTR", "@type": "uint", "@value": "1"}, {"@id": "DQSCK", "@type": "uint", "@value": "1"}, {"@id": "XP", "@type": "uint", "@value": "1"}, {"@id": "XPDLL", "@type": "uint", "@value": "1"}, {"@id": "XS", "@type": "uint", "@value": "19"}, {"@id": "XSDLL", "@type": "uint", "@value": "19"}, {"@id": "CKE", "@type": "uint", "@value": "1"}, {"@id": "CKESR", "@type": "uint", "@value": "2"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "100.0"}, {"@id": "idd2p0", "@type": "double", "@value": "0.6"}, {"@id": "idd2p1", "@type": "double", "@value": "0.6"}, {"@id": "idd2n", "@type": "double", "@value": "15.0"}, {"@id": "idd3p0", "@type": "double", "@value": "3.6"}, {"@id": "idd3p1", "@type": "double", "@value": "3.6"}, {"@id": "idd3n", "@type": "double", "@value": "18.0"}, {"@id": "idd4r", "@type": "double", "@value": "115.0"}, {"@id": "idd4w", "@type": "double", "@value": "115.0"}, {"@id": "idd5", "@type": "double", "@value": "170.0"}, {"@id": "idd6", "@type": "double", "@value": "1.7"}, {"@id": "vdd", "@type": "double", "@value": "1.8"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_LPDDR-333_16bit_A",
|
||||
"memoryType": "LPDDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 100.0,
|
||||
"idd2n": 15.0,
|
||||
"idd2p0": 0.6,
|
||||
"idd2p1": 0.6,
|
||||
"idd3n": 18.0,
|
||||
"idd3p0": 3.6,
|
||||
"idd3p1": 3.6,
|
||||
"idd4r": 115.0,
|
||||
"idd4w": 115.0,
|
||||
"idd5": 170.0,
|
||||
"idd6": 1.7,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 1,
|
||||
"CKESR": 2,
|
||||
"CL": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 7,
|
||||
"RC": 10,
|
||||
"RCD": 3,
|
||||
"REFI": 2600,
|
||||
"RFC": 12,
|
||||
"RL": 3,
|
||||
"RP": 3,
|
||||
"RRD": 2,
|
||||
"RTP": 3,
|
||||
"WL": 3,
|
||||
"WR": 3,
|
||||
"WTR": 1,
|
||||
"XP": 1,
|
||||
"XPDLL": 1,
|
||||
"XS": 19,
|
||||
"XSDLL": 19,
|
||||
"clkMhz": 166
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.xml
|
||||
@@ -1 +1,67 @@
|
||||
{"memspec": {"parameter": [{"@id": "memoryId", "@type": "string", "@value": "MICRON_2Gb_LPDDR2-1066-S4_16bit_A"}, {"@id": "memoryType", "@type": "string", "@value": "LPDDR2"}], "memarchitecturespec": {"parameter": [{"@id": "width", "@type": "uint", "@value": "16"}, {"@id": "nbrOfBanks", "@type": "uint", "@value": "8"}, {"@id": "nbrOfRanks", "@type": "uint", "@value": "1"}, {"@id": "nbrOfColumns", "@type": "uint", "@value": "1024"}, {"@id": "nbrOfRows", "@type": "uint", "@value": "16384"}, {"@id": "dataRate", "@type": "uint", "@value": "2"}, {"@id": "burstLength", "@type": "uint", "@value": "8"}]}, "memtimingspec": {"parameter": [{"@id": "clkMhz", "@type": "double", "@value": "533"}, {"@id": "REFI", "@type": "uint", "@value": "2080"}, {"@id": "RFC", "@type": "uint", "@value": "70"}, {"@id": "RL", "@type": "uint", "@value": "8"}, {"@id": "WL", "@type": "uint", "@value": "4"}, {"@id": "CL", "@type": "uint", "@value": "8"}, {"@id": "AL", "@type": "uint", "@value": "0"}, {"@id": "RP", "@type": "uint", "@value": "10"}, {"@id": "RAS", "@type": "uint", "@value": "23"}, {"@id": "RCD", "@type": "uint", "@value": "10"}, {"@id": "RC", "@type": "uint", "@value": "32"}, {"@id": "FAW", "@type": "uint", "@value": "27"}, {"@id": "RRD", "@type": "uint", "@value": "6"}, {"@id": "RTP", "@type": "uint", "@value": "4"}, {"@id": "WR", "@type": "uint", "@value": "10"}, {"@id": "CCD", "@type": "uint", "@value": "4"}, {"@id": "WTR", "@type": "uint", "@value": "4"}, {"@id": "DQSCK", "@type": "uint", "@value": "2"}, {"@id": "XP", "@type": "uint", "@value": "4"}, {"@id": "XPDLL", "@type": "uint", "@value": "4"}, {"@id": "XS", "@type": "uint", "@value": "75"}, {"@id": "XSDLL", "@type": "uint", "@value": "75"}, {"@id": "CKE", "@type": "uint", "@value": "3"}, {"@id": "CKESR", "@type": "uint", "@value": "8"}]}, "mempowerspec": {"parameter": [{"@id": "idd0", "@type": "double", "@value": "20.0"}, {"@id": "idd02", "@type": "double", "@value": "71.0"}, {"@id": "idd2p0", "@type": "double", "@value": "0.5"}, {"@id": "idd2p02", "@type": "double", "@value": "1.7"}, {"@id": "idd2p1", "@type": "double", "@value": "0.5"}, {"@id": "idd2p12", "@type": "double", "@value": "1.7"}, {"@id": "idd2n", "@type": "double", "@value": "1.7"}, {"@id": "idd2n2", "@type": "double", "@value": "22.0"}, {"@id": "idd3p0", "@type": "double", "@value": "1.2"}, {"@id": "idd3p02", "@type": "double", "@value": "4.12"}, {"@id": "idd3p1", "@type": "double", "@value": "1.2"}, {"@id": "idd3p12", "@type": "double", "@value": "4.12"}, {"@id": "idd3n", "@type": "double", "@value": "1.2"}, {"@id": "idd3n2", "@type": "double", "@value": "30.0"}, {"@id": "idd4r", "@type": "double", "@value": "5.0"}, {"@id": "idd4r2", "@type": "double", "@value": "226.0"}, {"@id": "idd4w", "@type": "double", "@value": "10.0"}, {"@id": "idd4w2", "@type": "double", "@value": "208.0"}, {"@id": "idd5", "@type": "double", "@value": "15.0"}, {"@id": "idd52", "@type": "double", "@value": "136.0"}, {"@id": "idd6", "@type": "double", "@value": "1.2"}, {"@id": "idd62", "@type": "double", "@value": "2.6"}, {"@id": "vdd", "@type": "double", "@value": "1.8"}, {"@id": "vdd2", "@type": "double", "@value": "1.2"}]}}}
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_LPDDR2-1066-S4_16bit_A",
|
||||
"memoryType": "LPDDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 20.0,
|
||||
"idd02": 71.0,
|
||||
"idd2n": 1.7,
|
||||
"idd2n2": 22.0,
|
||||
"idd2p0": 0.5,
|
||||
"idd2p02": 1.7,
|
||||
"idd2p1": 0.5,
|
||||
"idd2p12": 1.7,
|
||||
"idd3n": 1.2,
|
||||
"idd3n2": 30.0,
|
||||
"idd3p0": 1.2,
|
||||
"idd3p02": 4.12,
|
||||
"idd3p1": 1.2,
|
||||
"idd3p12": 4.12,
|
||||
"idd4r": 5.0,
|
||||
"idd4r2": 226.0,
|
||||
"idd4w": 10.0,
|
||||
"idd4w2": 208.0,
|
||||
"idd5": 15.0,
|
||||
"idd52": 136.0,
|
||||
"idd6": 1.2,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 8,
|
||||
"CL": 8,
|
||||
"DQSCK": 2,
|
||||
"FAW": 27,
|
||||
"RAS": 23,
|
||||
"RC": 32,
|
||||
"RCD": 10,
|
||||
"REFI": 2080,
|
||||
"RFC": 70,
|
||||
"RL": 8,
|
||||
"RP": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 4,
|
||||
"WR": 10,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 4,
|
||||
"XS": 75,
|
||||
"XSDLL": 75,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.xml
|
||||
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_2Gb_LPDDR2-800-S4_16bit_A",
|
||||
"memoryType": "LPDDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 20.0,
|
||||
"idd02": 56.0,
|
||||
"idd2n": 1.7,
|
||||
"idd2n2": 21.0,
|
||||
"idd2p0": 0.5,
|
||||
"idd2p02": 1.7,
|
||||
"idd2p1": 0.5,
|
||||
"idd2p12": 1.7,
|
||||
"idd3n": 1.2,
|
||||
"idd3n2": 29.0,
|
||||
"idd3p0": 1.2,
|
||||
"idd3p02": 4.12,
|
||||
"idd3p1": 1.2,
|
||||
"idd3p12": 4.12,
|
||||
"idd4r": 5.0,
|
||||
"idd4r2": 216.0,
|
||||
"idd4w": 10.0,
|
||||
"idd4w2": 203.0,
|
||||
"idd5": 15.0,
|
||||
"idd52": 136.0,
|
||||
"idd6": 1.2,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 6,
|
||||
"CL": 6,
|
||||
"DQSCK": 1,
|
||||
"FAW": 20,
|
||||
"RAS": 17,
|
||||
"RC": 24,
|
||||
"RCD": 8,
|
||||
"REFI": 1560,
|
||||
"RFC": 52,
|
||||
"RL": 6,
|
||||
"RP": 8,
|
||||
"RRD": 4,
|
||||
"RTP": 3,
|
||||
"WL": 3,
|
||||
"WR": 6,
|
||||
"WTR": 3,
|
||||
"XP": 3,
|
||||
"XPDLL": 3,
|
||||
"XS": 56,
|
||||
"XSDLL": 56,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.xml
|
||||
@@ -0,0 +1,62 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-1866_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 56.25,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 33.75,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 39.5,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 157.5,
|
||||
"idd4w": 135.0,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 5,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 13,
|
||||
"DQSCK": 2,
|
||||
"FAW": 22,
|
||||
"RAS": 32,
|
||||
"RC": 45,
|
||||
"RCD": 13,
|
||||
"REFI": 3644,
|
||||
"RFC": 243,
|
||||
"RL": 13,
|
||||
"RP": 13,
|
||||
"RRD_L": 5,
|
||||
"RRD_S": 4,
|
||||
"RTP": 8,
|
||||
"WL": 12,
|
||||
"WR": 14,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 255,
|
||||
"XS": 252,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 933
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.xml
|
||||
@@ -0,0 +1,62 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-2400_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.75,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 38.25,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 44.0,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 184.5,
|
||||
"idd4w": 168.75,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 6,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 16,
|
||||
"DQSCK": 2,
|
||||
"FAW": 26,
|
||||
"RAS": 39,
|
||||
"RC": 55,
|
||||
"RCD": 16,
|
||||
"REFI": 4680,
|
||||
"RFC": 313,
|
||||
"RL": 16,
|
||||
"RP": 16,
|
||||
"RRD_L": 6,
|
||||
"RRD_S": 4,
|
||||
"RTP": 12,
|
||||
"WL": 16,
|
||||
"WR": 18,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 325,
|
||||
"XS": 324,
|
||||
"XSDLL": 512,
|
||||
"clkMhz": 1200
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.xml
|
||||
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 32
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_LPDDR3-1333_32bit_A",
|
||||
"memoryType": "LPDDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 15.0,
|
||||
"idd02": 78.0,
|
||||
"idd2n": 2.0,
|
||||
"idd2n2": 36.0,
|
||||
"idd2p0": 0.6,
|
||||
"idd2p02": 0.87,
|
||||
"idd2p1": 0.6,
|
||||
"idd2p12": 0.87,
|
||||
"idd3n": 2.0,
|
||||
"idd3n2": 38.0,
|
||||
"idd3p0": 1.2,
|
||||
"idd3p02": 8.15,
|
||||
"idd3p1": 1.2,
|
||||
"idd3p12": 8.15,
|
||||
"idd4r": 5.0,
|
||||
"idd4r2": 243.0,
|
||||
"idd4w": 10.0,
|
||||
"idd4w2": 265.0,
|
||||
"idd5": 40.0,
|
||||
"idd52": 158.0,
|
||||
"idd6": 1.0,
|
||||
"idd62": 3.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 12,
|
||||
"CL": 10,
|
||||
"DQSCK": 2,
|
||||
"FAW": 40,
|
||||
"RAS": 30,
|
||||
"RC": 40,
|
||||
"RCD": 12,
|
||||
"REFI": 2600,
|
||||
"RFC": 87,
|
||||
"RL": 10,
|
||||
"RP": 12,
|
||||
"RRD": 8,
|
||||
"RTP": 8,
|
||||
"WL": 8,
|
||||
"WR": 12,
|
||||
"WTR": 8,
|
||||
"XP": 6,
|
||||
"XPDLL": 6,
|
||||
"XS": 94,
|
||||
"XSDLL": 94,
|
||||
"clkMhz": 667
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml
|
||||
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 32
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_LPDDR3-1600_32bit_A",
|
||||
"memoryType": "LPDDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 15.0,
|
||||
"idd02": 80.0,
|
||||
"idd2n": 2.0,
|
||||
"idd2n2": 38.0,
|
||||
"idd2p0": 0.6,
|
||||
"idd2p02": 0.87,
|
||||
"idd2p1": 0.6,
|
||||
"idd2p12": 0.87,
|
||||
"idd3n": 2.0,
|
||||
"idd3n2": 45.0,
|
||||
"idd3p0": 1.2,
|
||||
"idd3p02": 8.15,
|
||||
"idd3p1": 1.2,
|
||||
"idd3p12": 8.15,
|
||||
"idd4r": 5.0,
|
||||
"idd4r2": 260.0,
|
||||
"idd4w": 10.0,
|
||||
"idd4w2": 284.0,
|
||||
"idd5": 40.0,
|
||||
"idd52": 160.0,
|
||||
"idd6": 1.0,
|
||||
"idd62": 3.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 12,
|
||||
"CL": 12,
|
||||
"DQSCK": 2,
|
||||
"FAW": 40,
|
||||
"RAS": 36,
|
||||
"RC": 48,
|
||||
"RCD": 15,
|
||||
"REFI": 3120,
|
||||
"RFC": 104,
|
||||
"RL": 12,
|
||||
"RP": 15,
|
||||
"RRD": 8,
|
||||
"RTP": 8,
|
||||
"WL": 9,
|
||||
"WR": 12,
|
||||
"WTR": 8,
|
||||
"XP": 6,
|
||||
"XPDLL": 6,
|
||||
"XS": 112,
|
||||
"XSDLL": 112,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../../../src/common/third_party/DRAMPower/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml
|
||||
@@ -0,0 +1,95 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 49152,
|
||||
"width": 16
|
||||
},
|
||||
"memoryId": "MICRON_6Gb_LPDDR3-3200_16bit_A",
|
||||
"memoryType": "LPDDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 3.5,
|
||||
"idd02": 45.0,
|
||||
"idd0ql": 0.75,
|
||||
"idd2n": 2.0,
|
||||
"idd2n2": 27.0,
|
||||
"idd2nQ": 0.75,
|
||||
"idd2ns": 2.0,
|
||||
"idd2ns2": 23.0,
|
||||
"idd2nsq": 0.75,
|
||||
"idd2p": 1.2,
|
||||
"idd2p2": 3.0,
|
||||
"idd2pQ": 0.75,
|
||||
"idd2ps": 1.2,
|
||||
"idd2ps2": 3.0,
|
||||
"idd2psq": 0.75,
|
||||
"idd3n": 2.25,
|
||||
"idd3n2": 30.0,
|
||||
"idd3nQ": 0.75,
|
||||
"idd3ns": 2.25,
|
||||
"idd3ns2": 30.0,
|
||||
"idd3nsq": 0.75,
|
||||
"idd3p": 1.2,
|
||||
"idd3p2": 9.0,
|
||||
"idd3pQ": 0.75,
|
||||
"idd3ps": 1.2,
|
||||
"idd3ps2": 9.0,
|
||||
"idd3psq": 0.75,
|
||||
"idd4r": 2.25,
|
||||
"idd4r2": 275.0,
|
||||
"idd4rq": 150.0,
|
||||
"idd4w": 2.25,
|
||||
"idd4w2": 210.0,
|
||||
"idd4wq": 55.0,
|
||||
"idd5": 10.0,
|
||||
"idd52": 90.0,
|
||||
"idd5ab": 2.5,
|
||||
"idd5ab2": 30.0,
|
||||
"idd5abq": 0.75,
|
||||
"idd5b": 2.5,
|
||||
"idd5b2": 30.0,
|
||||
"idd5bq": 0.75,
|
||||
"idd5q": 0.75,
|
||||
"idd6": 0.3,
|
||||
"idd62": 0.5,
|
||||
"idd6q": 0.1,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.1,
|
||||
"vddq": 1.1
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 8,
|
||||
"CCDMW": 32,
|
||||
"CKE": 12,
|
||||
"CKESR": 24,
|
||||
"CL": 12,
|
||||
"DQSCK": 3,
|
||||
"ESCKE": 24,
|
||||
"FAW": 64,
|
||||
"PPD": 4,
|
||||
"RAS": 68,
|
||||
"RC": 97,
|
||||
"RCD": 29,
|
||||
"REFIAB": 6246,
|
||||
"REFIPB": 780,
|
||||
"RFCAB": 448,
|
||||
"RFCPB": 224,
|
||||
"RL": 28,
|
||||
"RPAB": 34,
|
||||
"RPPB": 29,
|
||||
"RRD": 16,
|
||||
"RTP": 12,
|
||||
"WL": 14,
|
||||
"WR": 29,
|
||||
"WTR": 16,
|
||||
"XP": 12,
|
||||
"XS": 458,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,98 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_6Gb_LPDDR3-3200_16bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="49152" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="16" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="1600" />
|
||||
<parameter id="REFIAB" type="uint" value="6246" />
|
||||
<parameter id="REFIPB" type="uint" value="780" />
|
||||
<parameter id="RFCAB" type="uint" value="448" />
|
||||
<parameter id="RFCPB" type="uint" value="224" />
|
||||
<parameter id="RL" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="14" />
|
||||
<parameter id="CL" type="uint" value="12" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RPAB" type="uint" value="34" />
|
||||
<parameter id="RPPB" type="uint" value="29" />
|
||||
<parameter id="PPD" type="uint" value="4" />
|
||||
<parameter id="RAS" type="uint" value="68" />
|
||||
<parameter id="RCD" type="uint" value="29" />
|
||||
<parameter id="RC" type="uint" value="97" />
|
||||
<parameter id="FAW" type="uint" value="64" />
|
||||
<parameter id="RRD" type="uint" value="16" />
|
||||
<parameter id="RTP" type="uint" value="12" />
|
||||
<parameter id="WR" type="uint" value="29" />
|
||||
<parameter id="CCD" type="uint" value="8" />
|
||||
<parameter id="CCDMW" type="uint" value="32" />
|
||||
<parameter id="WTR" type="uint" value="16" />
|
||||
<parameter id="DQSCK" type="uint" value="3" />
|
||||
<parameter id="XP" type="uint" value="12" />
|
||||
<parameter id="XS" type="uint" value="458" />
|
||||
<parameter id="ESCKE" type="uint" value="24" />
|
||||
<parameter id="CKE" type="uint" value="12" />
|
||||
<parameter id="CKESR" type="uint" value="24" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="3.5" />
|
||||
<parameter id="idd02" type="double" value="45.0" />
|
||||
<parameter id="idd0ql" type="double" value="0.75" />
|
||||
<parameter id="idd2p" type="double" value="1.2" />
|
||||
<parameter id="idd2p2" type="double" value="3.0" />
|
||||
<parameter id="idd2pQ" type="double" value="0.75" />
|
||||
<parameter id="idd2ps" type="double" value="1.2" />
|
||||
<parameter id="idd2ps2" type="double" value="3.0" />
|
||||
<parameter id="idd2psq" type="double" value="0.75" />
|
||||
<parameter id="idd2n" type="double" value="2.0" />
|
||||
<parameter id="idd2n2" type="double" value="27.0" />
|
||||
<parameter id="idd2nQ" type="double" value="0.75" />
|
||||
<parameter id="idd2ns" type="double" value="2.0" />
|
||||
<parameter id="idd2ns2" type="double" value="23.0" />
|
||||
<parameter id="idd2nsq" type="double" value="0.75" />
|
||||
<parameter id="idd3p" type="double" value="1.2" />
|
||||
<parameter id="idd3p2" type="double" value="9.0" />
|
||||
<parameter id="idd3pQ" type="double" value="0.75" />
|
||||
<parameter id="idd3ps" type="double" value="1.2" />
|
||||
<parameter id="idd3ps2" type="double" value="9.0" />
|
||||
<parameter id="idd3psq" type="double" value="0.75" />
|
||||
<parameter id="idd3n" type="double" value="2.25" />
|
||||
<parameter id="idd3n2" type="double" value="30.0" />
|
||||
<parameter id="idd3nQ" type="double" value="0.75" />
|
||||
<parameter id="idd3ns" type="double" value="2.25" />
|
||||
<parameter id="idd3ns2" type="double" value="30.0" />
|
||||
<parameter id="idd3nsq" type="double" value="0.75" />
|
||||
<parameter id="idd4r" type="double" value="2.25" />
|
||||
<parameter id="idd4r2" type="double" value="275.0" />
|
||||
<parameter id="idd4rq" type="double" value="150.0" />
|
||||
<parameter id="idd4w" type="double" value="2.25.0" />
|
||||
<parameter id="idd4w2" type="double" value="210.0" />
|
||||
<parameter id="idd4wq" type="double" value="55.0" />
|
||||
<!-- refresh after every trfc -->
|
||||
<parameter id="idd5" type="double" value="10.0" />
|
||||
<parameter id="idd52" type="double" value="90.0" />
|
||||
<parameter id="idd5q" type="double" value="0.75" />
|
||||
<!-- ref once in every trefi -->
|
||||
<parameter id="idd5ab" type="double" value="2.5" />
|
||||
<parameter id="idd5ab2" type="double" value="30.0" />
|
||||
<parameter id="idd5abq" type="double" value="0.75" />
|
||||
<!-- perbank ref, ref once in every trefi/8 -->
|
||||
<parameter id="idd5b" type="double" value="2.5" />
|
||||
<parameter id="idd5b2" type="double" value="30.0" />
|
||||
<parameter id="idd5bq" type="double" value="0.75" />
|
||||
<parameter id="idd6" type="double" value="0.3" />
|
||||
<parameter id="idd62" type="double" value="0.5" />
|
||||
<parameter id="idd6q" type="double" value="0.1" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.1" />
|
||||
<parameter id="vddq" type="double" value="1.1" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,35 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfRows": 2048,
|
||||
"width": 128
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 3,
|
||||
"RAS": 6,
|
||||
"RC": 9,
|
||||
"RCD": 3,
|
||||
"REFI": 300,
|
||||
"RFC": 22,
|
||||
"RL": 3,
|
||||
"RP": 3,
|
||||
"RRD": 2,
|
||||
"RTP": 4,
|
||||
"TAW": 10,
|
||||
"WL": 1,
|
||||
"WR": 2,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XS": 2,
|
||||
"clkMhz": 166
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,65 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-200_128bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="128" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<!-- <parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="128" />-->
|
||||
<parameter id="nbrOfRows" type="uint" value="2048" />
|
||||
<parameter id="dataRate" type="uint" value="1" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="166" />
|
||||
<parameter id="RC" type="uint" value="9" /><!--tRP+tRAS-->
|
||||
<parameter id="RCD" type="uint" value="3" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="RP" type="uint" value="3" />
|
||||
<parameter id="RFC" type="uint" value="22" />
|
||||
<parameter id="RAS" type="uint" value="6" />
|
||||
<parameter id="WL" type="uint" value="1" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<!--<parameter id="DQSCK" type="uint" value="1" />-->
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="2" />
|
||||
<!--<parameter id="XPDLL" type="uint" value="2" />-->
|
||||
<parameter id="XS" type="uint" value="2" /><!--tRFC+2clk-->
|
||||
<!--<parameter id="XSDLL" type="uint" value="20" />-->
|
||||
<parameter id="REFI" type="uint" value="300" />
|
||||
<parameter id="TAW" type="uint" value="10" />
|
||||
<parameter id="RRD" type="uint" value="2" />
|
||||
<parameter id="CCD" type="uint" value="1" />
|
||||
<parameter id="WTR" type="uint" value="3" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="3" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<!-- <parameter id="idd0" type="double" value="5.88" />
|
||||
<parameter id="idd02" type="double" value="21.18" />
|
||||
<parameter id="idd2p0" type="double" value="0.05" />
|
||||
<parameter id="idd2p02" type="double" value="0.17" />
|
||||
<parameter id="idd2p1" type="double" value="0.05" />
|
||||
<parameter id="idd2p12" type="double" value="0.17" />
|
||||
<parameter id="idd2n" type="double" value="0.13" />
|
||||
<parameter id="idd2n2" type="double" value="4.04" />
|
||||
<parameter id="idd3p0" type="double" value="0.25" />
|
||||
<parameter id="idd3p02" type="double" value="1.49" />
|
||||
<parameter id="idd3p1" type="double" value="0.25" />
|
||||
<parameter id="idd3p12" type="double" value="1.49" />
|
||||
<parameter id="idd3n" type="double" value="0.52" />
|
||||
<parameter id="idd3n2" type="double" value="6.55" />
|
||||
<parameter id="idd4r" type="double" value="1.41" />
|
||||
<parameter id="idd4r2" type="double" value="85.73" />
|
||||
<parameter id="idd4w" type="double" value="1.42" />
|
||||
<parameter id="idd4w2" type="double" value="60.79" />
|
||||
<parameter id="idd5" type="double" value="14.43" />
|
||||
<parameter id="idd52" type="double" value="48.17" />
|
||||
<parameter id="idd6" type="double" value="0.07" />
|
||||
<parameter id="idd62" type="double" value="0.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />-->
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
35
DRAMSys/library/resources/configs/memspecs/MatzesWideIO.json
Normal file
35
DRAMSys/library/resources/configs/memspecs/MatzesWideIO.json
Normal file
@@ -0,0 +1,35 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfRows": 2048,
|
||||
"width": 128
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 3,
|
||||
"RAS": 6,
|
||||
"RC": 9,
|
||||
"RCD": 3,
|
||||
"REFI": 1300,
|
||||
"RFC": 22,
|
||||
"RL": 3,
|
||||
"RP": 3,
|
||||
"RRD": 2,
|
||||
"RTP": 4,
|
||||
"TAW": 10,
|
||||
"WL": 1,
|
||||
"WR": 2,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XS": 20,
|
||||
"clkMhz": 166
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,66 +0,0 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-200_128bit" />
|
||||
<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="128" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<!-- <parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="128" />-->
|
||||
<parameter id="nbrOfRows" type="uint" value="2048" />
|
||||
<parameter id="dataRate" type="uint" value="1" />
|
||||
<parameter id="burstLength" type="uint" value="4" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="166" />
|
||||
<parameter id="RC" type="uint" value="9" /><!--tRP+tRAS-->
|
||||
<parameter id="RCD" type="uint" value="3" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="RP" type="uint" value="3" />
|
||||
<parameter id="RFC" type="uint" value="22" />
|
||||
<parameter id="RAS" type="uint" value="6" />
|
||||
<parameter id="WL" type="uint" value="1" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<!--<parameter id="DQSCK" type="uint" value="1" />-->
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="2" />
|
||||
<!--<parameter id="XPDLL" type="uint" value="2" />-->
|
||||
<parameter id="XS" type="uint" value="20" /><!--tRFC+2clk-->
|
||||
<!--<parameter id="XSDLL" type="uint" value="20" />-->
|
||||
<parameter id="REFI" type="uint" value="1300" />
|
||||
<!--<parameter id="CL" type="uint" value="3" />-->
|
||||
<parameter id="TAW" type="uint" value="10" />
|
||||
<parameter id="RRD" type="uint" value="2" />
|
||||
<parameter id="CCD" type="uint" value="1" />
|
||||
<parameter id="WTR" type="uint" value="3" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="3" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<!-- <parameter id="idd0" type="double" value="5.88" />
|
||||
<parameter id="idd02" type="double" value="21.18" />
|
||||
<parameter id="idd2p0" type="double" value="0.05" />
|
||||
<parameter id="idd2p02" type="double" value="0.17" />
|
||||
<parameter id="idd2p1" type="double" value="0.05" />
|
||||
<parameter id="idd2p12" type="double" value="0.17" />
|
||||
<parameter id="idd2n" type="double" value="0.13" />
|
||||
<parameter id="idd2n2" type="double" value="4.04" />
|
||||
<parameter id="idd3p0" type="double" value="0.25" />
|
||||
<parameter id="idd3p02" type="double" value="1.49" />
|
||||
<parameter id="idd3p1" type="double" value="0.25" />
|
||||
<parameter id="idd3p12" type="double" value="1.49" />
|
||||
<parameter id="idd3n" type="double" value="0.52" />
|
||||
<parameter id="idd3n2" type="double" value="6.55" />
|
||||
<parameter id="idd4r" type="double" value="1.41" />
|
||||
<parameter id="idd4r2" type="double" value="85.73" />
|
||||
<parameter id="idd4w" type="double" value="1.42" />
|
||||
<parameter id="idd4w2" type="double" value="60.79" />
|
||||
<parameter id="idd5" type="double" value="14.43" />
|
||||
<parameter id="idd52" type="double" value="48.17" />
|
||||
<parameter id="idd6" type="double" value="0.07" />
|
||||
<parameter id="idd62" type="double" value="0.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />-->
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user