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Merge branch 'lpddr5' into 'develop'

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Add LPDDR5X configurations and separate tRCD into tRCDRD and tRCDWR

See merge request ems/astdm/modeling.dram/dram.sys.5!12
This commit is contained in:
Lukas Steiner
2023-03-30 13:12:30 +00:00
parent b29c67481d b086fa985d
commit daecc19252
79 changed files with 1872 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-0533.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 3,
"RCD_L": 3,
"RCD_S": 3,
"PPD": 2,
"RPab": 3,
"RPpb": 3,

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1067.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 5,
"RCD_L": 5,
"RCD_S": 5,
"PPD": 2,
"RPab": 6,
"RPpb": 5,

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1600.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 8,
"RCD_L": 8,
"RCD_S": 8,
"PPD": 2,
"RPab": 9,
"RPpb": 8,

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2133.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2750.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-3200.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-0533.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 2,
"RCD_S": 2,
"PPD": 2,
"RPab": 2,
"RPpb": 2,
"RAS": 3,
"RCab": 5,
"RCpb": 5,
"FAW": 2,
"RRD": 2,
"RL": 3,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 2,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 3,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 261,
"REFIpb": 32,
"RFCab": 19,
"RFCpb": 10,
"RFMab": 19,
"RFMpb": 10,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 1,
"pbR2pbR": 7,
"clkMhz": 67
}
}
}

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-1067.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 3,
"RCD_S": 2,
"PPD": 2,
"RPab": 3,
"RPpb": 3,
"RAS": 6,
"RCab": 9,
"RCpb": 8,
"FAW": 2,
"RRD": 2,
"RL": 4,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 2,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 5,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 520,
"REFIpb": 65,
"RFCab": 38,
"RFCpb": 19,
"RFMab": 38,
"RFMpb": 19,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 1,
"pbR2pbR": 12,
"clkMhz": 133
}
}
}

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-1600.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 4,
"RCD_S": 2,
"PPD": 2,
"RPab": 5,
"RPpb": 4,
"RAS": 9,
"RCab": 13,
"RCpb": 12,
"FAW": 3,
"RRD": 2,
"RL": 5,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 3,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 7,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 781,
"REFIpb": 97,
"RFCab": 56,
"RFCpb": 28,
"RFMab": 56,
"RFMpb": 28,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 2,
"pbR2pbR": 18,
"clkMhz": 200
}
}
}

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-2133.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 5,
"RCD_S": 3,
"PPD": 2,
"RPab": 6,
"RPpb": 5,
"RAS": 12,
"RCab": 17,
"RCpb": 16,
"FAW": 4,
"RRD": 2,
"RL": 6,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 4,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 10,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1041,
"REFIpb": 130,
"RFCab": 75,
"RFCpb": 38,
"RFMab": 75,
"RFMpb": 38,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 2,
"pbR2pbR": 24,
"clkMhz": 267
}
}
}

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-2750.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 7,
"RCD_S": 3,
"PPD": 2,
"RPab": 8,
"RPpb": 7,
"RAS": 15,
"RCab": 22,
"RCpb": 21,
"FAW": 6,
"RRD": 2,
"RL": 8,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 1,
"RPRE": 0,
"RPST": 0,
"WL": 4,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 12,
"WTR_L": 5,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1346,
"REFIpb": 168,
"RFCab": 97,
"RFCpb": 49,
"RFMab": 97,
"RFMpb": 49,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 3,
"pbR2pbR": 32,
"clkMhz": 344
}
}
}

63
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5X-3200.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5X-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 8,
"RCD_S": 4,
"PPD": 2,
"RPab": 9,
"RPpb": 8,
"RAS": 17,
"RCab": 26,
"RCpb": 24,
"FAW": 6,
"RRD": 2,
"RL": 9,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 1,
"RPRE": 0,
"RPST": 0,
"WL": 5,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 14,
"WTR_L": 5,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1562,
"REFIpb": 195,
"RFCab": 112,
"RFCpb": 56,
"RFMab": 112,
"RFMpb": 56,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 3,
"pbR2pbR": 36,
"clkMhz": 400
}
}
}

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-0533.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 3,
"RCD_L": 3,
"RCD_S": 3,
"PPD": 2,
"RPab": 3,
"RPpb": 3,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1067.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 5,
"RCD_L": 5,
"RCD_S": 5,
"PPD": 2,
"RPab": 6,
"RPpb": 5,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1600.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 8,
"RCD_L": 8,
"RCD_S": 8,
"PPD": 2,
"RPab": 9,
"RPpb": 8,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2133.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2750.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3200.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3733.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 9,
"RCD_L": 9,
"RCD_S": 9,
"PPD": 2,
"RPab": 10,
"RPpb": 9,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4267.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4800.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 11,
"RCD_L": 11,
"RCD_S": 11,
"PPD": 2,
"RPab": 13,
"RPpb": 11,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-5500.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6000.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 14,
"RCD_L": 14,
"RCD_S": 14,
"PPD": 2,
"RPab": 16,
"RPpb": 14,

3
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6400.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-3733.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 9,
"RCD_L": 9,
"RCD_S": 9,
"PPD": 2,
"RPab": 10,
"RPpb": 9,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4267.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4800.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 11,
"RCD_L": 11,
"RCD_S": 11,
"PPD": 2,
"RPab": 13,
"RPpb": 11,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-5500.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6000.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 14,
"RCD_L": 14,
"RCD_S": 14,
"PPD": 2,
"RPab": 16,
"RPpb": 14,

3
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6400.json
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@@ -16,7 +16,8 @@
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-3733.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 9,
"RCD_S": 4,
"PPD": 2,
"RPab": 10,
"RPpb": 9,
"RAS": 20,
"RCab": 30,
"RCpb": 28,
"FAW": 7,
"RRD": 2,
"RL": 10,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 2,
"RPRE": 0,
"RPST": 0,
"WL": 6,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 16,
"WTR_L": 6,
"WTR_S": 4,
"CCDMW": 16,
"REFI": 1816,
"REFIpb": 226,
"RFCab": 131,
"RFCpb": 66,
"RFMab": 131,
"RFMpb": 66,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 4,
"pbR2pbR": 42,
"clkMhz": 467
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-4267.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 10,
"RCD_S": 5,
"PPD": 2,
"RPab": 12,
"RPpb": 10,
"RAS": 23,
"RCab": 34,
"RCpb": 32,
"FAW": 8,
"RRD": 2,
"RL": 12,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 2,
"RPRE": 0,
"RPST": 0,
"WL": 6,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 19,
"WTR_L": 7,
"WTR_S": 4,
"CCDMW": 16,
"REFI": 2083,
"REFIpb": 260,
"RFCab": 150,
"RFCpb": 75,
"RFMab": 150,
"RFMpb": 75,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 4,
"pbR2pbR": 48,
"clkMhz": 533
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-4800.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 11,
"RCD_S": 5,
"PPD": 2,
"RPab": 13,
"RPpb": 11,
"RAS": 26,
"RCab": 38,
"RCpb": 36,
"FAW": 9,
"RRD": 3,
"RL": 13,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 3,
"RPRE": 0,
"RPST": 0,
"WL": 7,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 21,
"WTR_L": 8,
"WTR_S": 4,
"CCDMW": 16,
"REFI": 2343,
"REFIpb": 292,
"RFCab": 168,
"RFCpb": 84,
"RFMab": 168,
"RFMpb": 84,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 5,
"pbR2pbR": 54,
"clkMhz": 600
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-5500.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 13,
"RCD_S": 6,
"PPD": 2,
"RPab": 15,
"RPpb": 13,
"RAS": 29,
"RCab": 44,
"RCpb": 42,
"FAW": 11,
"RRD": 3,
"RL": 15,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 8,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 24,
"WTR_L": 9,
"WTR_S": 5,
"CCDMW": 16,
"REFI": 2688,
"REFIpb": 335,
"RFCab": 193,
"RFCpb": 97,
"RFMab": 193,
"RFMpb": 97,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 6,
"pbR2pbR": 62,
"clkMhz": 688
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-6000.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 14,
"RCD_S": 7,
"PPD": 2,
"RPab": 16,
"RPpb": 14,
"RAS": 32,
"RCab": 48,
"RCpb": 46,
"FAW": 12,
"RRD": 3,
"RL": 16,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 9,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 26,
"WTR_L": 10,
"WTR_S": 5,
"CCDMW": 16,
"REFI": 2930,
"REFIpb": 366,
"RFCab": 211,
"RFCpb": 106,
"RFMab": 211,
"RFMpb": 106,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 6,
"pbR2pbR": 68,
"clkMhz": 750
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-6400.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 15,
"RCD_S": 7,
"PPD": 2,
"RPab": 17,
"RPpb": 15,
"RAS": 34,
"RCab": 51,
"RCpb": 48,
"FAW": 12,
"RRD": 3,
"RL": 17,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 9,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 28,
"WTR_L": 10,
"WTR_S": 5,
"CCDMW": 16,
"REFI": 3124,
"REFIpb": 390,
"RFCab": 224,
"RFCpb": 112,
"RFMab": 224,
"RFMpb": 112,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 6,
"pbR2pbR": 72,
"clkMhz": 800
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-7500.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-7500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 17,
"RCD_S": 8,
"PPD": 2,
"RPab": 20,
"RPpb": 17,
"RAS": 40,
"RCab": 60,
"RCpb": 57,
"FAW": 15,
"RRD": 4,
"RL": 20,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 6,
"RPRE": 0,
"RPST": 0,
"WL": 11,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 32,
"WTR_L": 12,
"WTR_S": 6,
"CCDMW": 16,
"REFI": 3661,
"REFIpb": 457,
"RFCab": 263,
"RFCpb": 132,
"RFMab": 263,
"RFMpb": 132,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 8,
"pbR2pbR": 85,
"clkMhz": 938
}
}
}

63
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5X-8533.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 65536,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5X-8533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 20,
"RCD_S": 9,
"PPD": 2,
"RPab": 23,
"RPpb": 20,
"RAS": 45,
"RCab": 68,
"RCpb": 64,
"FAW": 16,
"RRD": 4,
"RL": 23,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 6,
"RPRE": 0,
"RPST": 0,
"WL": 12,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 37,
"WTR_L": 13,
"WTR_S": 7,
"CCDMW": 16,
"REFI": 4165,
"REFIpb": 520,
"RFCab": 299,
"RFCpb": 150,
"RFMab": 299,
"RFMpb": 150,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 2,
"BL_n_min_32": 6,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 2,
"pbR2act": 8,
"pbR2pbR": 96,
"clkMhz": 1067
}
}
}

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-0533.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 3,
"RCD_L": 3,
"RCD_S": 3,
"PPD": 2,
"RPab": 3,
"RPpb": 3,

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1067.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 5,
"RCD_L": 5,
"RCD_S": 5,
"PPD": 2,
"RPab": 6,
"RPpb": 5,

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1600.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 8,
"RCD_L": 8,
"RCD_S": 8,
"PPD": 2,
"RPab": 9,
"RPpb": 8,

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2133.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2750.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-3200.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-0533.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 2,
"RCD_S": 2,
"PPD": 2,
"RPab": 2,
"RPpb": 2,
"RAS": 3,
"RCab": 5,
"RCpb": 5,
"FAW": 2,
"RRD": 2,
"RL": 3,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 2,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 3,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 261,
"REFIpb": 32,
"RFCab": 15,
"RFCpb": 9,
"RFMab": 15,
"RFMpb": 9,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 1,
"pbR2pbR": 7,
"clkMhz": 67
}
}
}

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-1067.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 3,
"RCD_S": 2,
"PPD": 2,
"RPab": 3,
"RPpb": 3,
"RAS": 6,
"RCab": 9,
"RCpb": 8,
"FAW": 2,
"RRD": 2,
"RL": 4,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 2,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 5,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 520,
"REFIpb": 65,
"RFCab": 28,
"RFCpb": 16,
"RFMab": 28,
"RFMpb": 16,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 1,
"pbR2pbR": 12,
"clkMhz": 133
}
}
}

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-1600.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 4,
"RCD_S": 2,
"PPD": 2,
"RPab": 5,
"RPpb": 4,
"RAS": 9,
"RCab": 13,
"RCpb": 12,
"FAW": 3,
"RRD": 2,
"RL": 5,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 3,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 7,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 781,
"REFIpb": 97,
"RFCab": 42,
"RFCpb": 24,
"RFMab": 42,
"RFMpb": 24,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 2,
"pbR2pbR": 18,
"clkMhz": 200
}
}
}

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-2133.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 5,
"RCD_S": 3,
"PPD": 2,
"RPab": 6,
"RPpb": 5,
"RAS": 12,
"RCab": 17,
"RCpb": 16,
"FAW": 4,
"RRD": 2,
"RL": 6,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 4,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 10,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1041,
"REFIpb": 130,
"RFCab": 56,
"RFCpb": 32,
"RFMab": 56,
"RFMpb": 32,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 2,
"pbR2pbR": 24,
"clkMhz": 267
}
}
}

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-2750.json Normal file
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@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 7,
"RCD_S": 3,
"PPD": 2,
"RPab": 8,
"RPpb": 7,
"RAS": 15,
"RCab": 22,
"RCpb": 21,
"FAW": 6,
"RRD": 2,
"RL": 8,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 1,
"RPRE": 0,
"RPST": 0,
"WL": 4,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 12,
"WTR_L": 5,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1346,
"REFIpb": 168,
"RFCab": 73,
"RFCpb": 42,
"RFMab": 73,
"RFMpb": 42,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 3,
"pbR2pbR": 32,
"clkMhz": 344
}
}
}

63
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5X-3200.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 8,
"RCD_S": 4,
"PPD": 2,
"RPab": 9,
"RPpb": 8,
"RAS": 17,
"RCab": 26,
"RCpb": 24,
"FAW": 6,
"RRD": 2,
"RL": 9,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 1,
"RPRE": 0,
"RPST": 0,
"WL": 5,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 14,
"WTR_L": 5,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1562,
"REFIpb": 195,
"RFCab": 84,
"RFCpb": 48,
"RFMab": 84,
"RFMpb": 48,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 3,
"pbR2pbR": 36,
"clkMhz": 400
}
}
}

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-0533.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-0533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 3,
"RCD_L": 3,
"RCD_S": 3,
"PPD": 2,
"RPab": 3,
"RPpb": 3,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1067.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-1067",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 5,
"RCD_L": 5,
"RCD_S": 5,
"PPD": 2,
"RPab": 6,
"RPpb": 5,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1600.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 8,
"RCD_L": 8,
"RCD_S": 8,
"PPD": 2,
"RPab": 9,
"RPpb": 8,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2133.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-2133",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2750.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-2750",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3200.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3733.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 9,
"RCD_L": 9,
"RCD_S": 9,
"PPD": 2,
"RPab": 10,
"RPpb": 9,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4267.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4800.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 11,
"RCD_L": 11,
"RCD_S": 11,
"PPD": 2,
"RPab": 13,
"RPpb": 11,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-5500.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6000.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 14,
"RCD_L": 14,
"RCD_S": 14,
"PPD": 2,
"RPab": 16,
"RPpb": 14,

3
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6400.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-3733.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 9,
"RCD_L": 9,
"RCD_S": 9,
"PPD": 2,
"RPab": 10,
"RPpb": 9,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4267.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 10,
"RCD_L": 10,
"RCD_S": 10,
"PPD": 2,
"RPab": 12,
"RPpb": 10,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4800.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 11,
"RCD_L": 11,
"RCD_S": 11,
"PPD": 2,
"RPab": 13,
"RPpb": 11,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-5500.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 13,
"RCD_L": 13,
"RCD_S": 13,
"PPD": 2,
"RPab": 15,
"RPpb": 13,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6000.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 14,
"RCD_L": 14,
"RCD_S": 14,
"PPD": 2,
"RPab": 16,
"RPpb": 14,

3
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6400.json
View File

@@ -16,7 +16,8 @@
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD": 15,
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-3733.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-3733",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 9,
"RCD_S": 4,
"PPD": 2,
"RPab": 10,
"RPpb": 9,
"RAS": 20,
"RCab": 30,
"RCpb": 28,
"FAW": 7,
"RRD": 2,
"RL": 10,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 2,
"RPRE": 0,
"RPST": 0,
"WL": 6,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 16,
"WTR_L": 6,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 1816,
"REFIpb": 226,
"RFCab": 98,
"RFCpb": 56,
"RFMab": 98,
"RFMpb": 56,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 4,
"pbR2pbR": 42,
"clkMhz": 467
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-4267.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-4267",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 10,
"RCD_S": 5,
"PPD": 2,
"RPab": 12,
"RPpb": 10,
"RAS": 23,
"RCab": 34,
"RCpb": 32,
"FAW": 8,
"RRD": 2,
"RL": 12,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 2,
"RPRE": 0,
"RPST": 0,
"WL": 6,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 19,
"WTR_L": 7,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 2083,
"REFIpb": 260,
"RFCab": 112,
"RFCpb": 64,
"RFMab": 112,
"RFMpb": 64,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 4,
"pbR2pbR": 48,
"clkMhz": 533
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-4800.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-4800",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 11,
"RCD_S": 5,
"PPD": 2,
"RPab": 13,
"RPpb": 11,
"RAS": 26,
"RCab": 38,
"RCpb": 36,
"FAW": 9,
"RRD": 3,
"RL": 13,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 3,
"RPRE": 0,
"RPST": 0,
"WL": 7,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 21,
"WTR_L": 8,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 2343,
"REFIpb": 292,
"RFCab": 126,
"RFCpb": 72,
"RFMab": 126,
"RFMpb": 72,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 5,
"pbR2pbR": 54,
"clkMhz": 600
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-5500.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-5500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 13,
"RCD_S": 6,
"PPD": 2,
"RPab": 15,
"RPpb": 13,
"RAS": 29,
"RCab": 44,
"RCpb": 42,
"FAW": 11,
"RRD": 3,
"RL": 15,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 8,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 24,
"WTR_L": 9,
"WTR_S": 5,
"CCDMW": 8,
"REFI": 2688,
"REFIpb": 335,
"RFCab": 145,
"RFCpb": 83,
"RFMab": 145,
"RFMpb": 83,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 6,
"pbR2pbR": 62,
"clkMhz": 688
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-6000.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-6000",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 14,
"RCD_S": 7,
"PPD": 2,
"RPab": 16,
"RPpb": 14,
"RAS": 32,
"RCab": 48,
"RCpb": 46,
"FAW": 12,
"RRD": 3,
"RL": 16,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 9,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 26,
"WTR_L": 10,
"WTR_S": 5,
"CCDMW": 8,
"REFI": 2930,
"REFIpb": 366,
"RFCab": 158,
"RFCpb": 91,
"RFMab": 158,
"RFMpb": 91,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 6,
"pbR2pbR": 68,
"clkMhz": 750
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-6400.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-6400",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 15,
"RCD_S": 7,
"PPD": 2,
"RPab": 17,
"RPpb": 15,
"RAS": 34,
"RCab": 51,
"RCpb": 48,
"FAW": 12,
"RRD": 3,
"RL": 17,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 4,
"RPRE": 0,
"RPST": 0,
"WL": 9,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 28,
"WTR_L": 10,
"WTR_S": 5,
"CCDMW": 8,
"REFI": 3124,
"REFIpb": 390,
"RFCab": 168,
"RFCpb": 96,
"RFMab": 168,
"RFMpb": 96,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 6,
"pbR2pbR": 72,
"clkMhz": 800
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-7500.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-7500",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 17,
"RCD_S": 8,
"PPD": 2,
"RPab": 20,
"RPpb": 17,
"RAS": 40,
"RCab": 60,
"RCpb": 57,
"FAW": 15,
"RRD": 4,
"RL": 20,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 6,
"RPRE": 0,
"RPST": 0,
"WL": 11,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 32,
"WTR_L": 12,
"WTR_S": 6,
"CCDMW": 8,
"REFI": 3661,
"REFIpb": 457,
"RFCab": 197,
"RFCpb": 113,
"RFMab": 197,
"RFMpb": 113,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 8,
"pbR2pbR": 85,
"clkMhz": 938
}
}
}

63
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5X-8533.json Normal file
View File

@@ -0,0 +1,63 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 8,
"nbrOfBankGroups": 4,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-8533",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 20,
"RCD_S": 9,
"PPD": 2,
"RPab": 23,
"RPpb": 20,
"RAS": 45,
"RCab": 68,
"RCpb": 64,
"FAW": 16,
"RRD": 4,
"RL": 23,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 6,
"RPRE": 0,
"RPST": 0,
"WL": 12,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 37,
"WTR_L": 13,
"WTR_S": 7,
"CCDMW": 8,
"REFI": 4165,
"REFIpb": 520,
"RFCab": 224,
"RFCpb": 128,
"RFMab": 224,
"RFMpb": 128,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 8,
"pbR2pbR": 96,
"clkMhz": 1067
}
}
}

10
extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.cpp
View File

@@ -67,7 +67,8 @@ MemSpecLPDDR5::MemSpecLPDDR5(const DRAMSys::Config::MemSpec &memSpec)
tRCpb (tCK * memSpec.memTimingSpec.entries.at("RCpb")),
tPPD (tCK * memSpec.memTimingSpec.entries.at("PPD")),
tRAS (tCK * memSpec.memTimingSpec.entries.at("RAS")),
tRCD (tCK * memSpec.memTimingSpec.entries.at("RCD")),
tRCD_L (tCK * memSpec.memTimingSpec.entries.at("RCD_L")),
tRCD_S (tCK * memSpec.memTimingSpec.entries.at("RCD_S")),
tFAW (tCK * memSpec.memTimingSpec.entries.at("FAW")),
tRRD (tCK * memSpec.memTimingSpec.entries.at("RRD")),
//tCCD (tCK * parseUint(memspec["memtimingspec"], "CCD")),
@@ -154,7 +155,12 @@ sc_time MemSpecLPDDR5::getExecutionTime(Command command, const tlm_generic_paylo
else if (command == Command::PREAB)
return tRPab;
else if (command == Command::ACT)
return tRCD + tCK;
{
if (trans.is_read())
return tRCD_L + tCK;
else
return tRCD_S + tCK;
}
else if (command == Command::RD)
{
if (ControllerExtension::getBurstLength(trans) == 32)

3
extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.h
View File

@@ -57,7 +57,8 @@ public:
const sc_core::sc_time tRCpb;
const sc_core::sc_time tRCab;
const sc_core::sc_time tPPD;
const sc_core::sc_time tRCD;
const sc_core::sc_time tRCD_L;
const sc_core::sc_time tRCD_S;
const sc_core::sc_time tFAW;
const sc_core::sc_time tRRD;
//const sc_core::sc_time tCCD;

4
extensions/standards/LPDDR5/DRAMSys/controller/checker/CheckerLPDDR5.cpp
View File

@@ -91,7 +91,7 @@ sc_time CheckerLPDDR5::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD + memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD_L + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup.ID()];
if (lastCommandStart != sc_max_time())
@@ -245,7 +245,7 @@ sc_time CheckerLPDDR5::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD + memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD_S + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup.ID()];
if (lastCommandStart != sc_max_time())