Some about address mapping in README, but I'm still working on it.
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Éder Ferreira Zulian
191
README.md
191
README.md
@@ -3,7 +3,7 @@ de.uni-kl.ems.dram.vp.system
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Generic DRAM controller simulator and debug tools related to it.
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# Basic Setup
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## Basic Setup
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In a terminal window execute the commands that follow.
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@@ -21,31 +21,30 @@ $ mkdir projects
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Clone the repository.
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```
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$ git clone --recursive https://<user>@git.rhrk.uni-kl.de/EIT-Wehn/dram.vp.system.git
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```
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The *--recursive* flag tells git to initialize all submodules within the
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repository. **DRAMPower** and **tinyxml** are examples third party
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repositories that were embedded within the source tree as submodules.
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It is possible that you will work with a **fork** of the official codebase. A
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fork is a copy of a repository. In that case, after pushing changes into your
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copy you should create a **pull request** in order to your supervisor check
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and possibly bring your changes to the official codebase.
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In case of doubts about which repository you should clone ask your supervisor.
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```
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$ git clone https://<user>@git.rhrk.uni-kl.de/<user>/dram.vp.system.git
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$ git clone --recursive https://<user>@git.rhrk.uni-kl.de/<user>/dram.vp.system.git
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```
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Go to the project directory.
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After cloning go to the project directory.
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```
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$ cd dram.vp.system
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```
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Execute the script below.
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```
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$ ./install_prerequisites.sh
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```
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## With QTCreator
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### With QTCreator
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Execute the *QTCreator*.
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```
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@@ -64,7 +63,7 @@ Repeat the procedure above and build the trace analyser project.
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**File -> Open Project -> dram.vp.sys/analyser/analyser/traceAnalizer.pro**
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## Without QTCreator
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### Without QTCreator
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In case you prefer a command line interface to the QTCreator GUI you can also
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use **qmake** to generate a Makefile and then compile the project.
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@@ -83,116 +82,114 @@ The **dramSys** executable supports one argument which is a XML file that
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contains configurable aspects of the desired simulation. If no argument is
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passed through the command line a default configuration file will be loaded.
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The XML code below shows a typical simulation configuration:
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The XML code below shows a typic configuration:
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```
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<simulation>
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<simconfig>
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<Debug value="1" />
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<DatabaseRecording value="1" />
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<PowerAnalysys value="1" />
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</simconfig>
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<memspecs>
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<memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
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</memspecs>
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<addressmappings>
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<addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
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</addressmappings>
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<memconfigs>
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<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
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</memconfigs>
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<tracesetups>
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<tracesetup id="fifo">
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<device clkMhz="200">voco2.stl</device>
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</tracesetup>
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</tracesetups>
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<simconfig>
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<Debug value="1" />
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<DatabaseRecording value="1" />
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<PowerAnalysis value="1" />
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</simconfig>
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<memspecs>
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<memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
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</memspecs>
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<addressmappings>
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<addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
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Multiple address mappings
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</addressmappings>
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<memconfigs>
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<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
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Multiple mem. configs
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</memconfigs>
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<tracesetups>
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<tracesetup id="fifo">
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<device clkMhz="200">voco2.stl</device>
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</tracesetup>
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</tracesetups>
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</simulation>
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```
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Some configuration fields reference other XML files which contain more
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specialized chunks of the configuration, e.g. memory specification and address
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mapping.
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specialized chunks of the configuration like memory specification, address
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mapping and memory configurations.
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The XML configuration files are parsed by the program and the configuration
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details extracted are assigned to the correspondent attributes of the internal
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configuration structure.
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#### Configuration File Sections
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The main configuration file is divided into self-contained sections, each of
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these sections is a set of logically related configuration aspects for the
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simulation.
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The list below, which is not intended to be exhaustive, present the
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configuration sections and possible configuration fields.
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Below are listed the configuration sections and configuration fields.
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- Simulator configuration
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- Database recording
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- Power analysis
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- Debug mode
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- **Simulator configuration**
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- *Debug* (boolean)
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- "1": Enables debug output on console
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- "0": Disables debug output
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- *DatabaseRecording* (boolean)
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- "1": Enables trace file recording for the trace analyser tool
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- "0": Disables trace file recording
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- *PowerAnalysis* (boolean)
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- "1": Enables live power analysis with the DRAMPower tool
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- "0": Disables power analysis
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- Memory specification
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- Memory ID: JEDEC_256Mb_WIDEIO_SDR-200_128bit,
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MICRON_4Gb_DDR4-2400_8bit_A, ...
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- Memory type: WIDEIO_SD, DDR4, ...
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- **Memory specification**
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- Memory Architecture Specification
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- Width
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- Number of Banks
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- Number of Ranks
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- Number of Columns
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- Number of Rows
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- Data Rate
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- Burst Length
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A file with memory specifications. Usually, this information comes from
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datasheet and does not change.
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- Memory Timing Specification (memory dependent)
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- Clock in MHz
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- RC
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- RCD
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- RL
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- RP
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- RFC
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- RAS
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- WL
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- AL
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- DQSCK
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- RTP
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- WR
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- XP
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- XPDLL
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- XS
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- XSDLL
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- REFI
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- CL
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- TAW
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- RRD
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- CCD
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- WTR
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- CKE
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- CKESR
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- **Address Mapping**
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- Memory Power Specification
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XML files describe the address mapping to be used in the simulation.
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- Address Mapping
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- Length: address length in bits
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- Row: bits used for the row
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- Bank: bits used for the bank
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- Column: bits used for the column
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"dram/resources/configs/amconfigs/am_wideio.xml"
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- Memory Configuration
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- Bankwise Logic
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- Open Page Policy
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- Maximum Number of Transactions
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- Scheduler
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- Capacitor size
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- Powerdown Mode
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- Powerdown Timeout
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- Chip seed
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- CSV file
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- Storage Mode value
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```
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<addressmapping>
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<channel from="27" to="28"/>
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<row from="14" to="26"/>
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<column from="7" to="13"/>
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<bank from="4" to="6" />
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<bytes from="0" to="3" />
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</addressmapping>
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```
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"dram/resources/configs/amconfigs/am_ddr4.xml"
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```
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
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<!-- highest bank parallelism - high hits -->
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<dramconfig>
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<addressmap length="32">
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<row from="19" to="31"/>
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<column from="9" to="18"/>
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<bank from="5" to="8" />
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</addressmap>
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</dramconfig>
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```
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- **Memory Configuration**
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<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
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Multiple mem. configs --> repeat for all...
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- **Trace setups**
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<tracesetup id="fifo">
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<device clkMhz="200">voco2.stl</device>
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Some attributes are self-explanatory while others require some previous
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knowhow of memory technologies or some knowledge of the simulator source code.
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1835
docs/images/am_ddr4.svg
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1792
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