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Some about address mapping in README, but I'm still working on it.

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Éder Ferreira Zulian
2015-05-20 13:02:11 +02:00
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README.md
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@@ -3,7 +3,7 @@ de.uni-kl.ems.dram.vp.system
Generic DRAM controller simulator and debug tools related to it. Generic DRAM controller simulator and debug tools related to it.
# Basic Setup ## Basic Setup
In a terminal window execute the commands that follow. In a terminal window execute the commands that follow.
@@ -21,31 +21,30 @@ $ mkdir projects
Clone the repository. Clone the repository.
```
$ git clone --recursive https://<user>@git.rhrk.uni-kl.de/EIT-Wehn/dram.vp.system.git
```
The *--recursive* flag tells git to initialize all submodules within the
repository. **DRAMPower** and **tinyxml** are examples third party
repositories that were embedded within the source tree as submodules.
It is possible that you will work with a **fork** of the official codebase. A It is possible that you will work with a **fork** of the official codebase. A
fork is a copy of a repository. In that case, after pushing changes into your fork is a copy of a repository. In that case, after pushing changes into your
copy you should create a **pull request** in order to your supervisor check copy you should create a **pull request** in order to your supervisor check
and possibly bring your changes to the official codebase. and possibly bring your changes to the official codebase.
In case of doubts about which repository you should clone ask your supervisor.
``` ```
$ git clone https://<user>@git.rhrk.uni-kl.de/<user>/dram.vp.system.git $ git clone --recursive https://<user>@git.rhrk.uni-kl.de/<user>/dram.vp.system.git
``` ```
Go to the project directory. After cloning go to the project directory.
``` ```
$ cd dram.vp.system $ cd dram.vp.system
``` ```
Execute the script below. ### With QTCreator
```
$ ./install_prerequisites.sh
```
## With QTCreator
Execute the *QTCreator*. Execute the *QTCreator*.
``` ```
@@ -64,7 +63,7 @@ Repeat the procedure above and build the trace analyser project.
**File -> Open Project -> dram.vp.sys/analyser/analyser/traceAnalizer.pro** **File -> Open Project -> dram.vp.sys/analyser/analyser/traceAnalizer.pro**
## Without QTCreator ### Without QTCreator
In case you prefer a command line interface to the QTCreator GUI you can also In case you prefer a command line interface to the QTCreator GUI you can also
use **qmake** to generate a Makefile and then compile the project. use **qmake** to generate a Makefile and then compile the project.
@@ -83,116 +82,114 @@ The **dramSys** executable supports one argument which is a XML file that
contains configurable aspects of the desired simulation. If no argument is contains configurable aspects of the desired simulation. If no argument is
passed through the command line a default configuration file will be loaded. passed through the command line a default configuration file will be loaded.
The XML code below shows a typical simulation configuration: The XML code below shows a typic configuration:
``` ```
<simulation> <simulation>
<simconfig>
<Debug value="1" />
<DatabaseRecording value="1" />
<PowerAnalysys value="1" />
</simconfig>
<memspecs>
<memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<addressmappings>
<addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<memconfigs>
<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
</memconfigs>
<tracesetups> <simconfig>
<tracesetup id="fifo"> <Debug value="1" />
<device clkMhz="200">voco2.stl</device> <DatabaseRecording value="1" />
</tracesetup> <PowerAnalysis value="1" />
</tracesetups> </simconfig>
<memspecs>
<memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<addressmappings>
<addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
Multiple address mappings
</addressmappings>
<memconfigs>
<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
Multiple mem. configs
</memconfigs>
<tracesetups>
<tracesetup id="fifo">
<device clkMhz="200">voco2.stl</device>
</tracesetup>
</tracesetups>
</simulation> </simulation>
``` ```
Some configuration fields reference other XML files which contain more Some configuration fields reference other XML files which contain more
specialized chunks of the configuration, e.g. memory specification and address specialized chunks of the configuration like memory specification, address
mapping. mapping and memory configurations.
The XML configuration files are parsed by the program and the configuration The XML configuration files are parsed by the program and the configuration
details extracted are assigned to the correspondent attributes of the internal details extracted are assigned to the correspondent attributes of the internal
configuration structure. configuration structure.
#### Configuration File Sections #### Configuration File Sections
The main configuration file is divided into self-contained sections, each of The main configuration file is divided into self-contained sections, each of
these sections is a set of logically related configuration aspects for the these sections is a set of logically related configuration aspects for the
simulation. simulation.
The list below, which is not intended to be exhaustive, present the Below are listed the configuration sections and configuration fields.
configuration sections and possible configuration fields.
- Simulator configuration - **Simulator configuration**
- Database recording - *Debug* (boolean)
- Power analysis - "1": Enables debug output on console
- Debug mode - "0": Disables debug output
- *DatabaseRecording* (boolean)
- "1": Enables trace file recording for the trace analyser tool
- "0": Disables trace file recording
- *PowerAnalysis* (boolean)
- "1": Enables live power analysis with the DRAMPower tool
- "0": Disables power analysis
- Memory specification - **Memory specification**
- Memory ID: JEDEC_256Mb_WIDEIO_SDR-200_128bit,
MICRON_4Gb_DDR4-2400_8bit_A, ...
- Memory type: WIDEIO_SD, DDR4, ...
- Memory Architecture Specification A file with memory specifications. Usually, this information comes from
- Width datasheet and does not change.
- Number of Banks
- Number of Ranks
- Number of Columns
- Number of Rows
- Data Rate
- Burst Length
- Memory Timing Specification (memory dependent) - **Address Mapping**
- Clock in MHz
- RC
- RCD
- RL
- RP
- RFC
- RAS
- WL
- AL
- DQSCK
- RTP
- WR
- XP
- XPDLL
- XS
- XSDLL
- REFI
- CL
- TAW
- RRD
- CCD
- WTR
- CKE
- CKESR
- Memory Power Specification XML files describe the address mapping to be used in the simulation.
- Address Mapping "dram/resources/configs/amconfigs/am_wideio.xml"
- Length: address length in bits
- Row: bits used for the row ```
- Bank: bits used for the bank <addressmapping>
- Column: bits used for the column <channel from="27" to="28"/>
<row from="14" to="26"/>
<column from="7" to="13"/>
<bank from="4" to="6" />
<bytes from="0" to="3" />
</addressmapping>
```
- Memory Configuration ![WideIO Address Mapping Sample](docs/images/am_wideio.svg)
- Bankwise Logic
- Open Page Policy
- Maximum Number of Transactions
- Scheduler
- Capacitor size
- Powerdown Mode
- Powerdown Timeout
- Chip seed
- CSV file
- Storage Mode value
"dram/resources/configs/amconfigs/am_ddr4.xml"
```
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!-- highest bank parallelism - high hits -->
<dramconfig>
<addressmap length="32">
<row from="19" to="31"/>
<column from="9" to="18"/>
<bank from="5" to="8" />
</addressmap>
</dramconfig>
```
![DDR4 Address Mapping Sample](docs/images/am_ddr4.svg)
- **Memory Configuration**
<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
Multiple mem. configs --> repeat for all...
- **Trace setups**
<tracesetup id="fifo">
<device clkMhz="200">voco2.stl</device>
Some attributes are self-explanatory while others require some previous Some attributes are self-explanatory while others require some previous
knowhow of memory technologies or some knowledge of the simulator source code. knowhow of memory technologies or some knowledge of the simulator source code.

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