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Fix bug

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This commit is contained in:
Thanh C. Tran
2017-05-16 01:35:10 +02:00
parent 066569c856
commit d489db6a46
2 changed files with 15 additions and 7 deletions
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1
DRAMSys/simulator/resources/configs/mcconfigs/sms.xml
View File

@@ -14,4 +14,5 @@
<ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
<!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
<StoreMode value="NoStorage" />
<ControllerCoreDisableRefresh value="0"/>
</mcconfig>

21
DRAMSys/simulator/src/controller/scheduler/SMS.cpp
View File

@@ -6,6 +6,7 @@ using namespace std;
void SMS::schedule(gp *payload)
{
Thread thread = DramExtension::getExtension(payload).getThread();
bool wasEmpty = isRequestBuffersEmpty();
requestBuffers[thread].emplace_back(payload);
@@ -16,7 +17,9 @@ void SMS::schedule(gp *payload)
inFlightMemRequestCounter[thread]++;
cacheMisses[thread]++;
newRequest.notify(SC_ZERO_TIME);
if (wasEmpty) {
newRequest.notify(SC_ZERO_TIME);
}
}
std::pair<Command, gp*> SMS::getNextRequest(Bank bank)
@@ -228,14 +231,16 @@ bool SMS::isThresholdAgeExceeded(Thread thread, sc_time memClk, std::deque<gp*>:
void SMS::updateMPKCs(sc_time memClk) {
if (sc_time_stamp() % (MPKC_RESET_CYCLE * memClk) <= memClk) {
// reset for every 10k clk cycles
for (auto& mpkc : MPKCs) {
mpkc.second = 0;
for (auto& cacheMiss : cacheMisses) {
MPKCs[cacheMiss.first] = 0;
}
debugManager.printDebugMessage(name(), "Reset MKKCs");
} else {
// update MPKC for every thread
for (auto& mpkc : MPKCs) {
mpkc.second = (cacheMisses[mpkc.first] * 1000.0 * memClk) / (sc_time_stamp());
for (auto& cacheMiss : cacheMisses) {
MPKCs[cacheMiss.first] = (cacheMiss.second * 1000.0 * memClk) / (sc_time_stamp());
}
debugManager.printDebugMessage(name(), "Update MPKCs");
}
}
@@ -245,11 +250,12 @@ bool SMS::isExceededReqBufferSize(Thread thread) {
void SMS::batchFormation(sc_time memClk) {
for (auto& requestBuffer : requestBuffers) {
if (!requestBuffer.second.empty() && !readybatches[requestBuffer.first].empty()) {
if (!requestBuffer.second.empty() && readybatches[requestBuffer.first].empty()) {
if (MPKCs[requestBuffer.first] < LOW_MPKC || isSystemLightlyLoaded()) {
// bypass requests by forming batch with only one request (threshold age is ZERO)
readybatches[requestBuffer.first].emplace_back(requestBuffer.second.front());
requestBuffer.second.pop_front();
debugManager.printDebugMessage(name(), "Bypass requests by forming batch of thread " + to_string(requestBuffer.first.ID()));
} else {
// forming batch with FIFO size & threshold age constraints
auto firstDifferentRowAccessReqIter = requestBuffer.second.begin();
@@ -265,6 +271,7 @@ void SMS::batchFormation(sc_time memClk) {
readybatches[requestBuffer.first].emplace_back(requestBuffer.second.front());
requestBuffer.second.pop_front();
} while (requestBuffer.second.begin() != firstDifferentRowAccessReqIter);
debugManager.printDebugMessage(name(), "Deem batch ready - thread " + to_string(requestBuffer.first.ID()));
}
}
}
@@ -282,7 +289,7 @@ bool SMS::isRequestBuffersEmpty() {
bool SMS::existReadyBatches() {
for (auto& readybatch : readybatches) {
if (readybatch.second.empty()) {
if (!readybatch.second.empty()) {
return true;
}
}