Add common MemoryManager

This commit is contained in:
2024-05-15 15:01:50 +02:00
committed by Derek Christ
parent 417bc26ce1
commit cc85eefaf6
16 changed files with 139 additions and 183 deletions

View File

@@ -43,7 +43,7 @@
#include <tlm>
#include <utility>
ListInitiator::ListInitiator(const sc_core::sc_module_name& name, MemoryManager& memoryManager) :
ListInitiator::ListInitiator(const sc_core::sc_module_name& name, DRAMSys::MemoryManager& memoryManager) :
sc_core::sc_module(name),
iSocket("iSocket"),
peq(this, &ListInitiator::peqCallback),
@@ -64,30 +64,30 @@ void ListInitiator::process()
? tlm::TLM_WRITE_COMMAND
: tlm::TLM_READ_COMMAND;
auto& trans = memoryManager.allocate(testTransactionData.dataLength);
trans.acquire();
auto* trans = memoryManager.allocate(testTransactionData.dataLength);
trans->acquire();
TestExtension* ext = new TestExtension(testTransactionData);
trans.set_auto_extension(ext);
trans->set_auto_extension(ext);
trans.set_command(command);
trans.set_address(testTransactionData.address);
trans.set_data_length(testTransactionData.dataLength);
trans.set_streaming_width(testTransactionData.dataLength);
trans.set_byte_enable_ptr(nullptr);
trans.set_dmi_allowed(false);
trans.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
trans->set_command(command);
trans->set_address(testTransactionData.address);
trans->set_data_length(testTransactionData.dataLength);
trans->set_streaming_width(testTransactionData.dataLength);
trans->set_byte_enable_ptr(nullptr);
trans->set_dmi_allowed(false);
trans->set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
if (trans.is_write())
if (trans->is_write())
std::memcpy(
trans.get_data_ptr(), &testTransactionData.data, testTransactionData.dataLength);
trans->get_data_ptr(), &testTransactionData.data, testTransactionData.dataLength);
if (requestInProgress != nullptr)
{
wait(endRequest);
}
requestInProgress = &trans;
requestInProgress = trans;
tlm::tlm_phase phase = tlm::BEGIN_REQ;
sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
@@ -99,17 +99,17 @@ void ListInitiator::process()
<< "0x" << std::setfill('0') << std::setw(8) << std::hex
<< testTransactionData.data << "(nb_transport) \033[0m" << std::endl;
tlm::tlm_sync_enum status = iSocket->nb_transport_fw(trans, phase, delay);
tlm::tlm_sync_enum status = iSocket->nb_transport_fw(*trans, phase, delay);
if (status == tlm::TLM_UPDATED)
{
peq.notify(trans, phase, delay);
peq.notify(*trans, phase, delay);
}
else if (status == tlm::TLM_COMPLETED)
{
requestInProgress = nullptr;
checkTransaction(trans);
trans.release();
checkTransaction(*trans);
trans->release();
}
}
}

View File

@@ -33,7 +33,7 @@
* Derek Christ
*/
#include "simulator/MemoryManager.h"
#include <DRAMSys/common/MemoryManager.h>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include <tlm_utils/simple_initiator_socket.h>
@@ -44,7 +44,7 @@ public:
tlm_utils::simple_initiator_socket<ListInitiator> iSocket;
SC_HAS_PROCESS(ListInitiator);
ListInitiator(const sc_core::sc_module_name& name, MemoryManager& memoryManager);
ListInitiator(const sc_core::sc_module_name& name, DRAMSys::MemoryManager& memoryManager);
struct TestTransactionData
{
@@ -102,5 +102,5 @@ private:
sc_core::sc_event endRequest;
tlm_utils::peq_with_cb_and_phase<ListInitiator> peq;
tlm::tlm_generic_payload* requestInProgress = nullptr;
MemoryManager& memoryManager;
DRAMSys::MemoryManager& memoryManager;
};

View File

@@ -37,7 +37,7 @@
#include "TargetMemory.h"
#include <simulator/Cache.h>
#include <simulator/MemoryManager.h>
#include <DRAMSys/common/MemoryManager.h>
#include <gtest/gtest.h>
@@ -72,7 +72,7 @@ protected:
cache.iSocket.bind(target.tSocket);
}
MemoryManager memoryManager;
DRAMSys::MemoryManager memoryManager;
ListInitiator initiator;
TargetMemory target;
Cache cache;