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Added RFM to Bank Machines

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This commit is contained in:
Matthias Jung
2021-08-27 18:02:31 +02:00
parent d579f6f8ea
commit cbc5df18ca
5 changed files with 28 additions and 2 deletions
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6
DRAMSys/library/src/configuration/memspec/MemSpec.cpp
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@@ -98,6 +98,12 @@ sc_time MemSpec::getRefreshIntervalSB() const
return SC_ZERO_TIME;
}
uint64_t MemSpec::getRAADEC() const
{
SC_REPORT_FATAL("MemSpec", "Refresh Management not supported");
return 0;
}
bool MemSpec::hasRasAndCasBus() const
{
return false;

2
DRAMSys/library/src/configuration/memspec/MemSpec.h
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@@ -80,6 +80,8 @@ public:
virtual sc_core::sc_time getRefreshIntervalPB() const;
virtual sc_core::sc_time getRefreshIntervalSB() const;
virtual uint64_t getRAADEC() const;
virtual bool hasRasAndCasBus() const;
virtual sc_core::sc_time getExecutionTime(Command command, const tlm::tlm_generic_payload &payload) const = 0;

6
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
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@@ -62,7 +62,6 @@ MemSpecDDR5::MemSpecDDR5(json &memspec)
numberOfLogicalRanks(logicalRanksPerPhysicalRank * numberOfPhysicalRanks),
cmdMode(parseUint(memspec["memarchitecturespec"]["cmdMode"], "cmdMode")),
refMode(parseUint(memspec["memarchitecturespec"]["refMode"], "refMode")),
RFM(parseUint(memspec["memarchitecturespec"]["RFM"], "RFM")),
RAAIMT(parseUint(memspec["memarchitecturespec"]["RAAIMT"], "RAAIMT")),
RAAMMT(parseUint(memspec["memarchitecturespec"]["RAAMMT"], "RAAMMT")),
RAADEC(parseUint(memspec["memarchitecturespec"]["RAADEC"], "RAADEC")),
@@ -192,6 +191,11 @@ sc_time MemSpecDDR5::getRefreshIntervalSB() const
return tREFIsb;
}
uint64_t MemSpecDDR5::getRAADEC() const
{
return RAADEC;
}
// Returns the execution time for commands that have a fixed execution time
sc_time MemSpecDDR5::getExecutionTime(Command command, const tlm_generic_payload &payload) const
{

3
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h
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@@ -52,7 +52,6 @@ public:
const unsigned numberOfLogicalRanks;
const unsigned cmdMode;
const unsigned refMode;
const unsigned RFM;
const unsigned RAAIMT;
const unsigned RAAMMT;
const unsigned RAADEC;
@@ -117,6 +116,8 @@ public:
sc_core::sc_time getRefreshIntervalAB() const override;
sc_core::sc_time getRefreshIntervalSB() const override;
uint64_t getRAADEC() const override;
sc_core::sc_time getExecutionTime(Command command, const tlm::tlm_generic_payload &payload) const override;
TimeInterval getIntervalOnDataStrobe(Command command, const tlm::tlm_generic_payload &payload) const override;
};

13
DRAMSys/library/src/controller/BankMachine.cpp
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@@ -60,6 +60,7 @@ void BankMachine::updateState(Command command)
case Command::ACT:
state = State::Activated;
openRow = DramExtension::getRow(currentPayload);
RFMCounter++;
break;
case Command::PRE: case Command::PREA: case Command::PRESB:
state = State::Precharged;
@@ -77,6 +78,13 @@ void BankMachine::updateState(Command command)
case Command::REFA: case Command::REFB: case Command::REFSB:
sleeping = false;
blocked = false;
if(Configuration::getInstance().RFM == true) {
if (RFMCounter > Configuration::getInstance().memSpec->getRAADEC()) {
RFMCounter -= Configuration::getInstance().memSpec->getRAADEC();
} else {
RFMCounter = 0;
}
}
break;
case Command::PDXA: case Command::PDXP:
sleeping = false;
@@ -86,6 +94,11 @@ void BankMachine::updateState(Command command)
}
}
uint64_t BankMachine::getRFMCounter() const
{
return RFMCounter;
}
void BankMachine::block()
{
blocked = true;