Reorganize config files, remove unused config.
This commit is contained in:
Lukas Steiner
48
configs/memspec/HBM2.json
Normal file
48
configs/memspec/HBM2.json
Normal file
@@ -0,0 +1,48 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 4,
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"dataRate": 2,
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"nbrOfBankGroups": 4,
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"nbrOfBanks": 16,
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"nbrOfColumns": 128,
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"nbrOfPseudoChannels": 2,
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"nbrOfRows": 32768,
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"width": 64,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1
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},
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"memoryId": "https://www.computerbase.de/2019-05/amd-memory-tweak-vram-oc/#bilder",
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"memoryType": "HBM2",
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"memtimingspec": {
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"CCDL": 3,
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"CCDS": 2,
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"CKE": 8,
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"DQSCK": 1,
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"FAW": 16,
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"PL": 0,
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"RAS": 28,
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"RC": 42,
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"RCDRD": 12,
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"RCDWR": 6,
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"REFI": 3900,
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"REFISB": 244,
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"RFC": 220,
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"RFCSB": 96,
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"RL": 17,
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"RP": 14,
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"RRDL": 6,
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"RRDS": 4,
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"RREFD": 8,
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"RTP": 5,
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"RTW": 18,
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"WL": 7,
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"WR": 14,
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"WTRL": 9,
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"WTRS": 4,
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"XP": 8,
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"XS": 216,
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"clkMhz": 1000
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}
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}
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}
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56
configs/memspec/HBM3.json
Normal file
56
configs/memspec/HBM3.json
Normal file
@@ -0,0 +1,56 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 8,
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"dataRate": 4,
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"nbrOfBankGroups": 4,
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"nbrOfBanks": 16,
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"nbrOfColumns": 128,
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"nbrOfPseudoChannels": 2,
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"nbrOfRows": 32768,
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"width": 32,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1,
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"RAAIMT" : 16,
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"RAAMMT" : 96,
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"RAACDR" : 16
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},
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"memoryId": "",
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"memoryType": "HBM3",
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"memtimingspec": {
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"CCDL": 4,
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"CCDS": 2,
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"CKE": 8,
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"DQSCK": 1,
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"FAW": 16,
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"PL": 0,
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"PPD": 2,
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"RAS": 28,
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"RC": 42,
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"RCDRD": 12,
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"RCDWR": 6,
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"REFI": 3900,
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"REFIPB": 122,
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"RFC": 260,
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"RFCPB": 96,
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"RL": 17,
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"RP": 14,
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"RRDL": 6,
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"RRDS": 4,
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"RREFD": 8,
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"RTP": 5,
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"RTW": 18,
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"WL": 12,
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"WR": 23,
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"WTRL": 9,
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"WTRS": 4,
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"XP": 8,
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"XS": 260,
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"clkMhz": 1600
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},
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"memtimingspec_comments": {
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"Annahme": "8-high, 8Gb/die",
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"RFCPB": "TBD?"
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}
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}
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}
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60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-0533.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-0533.json
Normal file
@@ -0,0 +1,60 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 16,
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"dataRate": 4,
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"nbrOfBankGroups": 1,
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"nbrOfBanks": 16,
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"nbrOfColumns": 1024,
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"nbrOfRows": 65536,
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"nbrOfRanks": 1,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1,
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"width": 16,
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"per2BankOffset": 8
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},
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"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-0533",
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"memoryType": "LPDDR5",
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"memtimingspec": {
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"RCD": 3,
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"PPD": 2,
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"RPab": 3,
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"RPpb": 3,
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"RAS": 6,
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"RCab": 9,
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"RCpb": 8,
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"FAW": 3,
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"RRD": 2,
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"RL": 6,
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"WCK2CK": 0,
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"WCK2DQO": 1,
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"RBTP": 0,
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"RPRE": 0,
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"RPST": 0,
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"WL": 4,
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"WCK2DQI": 0,
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"WPRE": 0,
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"WPST": 0,
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"WR": 5,
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"WTR_L": 4,
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"WTR_S": 4,
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"CCDMW": 16,
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"REFI": 520,
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"REFIpb": 65,
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"RFCab": 38,
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"RFCpb": 19,
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"RTRS": 1,
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"BL_n_min_16": 4,
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"BL_n_max_16": 4,
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"BL_n_L_16": 4,
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"BL_n_S_16": 4,
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"BL_n_min_32": 8,
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"BL_n_max_32": 8,
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"BL_n_L_32": 8,
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"BL_n_S_32": 8,
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"pbR2act": 1,
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"pbR2pbR": 12,
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"clkMhz": 133
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}
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}
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}
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60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1067.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1067.json
Normal file
@@ -0,0 +1,60 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 16,
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"dataRate": 4,
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"nbrOfBankGroups": 1,
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"nbrOfBanks": 16,
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"nbrOfColumns": 1024,
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"nbrOfRows": 65536,
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"nbrOfRanks": 1,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1,
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"width": 16,
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"per2BankOffset": 8
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},
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"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-1067",
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"memoryType": "LPDDR5",
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"memtimingspec": {
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"RCD": 5,
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"PPD": 2,
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"RPab": 6,
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"RPpb": 5,
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"RAS": 12,
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"RCab": 17,
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"RCpb": 16,
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"FAW": 6,
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"RRD": 2,
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"RL": 8,
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"WCK2CK": 0,
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"WCK2DQO": 1,
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"RBTP": 0,
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"RPRE": 0,
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"RPST": 0,
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"WL": 4,
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"WCK2DQI": 0,
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"WPRE": 0,
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"WPST": 0,
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"WR": 10,
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"WTR_L": 4,
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"WTR_S": 4,
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"CCDMW": 16,
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"REFI": 1041,
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"REFIpb": 130,
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"RFCab": 75,
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"RFCpb": 38,
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"RTRS": 1,
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"BL_n_min_16": 4,
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"BL_n_max_16": 4,
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"BL_n_L_16": 4,
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"BL_n_S_16": 4,
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"BL_n_min_32": 8,
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"BL_n_max_32": 8,
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"BL_n_L_32": 8,
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"BL_n_S_32": 8,
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"pbR2act": 2,
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"pbR2pbR": 24,
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"clkMhz": 267
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}
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}
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}
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60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1600.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-1600.json
Normal file
@@ -0,0 +1,60 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 16,
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"dataRate": 4,
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"nbrOfBankGroups": 1,
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"nbrOfBanks": 16,
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"nbrOfColumns": 1024,
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"nbrOfRows": 65536,
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"nbrOfRanks": 1,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1,
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"width": 16,
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"per2BankOffset": 8
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},
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"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-1600",
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"memoryType": "LPDDR5",
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"memtimingspec": {
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"RCD": 8,
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"PPD": 2,
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"RPab": 9,
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"RPpb": 8,
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"RAS": 17,
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"RCab": 26,
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"RCpb": 24,
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"FAW": 8,
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"RRD": 2,
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"RL": 10,
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"WCK2CK": 0,
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"WCK2DQO": 1,
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"RBTP": 0,
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"RPRE": 0,
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"RPST": 0,
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"WL": 6,
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"WCK2DQI": 0,
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"WPRE": 0,
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"WPST": 0,
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"WR": 14,
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"WTR_L": 5,
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"WTR_S": 4,
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"CCDMW": 16,
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"REFI": 1562,
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"REFIpb": 195,
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"RFCab": 112,
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"RFCpb": 56,
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"RTRS": 1,
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"BL_n_min_16": 4,
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"BL_n_max_16": 4,
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"BL_n_L_16": 4,
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"BL_n_S_16": 4,
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"BL_n_min_32": 8,
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"BL_n_max_32": 8,
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"BL_n_L_32": 8,
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"BL_n_S_32": 8,
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"pbR2act": 3,
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"pbR2pbR": 36,
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"clkMhz": 400
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}
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}
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}
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60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2133.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2133.json
Normal file
@@ -0,0 +1,60 @@
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{
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 16,
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"dataRate": 4,
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"nbrOfBankGroups": 1,
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"nbrOfBanks": 16,
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"nbrOfColumns": 1024,
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"nbrOfRows": 65536,
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"nbrOfRanks": 1,
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"nbrOfDevices": 1,
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"nbrOfChannels": 1,
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"width": 16,
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"per2BankOffset": 8
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},
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"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-2133",
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"memoryType": "LPDDR5",
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"memtimingspec": {
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||||
"RCD": 10,
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"PPD": 2,
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"RPab": 12,
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"RPpb": 10,
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"RAS": 23,
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||||
"RCab": 34,
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"RCpb": 32,
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"FAW": 11,
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"RRD": 3,
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"RL": 12,
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"WCK2CK": 0,
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"WCK2DQO": 1,
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"RBTP": 0,
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"RPRE": 0,
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||||
"RPST": 0,
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"WL": 8,
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||||
"WCK2DQI": 0,
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||||
"WPRE": 0,
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||||
"WPST": 0,
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||||
"WR": 19,
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||||
"WTR_L": 7,
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||||
"WTR_S": 4,
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||||
"CCDMW": 16,
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||||
"REFI": 2083,
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||||
"REFIpb": 260,
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||||
"RFCab": 150,
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||||
"RFCpb": 75,
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||||
"RTRS": 1,
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||||
"BL_n_min_16": 4,
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||||
"BL_n_max_16": 4,
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||||
"BL_n_L_16": 4,
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||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
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}
|
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}
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60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2750.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-2750.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-2750",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 14,
|
||||
"RRD": 4,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 193,
|
||||
"RFCpb": 97,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-3200.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_16B_LPDDR5-3200.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_16B_LPDDR5-3200",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 18,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 10,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 224,
|
||||
"RFCpb": 112,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-0533.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-0533.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-0533",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 3,
|
||||
"PPD": 2,
|
||||
"RPab": 3,
|
||||
"RPpb": 3,
|
||||
"RAS": 6,
|
||||
"RCab": 9,
|
||||
"RCpb": 8,
|
||||
"FAW": 6,
|
||||
"RRD": 2,
|
||||
"RL": 6,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 5,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 520,
|
||||
"REFIpb": 65,
|
||||
"RFCab": 38,
|
||||
"RFCpb": 19,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 2,
|
||||
"pbR2pbR": 12,
|
||||
"clkMhz": 133
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1067.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1067.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-1067",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 5,
|
||||
"PPD": 2,
|
||||
"RPab": 6,
|
||||
"RPpb": 5,
|
||||
"RAS": 12,
|
||||
"RCab": 17,
|
||||
"RCpb": 16,
|
||||
"FAW": 11,
|
||||
"RRD": 3,
|
||||
"RL": 8,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 10,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1041,
|
||||
"REFIpb": 130,
|
||||
"RFCab": 75,
|
||||
"RFCpb": 38,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 3,
|
||||
"pbR2pbR": 24,
|
||||
"clkMhz": 267
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1600.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-1600.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-1600",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 8,
|
||||
"PPD": 2,
|
||||
"RPab": 9,
|
||||
"RPpb": 8,
|
||||
"RAS": 17,
|
||||
"RCab": 26,
|
||||
"RCpb": 24,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 14,
|
||||
"WTR_L": 5,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1562,
|
||||
"REFIpb": 195,
|
||||
"RFCab": 112,
|
||||
"RFCpb": 56,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 36,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2133.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2133.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-2133",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 22,
|
||||
"RRD": 6,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 150,
|
||||
"RFCpb": 75,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2750.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-2750.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-2750",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 28,
|
||||
"RRD": 7,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 193,
|
||||
"RFCpb": 97,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 7,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3200.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3200.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-3200",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 32,
|
||||
"RRD": 8,
|
||||
"RL": 18,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 10,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 224,
|
||||
"RFCpb": 112,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3733.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-3733.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-3733",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 9,
|
||||
"PPD": 2,
|
||||
"RPab": 10,
|
||||
"RPpb": 9,
|
||||
"RAS": 20,
|
||||
"RCab": 30,
|
||||
"RCpb": 28,
|
||||
"FAW": 19,
|
||||
"RRD": 5,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 16,
|
||||
"WTR_L": 6,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1816,
|
||||
"REFIpb": 226,
|
||||
"RFCab": 131,
|
||||
"RFCpb": 66,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 5,
|
||||
"pbR2pbR": 42,
|
||||
"clkMhz": 467
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4267.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4267.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-4267",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 22,
|
||||
"RRD": 6,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 150,
|
||||
"RFCpb": 75,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4800.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-4800.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-4800",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 11,
|
||||
"PPD": 2,
|
||||
"RPab": 13,
|
||||
"RPpb": 11,
|
||||
"RAS": 26,
|
||||
"RCab": 38,
|
||||
"RCpb": 36,
|
||||
"FAW": 24,
|
||||
"RRD": 6,
|
||||
"RL": 13,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 3,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 7,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 21,
|
||||
"WTR_L": 8,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2343,
|
||||
"REFIpb": 292,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 84,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 54,
|
||||
"clkMhz": 600
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-5500.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-5500.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-5500",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 28,
|
||||
"RRD": 7,
|
||||
"RL": 15,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 193,
|
||||
"RFCpb": 97,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 7,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6000.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6000.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-6000",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 14,
|
||||
"PPD": 2,
|
||||
"RPab": 16,
|
||||
"RPpb": 14,
|
||||
"RAS": 32,
|
||||
"RCab": 48,
|
||||
"RCpb": 46,
|
||||
"FAW": 31,
|
||||
"RRD": 8,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 26,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2930,
|
||||
"REFIpb": 366,
|
||||
"RFCab": 211,
|
||||
"RFCpb": 106,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 68,
|
||||
"clkMhz": 750
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6400.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_8B_LPDDR5-6400.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_8B_LPDDR5-6400",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 32,
|
||||
"RRD": 8,
|
||||
"RL": 17,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 224,
|
||||
"RFCpb": 112,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-3733.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-3733.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-3733",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 9,
|
||||
"PPD": 2,
|
||||
"RPab": 10,
|
||||
"RPpb": 9,
|
||||
"RAS": 20,
|
||||
"RCab": 30,
|
||||
"RCpb": 28,
|
||||
"FAW": 10,
|
||||
"RRD": 3,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 16,
|
||||
"WTR_L": 6,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1816,
|
||||
"REFIpb": 226,
|
||||
"RFCab": 131,
|
||||
"RFCpb": 66,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 42,
|
||||
"clkMhz": 467
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4267.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4267.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-4267",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 11,
|
||||
"RRD": 3,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 150,
|
||||
"RFCpb": 75,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4800.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-4800.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-4800",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 11,
|
||||
"PPD": 2,
|
||||
"RPab": 13,
|
||||
"RPpb": 11,
|
||||
"RAS": 26,
|
||||
"RCab": 38,
|
||||
"RCpb": 36,
|
||||
"FAW": 12,
|
||||
"RRD": 3,
|
||||
"RL": 13,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 3,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 7,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 21,
|
||||
"WTR_L": 8,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2343,
|
||||
"REFIpb": 292,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 84,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 5,
|
||||
"pbR2pbR": 54,
|
||||
"clkMhz": 600
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-5500.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-5500.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-5500",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 14,
|
||||
"RRD": 4,
|
||||
"RL": 15,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 193,
|
||||
"RFCpb": 97,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6000.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6000.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6000",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 14,
|
||||
"PPD": 2,
|
||||
"RPab": 16,
|
||||
"RPpb": 14,
|
||||
"RAS": 32,
|
||||
"RCab": 48,
|
||||
"RCpb": 46,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 26,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2930,
|
||||
"REFIpb": 366,
|
||||
"RFCab": 211,
|
||||
"RFCpb": 106,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 68,
|
||||
"clkMhz": 750
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6400.json
Normal file
60
configs/memspec/JEDEC_1Gbx16_BG_LPDDR5-6400.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 65536,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6400",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 17,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 224,
|
||||
"RFCpb": 112,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-0533.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-0533.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-0533",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 4,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 1,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 11,
|
||||
"PPD": 4,
|
||||
"RCD": 5,
|
||||
"REFI": 1041,
|
||||
"REFIPB": 130,
|
||||
"RFCAB": 102,
|
||||
"RFCPB": 51,
|
||||
"RL": 6,
|
||||
"RAS": 12,
|
||||
"RPAB": 6,
|
||||
"RPPB": 5,
|
||||
"RCAB": 18,
|
||||
"RCPB": 17,
|
||||
"RPST": 0,
|
||||
"RRD": 4,
|
||||
"RTP": 8,
|
||||
"SR": 4,
|
||||
"WL": 4,
|
||||
"WPRE": 2,
|
||||
"WR": 6,
|
||||
"WTR": 8,
|
||||
"XP": 5,
|
||||
"XSR": 104,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 266
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-1066.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-1066.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-1066",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 4,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 1,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 22,
|
||||
"PPD": 4,
|
||||
"RCD": 10,
|
||||
"REFI": 2082,
|
||||
"REFIPB": 260,
|
||||
"RFCAB": 203,
|
||||
"RFCPB": 102,
|
||||
"RL": 10,
|
||||
"RAS": 23,
|
||||
"RPAB": 12,
|
||||
"RPPB": 10,
|
||||
"RCAB": 35,
|
||||
"RCPB": 33,
|
||||
"RPST": 0,
|
||||
"RRD": 6,
|
||||
"RTP": 8,
|
||||
"SR": 8,
|
||||
"WL": 6,
|
||||
"WPRE": 2,
|
||||
"WR": 10,
|
||||
"WTR": 8,
|
||||
"XP": 5,
|
||||
"XSR": 207,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-1600.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-1600.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-1600",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 6,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 32,
|
||||
"PPD": 4,
|
||||
"RCD": 15,
|
||||
"REFI": 3123,
|
||||
"REFIPB": 390,
|
||||
"RFCAB": 304,
|
||||
"RFCPB": 152,
|
||||
"RL": 14,
|
||||
"RAS": 34,
|
||||
"RPAB": 17,
|
||||
"RPPB": 15,
|
||||
"RCAB": 51,
|
||||
"RCPB": 49,
|
||||
"RPST": 0,
|
||||
"RRD": 8,
|
||||
"RTP": 8,
|
||||
"SR": 12,
|
||||
"WL": 8,
|
||||
"WPRE": 2,
|
||||
"WR": 15,
|
||||
"WTR": 8,
|
||||
"XP": 6,
|
||||
"XSR": 310,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-2133.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-2133.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-2133",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 9,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 43,
|
||||
"PPD": 4,
|
||||
"RCD": 20,
|
||||
"REFI": 4166,
|
||||
"REFIPB": 520,
|
||||
"RFCAB": 406,
|
||||
"RFCPB": 203,
|
||||
"RL": 20,
|
||||
"RAS": 45,
|
||||
"RPAB": 23,
|
||||
"RPPB": 20,
|
||||
"RCAB": 68,
|
||||
"RCPB": 65,
|
||||
"RPST": 0,
|
||||
"RRD": 11,
|
||||
"RTP": 9,
|
||||
"SR": 17,
|
||||
"WL": 10,
|
||||
"WPRE": 2,
|
||||
"WR": 20,
|
||||
"WTR": 11,
|
||||
"XP": 9,
|
||||
"XSR": 414,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1066
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-2666.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-2666.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-2666",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 10,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 54,
|
||||
"PPD": 4,
|
||||
"RCD": 24,
|
||||
"REFI": 5205,
|
||||
"REFIPB": 650,
|
||||
"RFCAB": 507,
|
||||
"RFCPB": 254,
|
||||
"RL": 24,
|
||||
"RAS": 56,
|
||||
"RPAB": 28,
|
||||
"RPPB": 24,
|
||||
"RCAB": 84,
|
||||
"RCPB": 80,
|
||||
"RPST": 0,
|
||||
"RRD": 14,
|
||||
"RTP": 10,
|
||||
"SR": 20,
|
||||
"WL": 12,
|
||||
"WPRE": 2,
|
||||
"WR": 24,
|
||||
"WTR": 14,
|
||||
"XP": 10,
|
||||
"XSR": 517,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1333
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-3200.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-3200.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-3200",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 12,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 3,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 64,
|
||||
"PPD": 4,
|
||||
"RCD": 29,
|
||||
"REFI": 6246,
|
||||
"REFIPB": 780,
|
||||
"RFCAB": 608,
|
||||
"RFCPB": 304,
|
||||
"RL": 28,
|
||||
"RAS": 68,
|
||||
"RPAB": 34,
|
||||
"RPPB": 29,
|
||||
"RCAB": 102,
|
||||
"RCPB": 97,
|
||||
"RPST": 0,
|
||||
"RRD": 16,
|
||||
"RTP": 12,
|
||||
"SR": 24,
|
||||
"WL": 14,
|
||||
"WPRE": 2,
|
||||
"WR": 29,
|
||||
"WTR": 16,
|
||||
"XP": 12,
|
||||
"XSR": 460,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-3733.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-3733.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-3733",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 15,
|
||||
"CMDCKE": 4,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 3,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 4,
|
||||
"FAW": 75,
|
||||
"PPD": 4,
|
||||
"RCD": 34,
|
||||
"REFI": 7297,
|
||||
"REFIPB": 912,
|
||||
"RFCAB": 711,
|
||||
"RFCPB": 356,
|
||||
"RL": 32,
|
||||
"RAS": 79,
|
||||
"RPAB": 40,
|
||||
"RPPB": 34,
|
||||
"RCAB": 119,
|
||||
"RCPB": 113,
|
||||
"RPST": 0,
|
||||
"RRD": 19,
|
||||
"RTP": 15,
|
||||
"SR": 29,
|
||||
"WL": 16,
|
||||
"WPRE": 2,
|
||||
"WR": 34,
|
||||
"WTR": 19,
|
||||
"XP": 15,
|
||||
"XSR": 725,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1866
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-4266.json
Normal file
51
configs/memspec/JEDEC_1Gbx16_LPDDR4-4266.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 131072,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_1Gbx16_LPDDR4-4266",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 17,
|
||||
"CMDCKE": 4,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 4,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 4,
|
||||
"FAW": 86,
|
||||
"PPD": 4,
|
||||
"RCD": 39,
|
||||
"REFI": 8341,
|
||||
"REFIPB": 1042,
|
||||
"RFCAB": 812,
|
||||
"RFCPB": 406,
|
||||
"RL": 36,
|
||||
"RAS": 90,
|
||||
"RPAB": 45,
|
||||
"RPPB": 39,
|
||||
"RCAB": 135,
|
||||
"RCPB": 129,
|
||||
"RPST": 0,
|
||||
"RRD": 22,
|
||||
"RTP": 17,
|
||||
"SR": 33,
|
||||
"WL": 18,
|
||||
"WPRE": 2,
|
||||
"WR": 39,
|
||||
"WTR": 22,
|
||||
"XP": 17,
|
||||
"XSR": 828,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 2133
|
||||
}
|
||||
}
|
||||
}
|
||||
67
configs/memspec/JEDEC_256Mb_WIDEIO-200_128bit.json
Normal file
67
configs/memspec/JEDEC_256Mb_WIDEIO-200_128bit.json
Normal file
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 128,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 4096,
|
||||
"width": 128,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 4
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 5.88,
|
||||
"idd02": 21.18,
|
||||
"idd2n": 0.13,
|
||||
"idd2n2": 4.04,
|
||||
"idd2p0": 0.05,
|
||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.52,
|
||||
"idd3n2": 6.55,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.41,
|
||||
"idd4r2": 85.73,
|
||||
"idd4w": 1.42,
|
||||
"idd4w2": 60.79,
|
||||
"idd5": 14.43,
|
||||
"idd52": 48.17,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AC": 1,
|
||||
"CCD_R": 2,
|
||||
"CCD_W": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 3,
|
||||
"DQSCK": 1,
|
||||
"RAS": 9,
|
||||
"RC": 12,
|
||||
"RCD": 4,
|
||||
"REFI": 3120,
|
||||
"RFC": 18,
|
||||
"RL": 3,
|
||||
"RP": 4,
|
||||
"RRD": 2,
|
||||
"TAW": 10,
|
||||
"WL": 1,
|
||||
"WR": 3,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XSR": 20,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 200
|
||||
}
|
||||
}
|
||||
}
|
||||
67
configs/memspec/JEDEC_256Mb_WIDEIO-266_128bit.json
Normal file
67
configs/memspec/JEDEC_256Mb_WIDEIO-266_128bit.json
Normal file
@@ -0,0 +1,67 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 1,
|
||||
"nbrOfBanks": 4,
|
||||
"nbrOfColumns": 128,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 4096,
|
||||
"width": 128,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 4
|
||||
},
|
||||
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-266_128bit",
|
||||
"memoryType": "WIDEIO_SDR",
|
||||
"mempowerspec": {
|
||||
"idd0": 6.06,
|
||||
"idd02": 21.82,
|
||||
"idd2n": 0.16,
|
||||
"idd2n2": 4.76,
|
||||
"idd2p0": 0.05,
|
||||
"idd2p02": 0.17,
|
||||
"idd2p1": 0.05,
|
||||
"idd2p12": 0.17,
|
||||
"idd3n": 0.58,
|
||||
"idd3n2": 7.24,
|
||||
"idd3p0": 0.25,
|
||||
"idd3p02": 1.49,
|
||||
"idd3p1": 0.25,
|
||||
"idd3p12": 1.49,
|
||||
"idd4r": 1.82,
|
||||
"idd4r2": 111.22,
|
||||
"idd4w": 1.82,
|
||||
"idd4w2": 78.0,
|
||||
"idd5": 14.48,
|
||||
"idd52": 48.34,
|
||||
"idd6": 0.07,
|
||||
"idd62": 0.27,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.2
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AC": 1,
|
||||
"CCD_R": 2,
|
||||
"CCD_W": 1,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"DQSCK": 1,
|
||||
"RAS": 12,
|
||||
"RC": 16,
|
||||
"RCD": 5,
|
||||
"REFI": 4160,
|
||||
"RFC": 24,
|
||||
"RL": 3,
|
||||
"RP": 5,
|
||||
"RRD": 3,
|
||||
"TAW": 14,
|
||||
"WL": 1,
|
||||
"WR": 4,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XSR": 27,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 266
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json
Normal file
77
configs/memspec/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 32,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 2,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 2,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 22,
|
||||
"PPD": 2,
|
||||
"RP": 22,
|
||||
"RAS": 52,
|
||||
"RL": 22,
|
||||
"RTP": 12,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 20,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 48,
|
||||
"CCD_L_slr": 8,
|
||||
"CCD_L_WR_slr": 32,
|
||||
"CCD_L_WR2_slr": 16,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 8,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 16,
|
||||
"WTR_S": 4,
|
||||
"RFC1_slr": 312,
|
||||
"RFC2_slr": 208,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 184,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 6240,
|
||||
"REFI2": 3120,
|
||||
"REFISB": 1560,
|
||||
"REFSBRD_slr": 48,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 8,
|
||||
"PD": 12,
|
||||
"XP": 12,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-3200A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-3200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-3200A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 22,
|
||||
"PPD": 2,
|
||||
"RP": 22,
|
||||
"RAS": 52,
|
||||
"RL": 22,
|
||||
"RTP": 12,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 20,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 48,
|
||||
"CCD_L_slr": 8,
|
||||
"CCD_L_WR_slr": 32,
|
||||
"CCD_L_WR2_slr": 16,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 8,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 16,
|
||||
"WTR_S": 4,
|
||||
"RFC1_slr": 312,
|
||||
"RFC2_slr": 208,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 184,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 6240,
|
||||
"REFI2": 3120,
|
||||
"REFISB": 1560,
|
||||
"REFSBRD_slr": 48,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 8,
|
||||
"PD": 12,
|
||||
"XP": 12,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-3600A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-3600A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-3600A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 26,
|
||||
"PPD": 2,
|
||||
"RP": 26,
|
||||
"RAS": 58,
|
||||
"RL": 26,
|
||||
"RTP": 14,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 24,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 54,
|
||||
"CCD_L_slr": 9,
|
||||
"CCD_L_WR_slr": 36,
|
||||
"CCD_L_WR2_slr": 18,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 9,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 18,
|
||||
"WTR_S": 5,
|
||||
"RFC1_slr": 351,
|
||||
"RFC2_slr": 234,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 207,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 7020,
|
||||
"REFI2": 3510,
|
||||
"REFISB": 1755,
|
||||
"REFSBRD_slr": 54,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 9,
|
||||
"PD": 14,
|
||||
"XP": 14,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1800
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4000A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4000A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4000A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 28,
|
||||
"PPD": 2,
|
||||
"RP": 28,
|
||||
"RAS": 64,
|
||||
"RL": 28,
|
||||
"RTP": 15,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 26,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 60,
|
||||
"CCD_L_slr": 10,
|
||||
"CCD_L_WR_slr": 40,
|
||||
"CCD_L_WR2_slr": 20,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 10,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 20,
|
||||
"WTR_S": 5,
|
||||
"RFC1_slr": 390,
|
||||
"RFC2_slr": 260,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 230,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 7800,
|
||||
"REFI2": 3900,
|
||||
"REFISB": 1950,
|
||||
"REFSBRD_slr": 60,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 10,
|
||||
"PD": 15,
|
||||
"XP": 15,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2000
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4400A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4400A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4400A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 32,
|
||||
"PPD": 2,
|
||||
"RP": 32,
|
||||
"RAS": 71,
|
||||
"RL": 32,
|
||||
"RTP": 17,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 30,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 66,
|
||||
"CCD_L_slr": 11,
|
||||
"CCD_L_WR_slr": 44,
|
||||
"CCD_L_WR2_slr": 22,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 11,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 22,
|
||||
"WTR_S": 6,
|
||||
"RFC1_slr": 429,
|
||||
"RFC2_slr": 286,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 253,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 8580,
|
||||
"REFI2": 4290,
|
||||
"REFISB": 2145,
|
||||
"REFSBRD_slr": 66,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 11,
|
||||
"PD": 17,
|
||||
"XP": 17,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2200
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4800A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-4800A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4800A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 34,
|
||||
"PPD": 2,
|
||||
"RP": 34,
|
||||
"RAS": 77,
|
||||
"RL": 34,
|
||||
"RTP": 18,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 32,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 72,
|
||||
"CCD_L_slr": 12,
|
||||
"CCD_L_WR_slr": 48,
|
||||
"CCD_L_WR2_slr": 24,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 12,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 24,
|
||||
"WTR_S": 6,
|
||||
"RFC1_slr": 468,
|
||||
"RFC2_slr": 312,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 276,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 9360,
|
||||
"REFI2": 4680,
|
||||
"REFISB": 2340,
|
||||
"REFSBRD_slr": 72,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 12,
|
||||
"PD": 18,
|
||||
"XP": 18,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2400
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-5200A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-5200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-5200A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 38,
|
||||
"PPD": 2,
|
||||
"RP": 38,
|
||||
"RAS": 84,
|
||||
"RL": 38,
|
||||
"RTP": 20,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 36,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 78,
|
||||
"CCD_L_slr": 13,
|
||||
"CCD_L_WR_slr": 52,
|
||||
"CCD_L_WR2_slr": 26,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 13,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 26,
|
||||
"WTR_S": 7,
|
||||
"RFC1_slr": 507,
|
||||
"RFC2_slr": 338,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 299,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 10140,
|
||||
"REFI2": 5070,
|
||||
"REFISB": 2535,
|
||||
"REFSBRD_slr": 78,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 13,
|
||||
"PD": 20,
|
||||
"XP": 20,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2600
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-5600A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-5600A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-5600A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 40,
|
||||
"PPD": 2,
|
||||
"RP": 40,
|
||||
"RAS": 90,
|
||||
"RL": 40,
|
||||
"RTP": 21,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 38,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 84,
|
||||
"CCD_L_slr": 14,
|
||||
"CCD_L_WR_slr": 56,
|
||||
"CCD_L_WR2_slr": 28,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 14,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 28,
|
||||
"WTR_S": 7,
|
||||
"RFC1_slr": 546,
|
||||
"RFC2_slr": 364,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 322,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 10920,
|
||||
"REFI2": 5460,
|
||||
"REFISB": 2730,
|
||||
"REFSBRD_slr": 84,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 14,
|
||||
"PD": 21,
|
||||
"XP": 21,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2800
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-6000A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-6000A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-6000A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 42,
|
||||
"PPD": 2,
|
||||
"RP": 42,
|
||||
"RAS": 96,
|
||||
"RL": 42,
|
||||
"RTP": 23,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 40,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 90,
|
||||
"CCD_L_slr": 15,
|
||||
"CCD_L_WR_slr": 60,
|
||||
"CCD_L_WR2_slr": 30,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 15,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 30,
|
||||
"WTR_S": 8,
|
||||
"RFC1_slr": 585,
|
||||
"RFC2_slr": 390,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 345,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 11700,
|
||||
"REFI2": 5850,
|
||||
"REFISB": 2925,
|
||||
"REFSBRD_slr": 90,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 15,
|
||||
"PD": 23,
|
||||
"XP": 23,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 3000
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-6400A.json
Normal file
77
configs/memspec/JEDEC_2x4x1Gbx8_DDR5-6400A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-6400A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 46,
|
||||
"PPD": 2,
|
||||
"RP": 46,
|
||||
"RAS": 103,
|
||||
"RL": 46,
|
||||
"RTP": 24,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 44,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 96,
|
||||
"CCD_L_slr": 16,
|
||||
"CCD_L_WR_slr": 64,
|
||||
"CCD_L_WR2_slr": 32,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 16,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 32,
|
||||
"WTR_S": 8,
|
||||
"RFC1_slr": 624,
|
||||
"RFC2_slr": 416,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 368,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 12480,
|
||||
"REFI2": 6240,
|
||||
"REFISB": 3120,
|
||||
"REFSBRD_slr": 96,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 16,
|
||||
"PD": 24,
|
||||
"XP": 24,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 3200
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-3200A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-3200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 32,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 22,
|
||||
"PPD": 2,
|
||||
"RP": 22,
|
||||
"RAS": 52,
|
||||
"RL": 22,
|
||||
"RTP": 12,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 20,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 48,
|
||||
"CCD_L_slr": 8,
|
||||
"CCD_L_WR_slr": 32,
|
||||
"CCD_L_WR2_slr": 16,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 8,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 16,
|
||||
"WTR_S": 4,
|
||||
"RFC1_slr": 312,
|
||||
"RFC2_slr": 208,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 184,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 6240,
|
||||
"REFI2": 3120,
|
||||
"REFISB": 1560,
|
||||
"REFSBRD_slr": 48,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 8,
|
||||
"PD": 12,
|
||||
"XP": 12,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-3600A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-3600A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-3600A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 26,
|
||||
"PPD": 2,
|
||||
"RP": 26,
|
||||
"RAS": 58,
|
||||
"RL": 26,
|
||||
"RTP": 14,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 24,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 54,
|
||||
"CCD_L_slr": 9,
|
||||
"CCD_L_WR_slr": 36,
|
||||
"CCD_L_WR2_slr": 18,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 9,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 18,
|
||||
"WTR_S": 5,
|
||||
"RFC1_slr": 351,
|
||||
"RFC2_slr": 234,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 207,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 7020,
|
||||
"REFI2": 3510,
|
||||
"REFISB": 1755,
|
||||
"REFSBRD_slr": 54,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 9,
|
||||
"PD": 14,
|
||||
"XP": 14,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1800
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4000A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4000A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-4000A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 28,
|
||||
"PPD": 2,
|
||||
"RP": 28,
|
||||
"RAS": 64,
|
||||
"RL": 28,
|
||||
"RTP": 15,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 26,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 60,
|
||||
"CCD_L_slr": 10,
|
||||
"CCD_L_WR_slr": 40,
|
||||
"CCD_L_WR2_slr": 20,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 10,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 20,
|
||||
"WTR_S": 5,
|
||||
"RFC1_slr": 390,
|
||||
"RFC2_slr": 260,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 230,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 7800,
|
||||
"REFI2": 3900,
|
||||
"REFISB": 1950,
|
||||
"REFSBRD_slr": 60,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 10,
|
||||
"PD": 15,
|
||||
"XP": 15,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2000
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4400A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4400A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-4400A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 32,
|
||||
"PPD": 2,
|
||||
"RP": 32,
|
||||
"RAS": 71,
|
||||
"RL": 32,
|
||||
"RTP": 17,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 30,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 66,
|
||||
"CCD_L_slr": 11,
|
||||
"CCD_L_WR_slr": 44,
|
||||
"CCD_L_WR2_slr": 22,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 11,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 22,
|
||||
"WTR_S": 6,
|
||||
"RFC1_slr": 429,
|
||||
"RFC2_slr": 286,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 253,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 8580,
|
||||
"REFI2": 4290,
|
||||
"REFISB": 2145,
|
||||
"REFSBRD_slr": 66,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 11,
|
||||
"PD": 17,
|
||||
"XP": 17,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2200
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4800A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-4800A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-4800A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 34,
|
||||
"PPD": 2,
|
||||
"RP": 34,
|
||||
"RAS": 77,
|
||||
"RL": 34,
|
||||
"RTP": 18,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 32,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 72,
|
||||
"CCD_L_slr": 12,
|
||||
"CCD_L_WR_slr": 48,
|
||||
"CCD_L_WR2_slr": 24,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 12,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 24,
|
||||
"WTR_S": 6,
|
||||
"RFC1_slr": 468,
|
||||
"RFC2_slr": 312,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 276,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 9360,
|
||||
"REFI2": 4680,
|
||||
"REFISB": 2340,
|
||||
"REFSBRD_slr": 72,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 12,
|
||||
"PD": 18,
|
||||
"XP": 18,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2400
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-5200A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-5200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-5200A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 38,
|
||||
"PPD": 2,
|
||||
"RP": 38,
|
||||
"RAS": 84,
|
||||
"RL": 38,
|
||||
"RTP": 20,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 36,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 78,
|
||||
"CCD_L_slr": 13,
|
||||
"CCD_L_WR_slr": 52,
|
||||
"CCD_L_WR2_slr": 26,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 13,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 26,
|
||||
"WTR_S": 7,
|
||||
"RFC1_slr": 507,
|
||||
"RFC2_slr": 338,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 299,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 10140,
|
||||
"REFI2": 5070,
|
||||
"REFISB": 2535,
|
||||
"REFSBRD_slr": 78,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 13,
|
||||
"PD": 20,
|
||||
"XP": 20,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2600
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-5600A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-5600A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-5600A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 40,
|
||||
"PPD": 2,
|
||||
"RP": 40,
|
||||
"RAS": 90,
|
||||
"RL": 40,
|
||||
"RTP": 21,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 38,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 84,
|
||||
"CCD_L_slr": 14,
|
||||
"CCD_L_WR_slr": 56,
|
||||
"CCD_L_WR2_slr": 28,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 14,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 28,
|
||||
"WTR_S": 7,
|
||||
"RFC1_slr": 546,
|
||||
"RFC2_slr": 364,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 322,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 10920,
|
||||
"REFI2": 5460,
|
||||
"REFISB": 2730,
|
||||
"REFSBRD_slr": 84,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 14,
|
||||
"PD": 21,
|
||||
"XP": 21,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 2800
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-6000A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-6000A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-6000A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 42,
|
||||
"PPD": 2,
|
||||
"RP": 42,
|
||||
"RAS": 96,
|
||||
"RL": 42,
|
||||
"RTP": 23,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 40,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 90,
|
||||
"CCD_L_slr": 15,
|
||||
"CCD_L_WR_slr": 60,
|
||||
"CCD_L_WR2_slr": 30,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 15,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 30,
|
||||
"WTR_S": 8,
|
||||
"RFC1_slr": 585,
|
||||
"RFC2_slr": 390,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 345,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 11700,
|
||||
"REFI2": 5850,
|
||||
"REFISB": 2925,
|
||||
"REFSBRD_slr": 90,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 15,
|
||||
"PD": 23,
|
||||
"XP": 23,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 3000
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-6400A.json
Normal file
77
configs/memspec/JEDEC_2x8x2Gbx4_DDR5-6400A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDIMMRanks": 1,
|
||||
"nbrOfPhysicalRanks": 1,
|
||||
"nbrOfLogicalRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-6400A",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 46,
|
||||
"PPD": 2,
|
||||
"RP": 46,
|
||||
"RAS": 103,
|
||||
"RL": 46,
|
||||
"RTP": 24,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 44,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 96,
|
||||
"CCD_L_slr": 16,
|
||||
"CCD_L_WR_slr": 64,
|
||||
"CCD_L_WR2_slr": 32,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 0,
|
||||
"CCD_WR_dlr": 0,
|
||||
"CCD_WR_dpr": 0,
|
||||
"RRD_L_slr": 16,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 0,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 0,
|
||||
"WTR_L": 32,
|
||||
"WTR_S": 8,
|
||||
"RFC1_slr": 624,
|
||||
"RFC2_slr": 416,
|
||||
"RFC1_dlr": 0,
|
||||
"RFC2_dlr": 0,
|
||||
"RFC1_dpr": 0,
|
||||
"RFC2_dpr": 0,
|
||||
"RFCsb_slr": 368,
|
||||
"RFCsb_dlr": 0,
|
||||
"REFI1": 12480,
|
||||
"REFI2": 6240,
|
||||
"REFISB": 3120,
|
||||
"REFSBRD_slr": 96,
|
||||
"REFSBRD_dlr": 0,
|
||||
"RTRS": 2,
|
||||
"CPDED": 16,
|
||||
"PD": 24,
|
||||
"XP": 24,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 3200
|
||||
}
|
||||
}
|
||||
}
|
||||
77
configs/memspec/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json
Normal file
77
configs/memspec/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json
Normal file
@@ -0,0 +1,77 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 8,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRanks": 8,
|
||||
"nbrOfDIMMRanks": 2,
|
||||
"nbrOfPhysicalRanks": 2,
|
||||
"nbrOfLogicalRanks": 2,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 4,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 2,
|
||||
"cmdMode": 1,
|
||||
"refMode": 1,
|
||||
"RAAIMT" : 16,
|
||||
"RAAMMT" : 96,
|
||||
"RAACDR" : 16
|
||||
},
|
||||
"memoryId": "JEDEC_2x8x8x8Gbx4_DDR5-3200A_4bit",
|
||||
"memoryType": "DDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 22,
|
||||
"PPD": 2,
|
||||
"RP": 22,
|
||||
"RAS": 52,
|
||||
"RL": 22,
|
||||
"RTP": 12,
|
||||
"RPRE": 1,
|
||||
"RPST": 0,
|
||||
"RDDQS": 0,
|
||||
"WL": 20,
|
||||
"WPRE": 2,
|
||||
"WPST": 0,
|
||||
"WR": 48,
|
||||
"CCD_L_slr": 8,
|
||||
"CCD_L_WR_slr": 32,
|
||||
"CCD_L_WR2_slr": 16,
|
||||
"CCD_S_slr": 8,
|
||||
"CCD_S_WR_slr": 8,
|
||||
"CCD_dlr": 8,
|
||||
"CCD_WR_dlr": 8,
|
||||
"CCD_WR_dpr": 8,
|
||||
"RRD_L_slr": 8,
|
||||
"RRD_S_slr": 8,
|
||||
"RRD_dlr": 4,
|
||||
"FAW_slr": 32,
|
||||
"FAW_dlr": 16,
|
||||
"WTR_L": 16,
|
||||
"WTR_S": 4,
|
||||
"RFC1_slr": 312,
|
||||
"RFC2_slr": 208,
|
||||
"RFC1_dlr": 104,
|
||||
"RFC2_dlr": 70,
|
||||
"RFC1_dpr": 104,
|
||||
"RFC2_dpr": 70,
|
||||
"RFCsb_slr": 184,
|
||||
"RFCsb_dlr": 62,
|
||||
"REFI1": 6240,
|
||||
"REFI2": 3120,
|
||||
"REFISB": 1560,
|
||||
"REFSBRD_slr": 48,
|
||||
"REFSBRD_dlr": 24,
|
||||
"RTRS": 2,
|
||||
"CPDED": 8,
|
||||
"PD": 12,
|
||||
"XP": 12,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
73
configs/memspec/JEDEC_4Gb_DDR4-1866_8bit_A.json
Normal file
73
configs/memspec/JEDEC_4Gb_DDR4-1866_8bit_A.json
Normal file
@@ -0,0 +1,73 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-1866_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 56.25,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 33.75,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 39.5,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 157.5,
|
||||
"idd4w": 135.0,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 5,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 13,
|
||||
"DQSCK": 2,
|
||||
"FAW": 22,
|
||||
"RAS": 32,
|
||||
"RC": 45,
|
||||
"RCD": 13,
|
||||
"REFM": 1,
|
||||
"REFI": 7280,
|
||||
"RFC": 243,
|
||||
"RFC2": 150,
|
||||
"RFC4": 103,
|
||||
"RL": 13,
|
||||
"RPRE": 1,
|
||||
"RP": 13,
|
||||
"RRD_L": 5,
|
||||
"RRD_S": 4,
|
||||
"RTP": 8,
|
||||
"WL": 12,
|
||||
"WPRE": 1,
|
||||
"WR": 14,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 255,
|
||||
"XS": 252,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 933
|
||||
}
|
||||
}
|
||||
}
|
||||
73
configs/memspec/JEDEC_4Gb_DDR4-2400_8bit_A.json
Normal file
73
configs/memspec/JEDEC_4Gb_DDR4-2400_8bit_A.json
Normal file
@@ -0,0 +1,73 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 32768,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_4Gb_DDR4-2400_8bit_A",
|
||||
"memoryType": "DDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.75,
|
||||
"idd02": 4.05,
|
||||
"idd2n": 38.25,
|
||||
"idd2p0": 17.0,
|
||||
"idd2p1": 17.0,
|
||||
"idd3n": 44.0,
|
||||
"idd3p0": 22.5,
|
||||
"idd3p1": 22.5,
|
||||
"idd4r": 184.5,
|
||||
"idd4w": 168.75,
|
||||
"idd5": 118.0,
|
||||
"idd6": 20.25,
|
||||
"idd62": 2.6,
|
||||
"vdd": 1.2,
|
||||
"vdd2": 2.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD_L": 6,
|
||||
"CCD_S": 4,
|
||||
"CKE": 6,
|
||||
"CKESR": 7,
|
||||
"CL": 16,
|
||||
"DQSCK": 2,
|
||||
"FAW": 26,
|
||||
"RAS": 39,
|
||||
"RC": 55,
|
||||
"RCD": 16,
|
||||
"REFM": 1,
|
||||
"REFI": 9360,
|
||||
"RFC": 312,
|
||||
"RFC2": 192,
|
||||
"RFC4": 132,
|
||||
"RL": 16,
|
||||
"RPRE": 1,
|
||||
"RP": 16,
|
||||
"RRD_L": 6,
|
||||
"RRD_S": 4,
|
||||
"RTP": 12,
|
||||
"WL": 16,
|
||||
"WPRE": 1,
|
||||
"WR": 18,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 3,
|
||||
"XP": 8,
|
||||
"XPDLL": 325,
|
||||
"XS": 324,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 2,
|
||||
"PRPDEN": 2,
|
||||
"REFPDEN": 2,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1200
|
||||
}
|
||||
}
|
||||
}
|
||||
44
configs/memspec/JEDEC_4x64_2Gb_WIDEIO2-400_64bit.json
Normal file
44
configs/memspec/JEDEC_4x64_2Gb_WIDEIO2-400_64bit.json
Normal file
@@ -0,0 +1,44 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 512,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 64,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 4
|
||||
},
|
||||
"memoryId": "JEDEC_4x64_2Gb_WIDEIO2-400_64bit",
|
||||
"memoryType": "WIDEIO2",
|
||||
"memtimingspec": {
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 6,
|
||||
"FAW": 24,
|
||||
"RAS": 17,
|
||||
"RCAB": 26,
|
||||
"RCD": 8,
|
||||
"RCPB": 24,
|
||||
"REFI": 1560,
|
||||
"REFIPB": 195,
|
||||
"REFM": 1,
|
||||
"RFCAB": 72,
|
||||
"RFCPB": 36,
|
||||
"RL": 7,
|
||||
"RPAB": 9,
|
||||
"RPPB": 8,
|
||||
"RRD": 4,
|
||||
"RTP": 3,
|
||||
"WL": 5,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XSR": 76,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
44
configs/memspec/JEDEC_4x64_2Gb_WIDEIO2-533_64bit.json
Normal file
44
configs/memspec/JEDEC_4x64_2Gb_WIDEIO2-533_64bit.json
Normal file
@@ -0,0 +1,44 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 4,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 512,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 64,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 4
|
||||
},
|
||||
"memoryId": "JEDEC_4x64_2Gb_WIDEIO2-533_64bit",
|
||||
"memoryType": "WIDEIO2",
|
||||
"memtimingspec": {
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 8,
|
||||
"FAW": 32,
|
||||
"RAS": 23,
|
||||
"RCAB": 34,
|
||||
"RCD": 10,
|
||||
"RCPB": 32,
|
||||
"REFI": 2080,
|
||||
"REFIPB": 260,
|
||||
"REFM": 1,
|
||||
"RFCAB": 96,
|
||||
"RFCPB": 48,
|
||||
"RL": 9,
|
||||
"RPAB": 12,
|
||||
"RPPB": 10,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 7,
|
||||
"WR": 11,
|
||||
"WTR": 6,
|
||||
"XP": 4,
|
||||
"XSR": 102,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-0533.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-0533.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-0533",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 3,
|
||||
"PPD": 2,
|
||||
"RPab": 3,
|
||||
"RPpb": 3,
|
||||
"RAS": 6,
|
||||
"RCab": 9,
|
||||
"RCpb": 8,
|
||||
"FAW": 3,
|
||||
"RRD": 2,
|
||||
"RL": 6,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 5,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 520,
|
||||
"REFIpb": 65,
|
||||
"RFCab": 28,
|
||||
"RFCpb": 16,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 1,
|
||||
"pbR2pbR": 12,
|
||||
"clkMhz": 133
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1067.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1067.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-1067",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 5,
|
||||
"PPD": 2,
|
||||
"RPab": 6,
|
||||
"RPpb": 5,
|
||||
"RAS": 12,
|
||||
"RCab": 17,
|
||||
"RCpb": 16,
|
||||
"FAW": 6,
|
||||
"RRD": 2,
|
||||
"RL": 8,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 10,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1041,
|
||||
"REFIpb": 130,
|
||||
"RFCab": 56,
|
||||
"RFCpb": 32,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 2,
|
||||
"pbR2pbR": 24,
|
||||
"clkMhz": 267
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1600.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-1600.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-1600",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 8,
|
||||
"PPD": 2,
|
||||
"RPab": 9,
|
||||
"RPpb": 8,
|
||||
"RAS": 17,
|
||||
"RCab": 26,
|
||||
"RCpb": 24,
|
||||
"FAW": 8,
|
||||
"RRD": 2,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 14,
|
||||
"WTR_L": 5,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1562,
|
||||
"REFIpb": 195,
|
||||
"RFCab": 84,
|
||||
"RFCpb": 48,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 3,
|
||||
"pbR2pbR": 36,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2133.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2133.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-2133",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 11,
|
||||
"RRD": 3,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 112,
|
||||
"RFCpb": 64,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2750.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-2750.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-2750",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 14,
|
||||
"RRD": 4,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 145,
|
||||
"RFCpb": 83,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-3200.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-3200.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-3200",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 18,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 10,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 96,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-0533.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-0533.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-0533",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 3,
|
||||
"PPD": 2,
|
||||
"RPab": 3,
|
||||
"RPpb": 3,
|
||||
"RAS": 6,
|
||||
"RCab": 9,
|
||||
"RCpb": 8,
|
||||
"FAW": 6,
|
||||
"RRD": 2,
|
||||
"RL": 6,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 5,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 520,
|
||||
"REFIpb": 65,
|
||||
"RFCab": 28,
|
||||
"RFCpb": 16,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 2,
|
||||
"pbR2pbR": 12,
|
||||
"clkMhz": 133
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1067.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1067.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-1067",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 5,
|
||||
"PPD": 2,
|
||||
"RPab": 6,
|
||||
"RPpb": 5,
|
||||
"RAS": 12,
|
||||
"RCab": 17,
|
||||
"RCpb": 16,
|
||||
"FAW": 11,
|
||||
"RRD": 3,
|
||||
"RL": 8,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 4,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 10,
|
||||
"WTR_L": 4,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1041,
|
||||
"REFIpb": 130,
|
||||
"RFCab": 56,
|
||||
"RFCpb": 32,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 3,
|
||||
"pbR2pbR": 24,
|
||||
"clkMhz": 267
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1600.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-1600.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-1600",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 8,
|
||||
"PPD": 2,
|
||||
"RPab": 9,
|
||||
"RPpb": 8,
|
||||
"RAS": 17,
|
||||
"RCab": 26,
|
||||
"RCpb": 24,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 14,
|
||||
"WTR_L": 5,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1562,
|
||||
"REFIpb": 195,
|
||||
"RFCab": 84,
|
||||
"RFCpb": 48,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 36,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2133.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2133.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-2133",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 22,
|
||||
"RRD": 6,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 0,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 112,
|
||||
"RFCpb": 64,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2750.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-2750.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-2750",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 28,
|
||||
"RRD": 7,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 145,
|
||||
"RFCpb": 83,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 7,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3200.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3200.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 4,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-3200",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 32,
|
||||
"RRD": 8,
|
||||
"RL": 18,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 10,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 96,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 8,
|
||||
"BL_n_max_16": 8,
|
||||
"BL_n_L_16": 8,
|
||||
"BL_n_S_16": 8,
|
||||
"BL_n_min_32": 8,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 8,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3733.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-3733.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-3733",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 9,
|
||||
"PPD": 2,
|
||||
"RPab": 10,
|
||||
"RPpb": 9,
|
||||
"RAS": 20,
|
||||
"RCab": 30,
|
||||
"RCpb": 28,
|
||||
"FAW": 19,
|
||||
"RRD": 5,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 16,
|
||||
"WTR_L": 6,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1816,
|
||||
"REFIpb": 226,
|
||||
"RFCab": 98,
|
||||
"RFCpb": 56,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 5,
|
||||
"pbR2pbR": 42,
|
||||
"clkMhz": 467
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4267.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4267.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-4267",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 22,
|
||||
"RRD": 6,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 112,
|
||||
"RFCpb": 64,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4800.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-4800.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-4800",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 11,
|
||||
"PPD": 2,
|
||||
"RPab": 13,
|
||||
"RPpb": 11,
|
||||
"RAS": 26,
|
||||
"RCab": 38,
|
||||
"RCpb": 36,
|
||||
"FAW": 24,
|
||||
"RRD": 6,
|
||||
"RL": 13,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 3,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 7,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 21,
|
||||
"WTR_L": 8,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2343,
|
||||
"REFIpb": 292,
|
||||
"RFCab": 126,
|
||||
"RFCpb": 72,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 54,
|
||||
"clkMhz": 600
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-5500.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-5500.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-5500",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 28,
|
||||
"RRD": 7,
|
||||
"RL": 15,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 145,
|
||||
"RFCpb": 83,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 7,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6000.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6000.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-6000",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 14,
|
||||
"PPD": 2,
|
||||
"RPab": 16,
|
||||
"RPpb": 14,
|
||||
"RAS": 32,
|
||||
"RCab": 48,
|
||||
"RCpb": 46,
|
||||
"FAW": 31,
|
||||
"RRD": 8,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 26,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2930,
|
||||
"REFIpb": 366,
|
||||
"RFCab": 158,
|
||||
"RFCpb": 91,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 68,
|
||||
"clkMhz": 750
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6400.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_8B_LPDDR5-6400.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 32,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 1,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 2048,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_8B_LPDDR5-6400",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 32,
|
||||
"RRD": 8,
|
||||
"RL": 17,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 96,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 4,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 4,
|
||||
"BL_n_min_32": 4,
|
||||
"BL_n_max_32": 4,
|
||||
"BL_n_L_32": 4,
|
||||
"BL_n_S_32": 4,
|
||||
"pbR2act": 8,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-3733.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-3733.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-3733",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 9,
|
||||
"PPD": 2,
|
||||
"RPab": 10,
|
||||
"RPpb": 9,
|
||||
"RAS": 20,
|
||||
"RCab": 30,
|
||||
"RCpb": 28,
|
||||
"FAW": 10,
|
||||
"RRD": 3,
|
||||
"RL": 10,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 16,
|
||||
"WTR_L": 6,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 1816,
|
||||
"REFIpb": 226,
|
||||
"RFCab": 98,
|
||||
"RFCpb": 56,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 42,
|
||||
"clkMhz": 467
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4267.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4267.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-4267",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 10,
|
||||
"PPD": 2,
|
||||
"RPab": 12,
|
||||
"RPpb": 10,
|
||||
"RAS": 23,
|
||||
"RCab": 34,
|
||||
"RCpb": 32,
|
||||
"FAW": 11,
|
||||
"RRD": 3,
|
||||
"RL": 12,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 2,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 6,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 19,
|
||||
"WTR_L": 7,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2083,
|
||||
"REFIpb": 260,
|
||||
"RFCab": 112,
|
||||
"RFCpb": 64,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 4,
|
||||
"pbR2pbR": 48,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4800.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-4800.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-4800",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 11,
|
||||
"PPD": 2,
|
||||
"RPab": 13,
|
||||
"RPpb": 11,
|
||||
"RAS": 26,
|
||||
"RCab": 38,
|
||||
"RCpb": 36,
|
||||
"FAW": 12,
|
||||
"RRD": 3,
|
||||
"RL": 13,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 3,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 7,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 21,
|
||||
"WTR_L": 8,
|
||||
"WTR_S": 4,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2343,
|
||||
"REFIpb": 292,
|
||||
"RFCab": 126,
|
||||
"RFCpb": 72,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 5,
|
||||
"pbR2pbR": 54,
|
||||
"clkMhz": 600
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-5500.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-5500.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-5500",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 13,
|
||||
"PPD": 2,
|
||||
"RPab": 15,
|
||||
"RPpb": 13,
|
||||
"RAS": 29,
|
||||
"RCab": 44,
|
||||
"RCpb": 42,
|
||||
"FAW": 14,
|
||||
"RRD": 4,
|
||||
"RL": 15,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 8,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 24,
|
||||
"WTR_L": 9,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2688,
|
||||
"REFIpb": 335,
|
||||
"RFCab": 145,
|
||||
"RFCpb": 83,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 62,
|
||||
"clkMhz": 688
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6000.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6000.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-6000",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 14,
|
||||
"PPD": 2,
|
||||
"RPab": 16,
|
||||
"RPpb": 14,
|
||||
"RAS": 32,
|
||||
"RCab": 48,
|
||||
"RCpb": 46,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 16,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 26,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 2930,
|
||||
"REFIpb": 366,
|
||||
"RFCab": 158,
|
||||
"RFCpb": 91,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 68,
|
||||
"clkMhz": 750
|
||||
}
|
||||
}
|
||||
}
|
||||
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6400.json
Normal file
60
configs/memspec/JEDEC_512Mbx16_BG_LPDDR5-6400.json
Normal file
@@ -0,0 +1,60 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 8,
|
||||
"nbrOfBankGroups": 4,
|
||||
"nbrOfBanks": 16,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRows": 32768,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1,
|
||||
"width": 16,
|
||||
"per2BankOffset": 8
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_BG_LPDDR5-6400",
|
||||
"memoryType": "LPDDR5",
|
||||
"memtimingspec": {
|
||||
"RCD": 15,
|
||||
"PPD": 2,
|
||||
"RPab": 17,
|
||||
"RPpb": 15,
|
||||
"RAS": 34,
|
||||
"RCab": 51,
|
||||
"RCpb": 48,
|
||||
"FAW": 16,
|
||||
"RRD": 4,
|
||||
"RL": 17,
|
||||
"WCK2CK": 0,
|
||||
"WCK2DQO": 1,
|
||||
"RBTP": 4,
|
||||
"RPRE": 0,
|
||||
"RPST": 0,
|
||||
"WL": 9,
|
||||
"WCK2DQI": 0,
|
||||
"WPRE": 0,
|
||||
"WPST": 0,
|
||||
"WR": 28,
|
||||
"WTR_L": 10,
|
||||
"WTR_S": 5,
|
||||
"CCDMW": 16,
|
||||
"REFI": 3124,
|
||||
"REFIpb": 390,
|
||||
"RFCab": 168,
|
||||
"RFCpb": 96,
|
||||
"RTRS": 1,
|
||||
"BL_n_min_16": 2,
|
||||
"BL_n_max_16": 4,
|
||||
"BL_n_L_16": 4,
|
||||
"BL_n_S_16": 2,
|
||||
"BL_n_min_32": 6,
|
||||
"BL_n_max_32": 8,
|
||||
"BL_n_L_32": 8,
|
||||
"BL_n_S_32": 2,
|
||||
"pbR2act": 6,
|
||||
"pbR2pbR": 72,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-0533.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-0533.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-0533",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 4,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 1,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 11,
|
||||
"PPD": 4,
|
||||
"RCD": 5,
|
||||
"REFI": 1041,
|
||||
"REFIPB": 130,
|
||||
"RFCAB": 75,
|
||||
"RFCPB": 38,
|
||||
"RL": 6,
|
||||
"RAS": 12,
|
||||
"RPAB": 6,
|
||||
"RPPB": 5,
|
||||
"RCAB": 18,
|
||||
"RCPB": 17,
|
||||
"RPST": 0,
|
||||
"RRD": 4,
|
||||
"RTP": 8,
|
||||
"SR": 4,
|
||||
"WL": 4,
|
||||
"WPRE": 2,
|
||||
"WR": 6,
|
||||
"WTR": 8,
|
||||
"XP": 5,
|
||||
"XSR": 77,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 266
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-1066.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-1066.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-1066",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 4,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 1,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 22,
|
||||
"PPD": 4,
|
||||
"RCD": 10,
|
||||
"REFI": 2082,
|
||||
"REFIPB": 260,
|
||||
"RFCAB": 150,
|
||||
"RFCPB": 75,
|
||||
"RL": 10,
|
||||
"RAS": 23,
|
||||
"RPAB": 12,
|
||||
"RPPB": 10,
|
||||
"RCAB": 35,
|
||||
"RCPB": 33,
|
||||
"RPST": 0,
|
||||
"RRD": 6,
|
||||
"RTP": 8,
|
||||
"SR": 8,
|
||||
"WL": 6,
|
||||
"WPRE": 2,
|
||||
"WR": 10,
|
||||
"WTR": 8,
|
||||
"XP": 5,
|
||||
"XSR": 154,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-1600.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-1600.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-1600",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 6,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 32,
|
||||
"PPD": 4,
|
||||
"RCD": 15,
|
||||
"REFI": 3123,
|
||||
"REFIPB": 390,
|
||||
"RFCAB": 224,
|
||||
"RFCPB": 112,
|
||||
"RL": 14,
|
||||
"RAS": 34,
|
||||
"RPAB": 17,
|
||||
"RPPB": 15,
|
||||
"RCAB": 51,
|
||||
"RCPB": 49,
|
||||
"RPST": 0,
|
||||
"RRD": 8,
|
||||
"RTP": 8,
|
||||
"SR": 12,
|
||||
"WL": 8,
|
||||
"WPRE": 2,
|
||||
"WR": 15,
|
||||
"WTR": 8,
|
||||
"XP": 6,
|
||||
"XSR": 230,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 800
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-2133.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-2133.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-2133",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 9,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 43,
|
||||
"PPD": 4,
|
||||
"RCD": 20,
|
||||
"REFI": 4166,
|
||||
"REFIPB": 520,
|
||||
"RFCAB": 299,
|
||||
"RFCPB": 150,
|
||||
"RL": 20,
|
||||
"RAS": 45,
|
||||
"RPAB": 23,
|
||||
"RPPB": 20,
|
||||
"RCAB": 68,
|
||||
"RCPB": 65,
|
||||
"RPST": 0,
|
||||
"RRD": 11,
|
||||
"RTP": 9,
|
||||
"SR": 17,
|
||||
"WL": 10,
|
||||
"WPRE": 2,
|
||||
"WR": 20,
|
||||
"WTR": 11,
|
||||
"XP": 9,
|
||||
"XSR": 307,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1066
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-2666.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-2666.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-2666",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 10,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 2,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 54,
|
||||
"PPD": 4,
|
||||
"RCD": 24,
|
||||
"REFI": 5205,
|
||||
"REFIPB": 650,
|
||||
"RFCAB": 374,
|
||||
"RFCPB": 187,
|
||||
"RL": 24,
|
||||
"RAS": 56,
|
||||
"RPAB": 28,
|
||||
"RPPB": 24,
|
||||
"RCAB": 84,
|
||||
"RCPB": 80,
|
||||
"RPST": 0,
|
||||
"RRD": 14,
|
||||
"RTP": 10,
|
||||
"SR": 20,
|
||||
"WL": 12,
|
||||
"WPRE": 2,
|
||||
"WR": 24,
|
||||
"WTR": 14,
|
||||
"XP": 10,
|
||||
"XSR": 384,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1333
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-3200.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-3200.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-3200",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 12,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 3,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 3,
|
||||
"FAW": 64,
|
||||
"PPD": 4,
|
||||
"RCD": 29,
|
||||
"REFI": 6246,
|
||||
"REFIPB": 780,
|
||||
"RFCAB": 448,
|
||||
"RFCPB": 224,
|
||||
"RL": 28,
|
||||
"RAS": 68,
|
||||
"RPAB": 34,
|
||||
"RPPB": 29,
|
||||
"RCAB": 102,
|
||||
"RCPB": 97,
|
||||
"RPST": 0,
|
||||
"RRD": 16,
|
||||
"RTP": 12,
|
||||
"SR": 24,
|
||||
"WL": 14,
|
||||
"WPRE": 2,
|
||||
"WR": 29,
|
||||
"WTR": 16,
|
||||
"XP": 12,
|
||||
"XSR": 460,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-3733.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-3733.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-3733",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 15,
|
||||
"CMDCKE": 4,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 3,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 4,
|
||||
"FAW": 75,
|
||||
"PPD": 4,
|
||||
"RCD": 34,
|
||||
"REFI": 7297,
|
||||
"REFIPB": 912,
|
||||
"RFCAB": 524,
|
||||
"RFCPB": 262,
|
||||
"RL": 32,
|
||||
"RAS": 79,
|
||||
"RPAB": 40,
|
||||
"RPPB": 34,
|
||||
"RCAB": 119,
|
||||
"RCPB": 113,
|
||||
"RPST": 0,
|
||||
"RRD": 19,
|
||||
"RTP": 15,
|
||||
"SR": 29,
|
||||
"WL": 16,
|
||||
"WPRE": 2,
|
||||
"WR": 34,
|
||||
"WTR": 19,
|
||||
"XP": 15,
|
||||
"XSR": 538,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1866
|
||||
}
|
||||
}
|
||||
}
|
||||
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-4266.json
Normal file
51
configs/memspec/JEDEC_512Mbx16_LPDDR4-4266.json
Normal file
@@ -0,0 +1,51 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_512Mbx16_LPDDR4-4266",
|
||||
"memoryType": "LPDDR4",
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 17,
|
||||
"CMDCKE": 4,
|
||||
"DQS2DQ": 0,
|
||||
"DQSCK": 4,
|
||||
"DQSS": 0,
|
||||
"ESCKE": 4,
|
||||
"FAW": 86,
|
||||
"PPD": 4,
|
||||
"RCD": 39,
|
||||
"REFI": 8341,
|
||||
"REFIPB": 1042,
|
||||
"RFCAB": 599,
|
||||
"RFCPB": 300,
|
||||
"RL": 36,
|
||||
"RAS": 90,
|
||||
"RPAB": 45,
|
||||
"RPPB": 39,
|
||||
"RCAB": 135,
|
||||
"RCPB": 129,
|
||||
"RPST": 0,
|
||||
"RRD": 22,
|
||||
"RTP": 17,
|
||||
"SR": 33,
|
||||
"WL": 18,
|
||||
"WPRE": 2,
|
||||
"WR": 39,
|
||||
"WTR": 22,
|
||||
"XP": 17,
|
||||
"XSR": 615,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 2133
|
||||
}
|
||||
}
|
||||
}
|
||||
101
configs/memspec/JEDEC_8Gb_LPDDR4-3200_16bit.json
Normal file
101
configs/memspec/JEDEC_8Gb_LPDDR4-3200_16bit.json
Normal file
@@ -0,0 +1,101 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 16,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 65536,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 1,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "JEDEC_8Gb_LPDDR4-3200_16bit",
|
||||
"memoryType": "LPDDR4",
|
||||
"mempowerspec": {
|
||||
"idd0": 3.5,
|
||||
"idd02": 45.0,
|
||||
"idd0ql": 0.75,
|
||||
"idd2n": 2.0,
|
||||
"idd2n2": 27.0,
|
||||
"idd2nQ": 0.75,
|
||||
"idd2ns": 2.0,
|
||||
"idd2ns2": 23.0,
|
||||
"idd2nsq": 0.75,
|
||||
"idd2p": 1.2,
|
||||
"idd2p2": 3.0,
|
||||
"idd2pQ": 0.75,
|
||||
"idd2ps": 1.2,
|
||||
"idd2ps2": 3.0,
|
||||
"idd2psq": 0.75,
|
||||
"idd3n": 2.25,
|
||||
"idd3n2": 30.0,
|
||||
"idd3nQ": 0.75,
|
||||
"idd3ns": 2.25,
|
||||
"idd3ns2": 30.0,
|
||||
"idd3nsq": 0.75,
|
||||
"idd3p": 1.2,
|
||||
"idd3p2": 9.0,
|
||||
"idd3pQ": 0.75,
|
||||
"idd3ps": 1.2,
|
||||
"idd3ps2": 9.0,
|
||||
"idd3psq": 0.75,
|
||||
"idd4r": 2.25,
|
||||
"idd4r2": 275.0,
|
||||
"idd4rq": 150.0,
|
||||
"idd4w": 2.25,
|
||||
"idd4w2": 210.0,
|
||||
"idd4wq": 55.0,
|
||||
"idd5": 10.0,
|
||||
"idd52": 90.0,
|
||||
"idd5ab": 2.5,
|
||||
"idd5ab2": 30.0,
|
||||
"idd5abq": 0.75,
|
||||
"idd5b": 2.5,
|
||||
"idd5b2": 30.0,
|
||||
"idd5bq": 0.75,
|
||||
"idd5q": 0.75,
|
||||
"idd6": 0.3,
|
||||
"idd62": 0.5,
|
||||
"idd6q": 0.1,
|
||||
"vdd": 1.8,
|
||||
"vdd2": 1.1,
|
||||
"vddq": 1.1
|
||||
},
|
||||
"memtimingspec": {
|
||||
"CCD": 8,
|
||||
"CKE": 12,
|
||||
"CMDCKE": 3,
|
||||
"DQS2DQ": 2,
|
||||
"DQSCK": 6,
|
||||
"DQSS": 1,
|
||||
"ESCKE": 3,
|
||||
"FAW": 64,
|
||||
"PPD": 4,
|
||||
"RCD": 29,
|
||||
"REFI": 6246,
|
||||
"REFIPB": 780,
|
||||
"RFCAB": 448,
|
||||
"RFCPB": 224,
|
||||
"RL": 28,
|
||||
"RAS": 68,
|
||||
"RPAB": 34,
|
||||
"RPPB": 29,
|
||||
"RCAB": 102,
|
||||
"RCPB": 97,
|
||||
"RPST": 0,
|
||||
"RRD": 16,
|
||||
"RTP": 12,
|
||||
"SR": 24,
|
||||
"WL": 14,
|
||||
"WPRE": 2,
|
||||
"WR": 29,
|
||||
"WTR": 16,
|
||||
"XP": 12,
|
||||
"XSR": 460,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 1600
|
||||
}
|
||||
}
|
||||
}
|
||||
57
configs/memspec/MICRON_1Gb_DDR2-1066_16bit_H.json
Normal file
57
configs/memspec/MICRON_1Gb_DDR2-1066_16bit_H.json
Normal file
@@ -0,0 +1,57 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR2-1066_16bit_H",
|
||||
"memoryType": "DDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 90.0,
|
||||
"idd2n": 36.0,
|
||||
"idd2p0": 7.0,
|
||||
"idd2p1": 7.0,
|
||||
"idd3n": 42.0,
|
||||
"idd3p0": 10.0,
|
||||
"idd3p1": 23.0,
|
||||
"idd4r": 180.0,
|
||||
"idd4w": 185.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 7.0,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 24,
|
||||
"RAS": 24,
|
||||
"RC": 31,
|
||||
"RCD": 7,
|
||||
"REFI": 3120,
|
||||
"RFC": 68,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 3,
|
||||
"XPDLL": 10,
|
||||
"XS": 74,
|
||||
"XSDLL": 200,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
57
configs/memspec/MICRON_1Gb_DDR2-800_16bit_H.json
Normal file
57
configs/memspec/MICRON_1Gb_DDR2-800_16bit_H.json
Normal file
@@ -0,0 +1,57 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR2-800_16bit_H",
|
||||
"memoryType": "DDR2",
|
||||
"mempowerspec": {
|
||||
"idd0": 80.0,
|
||||
"idd2n": 30.0,
|
||||
"idd2p0": 7.0,
|
||||
"idd2p1": 7.0,
|
||||
"idd3n": 35.0,
|
||||
"idd3p0": 10.0,
|
||||
"idd3p1": 20.0,
|
||||
"idd4r": 150.0,
|
||||
"idd4w": 160.0,
|
||||
"idd5": 150.0,
|
||||
"idd6": 7.0,
|
||||
"vdd": 1.8
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 2,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 5,
|
||||
"DQSCK": 0,
|
||||
"FAW": 18,
|
||||
"RAS": 16,
|
||||
"RC": 23,
|
||||
"RCD": 5,
|
||||
"REFI": 3120,
|
||||
"RFC": 51,
|
||||
"RL": 5,
|
||||
"RP": 5,
|
||||
"RRD": 4,
|
||||
"RTP": 3,
|
||||
"WL": 4,
|
||||
"WR": 6,
|
||||
"WTR": 3,
|
||||
"XP": 2,
|
||||
"XPDLL": 8,
|
||||
"XS": 55,
|
||||
"XSDLL": 200,
|
||||
"clkMhz": 400
|
||||
}
|
||||
}
|
||||
}
|
||||
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G.json
Normal file
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G.json
Normal file
@@ -0,0 +1,61 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 75.0,
|
||||
"idd2n": 35.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 45.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 140.0,
|
||||
"idd4w": 155.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_2s.json
Normal file
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_2s.json
Normal file
@@ -0,0 +1,61 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_2s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 70.22,
|
||||
"idd2n": 30.95,
|
||||
"idd2p0": 9.07,
|
||||
"idd2p1": 18.9,
|
||||
"idd3n": 39.0,
|
||||
"idd3p0": 26.0,
|
||||
"idd3p1": 26.0,
|
||||
"idd4r": 128.59,
|
||||
"idd4w": 144.31,
|
||||
"idd5": 150.64,
|
||||
"idd6": 6.02,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_3s.json
Normal file
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_3s.json
Normal file
@@ -0,0 +1,61 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_3s",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 71.81,
|
||||
"idd2n": 32.3,
|
||||
"idd2p0": 10.04,
|
||||
"idd2p1": 20.93,
|
||||
"idd3n": 41.0,
|
||||
"idd3p0": 27.33,
|
||||
"idd3p1": 27.33,
|
||||
"idd4r": 132.39,
|
||||
"idd4w": 147.87,
|
||||
"idd5": 153.76,
|
||||
"idd6": 6.68,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_mu.json
Normal file
61
configs/memspec/MICRON_1Gb_DDR3-1066_16bit_G_mu.json
Normal file
@@ -0,0 +1,61 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 8192,
|
||||
"width": 16,
|
||||
"nbrOfDevices": 4,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_16bit_G_mu",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 67.04,
|
||||
"idd2n": 28.25,
|
||||
"idd2p0": 7.12,
|
||||
"idd2p1": 14.83,
|
||||
"idd3n": 35.01,
|
||||
"idd3p0": 23.34,
|
||||
"idd3p1": 23.34,
|
||||
"idd4r": 120.98,
|
||||
"idd4w": 137.19,
|
||||
"idd5": 144.41,
|
||||
"idd6": 4.7,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 27,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 6,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
61
configs/memspec/MICRON_1Gb_DDR3-1066_8bit_G.json
Normal file
61
configs/memspec/MICRON_1Gb_DDR3-1066_8bit_G.json
Normal file
@@ -0,0 +1,61 @@
|
||||
{
|
||||
"memspec": {
|
||||
"memarchitecturespec": {
|
||||
"burstLength": 8,
|
||||
"dataRate": 2,
|
||||
"nbrOfBanks": 8,
|
||||
"nbrOfColumns": 1024,
|
||||
"nbrOfRanks": 1,
|
||||
"nbrOfRows": 16384,
|
||||
"width": 8,
|
||||
"nbrOfDevices": 8,
|
||||
"nbrOfChannels": 1
|
||||
},
|
||||
"memoryId": "MICRON_1Gb_DDR3-1066_8bit_G",
|
||||
"memoryType": "DDR3",
|
||||
"mempowerspec": {
|
||||
"idd0": 60.0,
|
||||
"idd2n": 35.0,
|
||||
"idd2p0": 12.0,
|
||||
"idd2p1": 25.0,
|
||||
"idd3n": 40.0,
|
||||
"idd3p0": 30.0,
|
||||
"idd3p1": 30.0,
|
||||
"idd4r": 105.0,
|
||||
"idd4w": 110.0,
|
||||
"idd5": 160.0,
|
||||
"idd6": 8.0,
|
||||
"vdd": 1.5
|
||||
},
|
||||
"memtimingspec": {
|
||||
"AL": 0,
|
||||
"CCD": 4,
|
||||
"CKE": 3,
|
||||
"CKESR": 4,
|
||||
"CL": 7,
|
||||
"DQSCK": 0,
|
||||
"FAW": 20,
|
||||
"RAS": 20,
|
||||
"RC": 27,
|
||||
"RCD": 7,
|
||||
"REFI": 4160,
|
||||
"RFC": 59,
|
||||
"RL": 7,
|
||||
"RP": 7,
|
||||
"RRD": 4,
|
||||
"RTP": 4,
|
||||
"WL": 6,
|
||||
"WR": 8,
|
||||
"WTR": 4,
|
||||
"XP": 4,
|
||||
"XPDLL": 13,
|
||||
"XS": 64,
|
||||
"XSDLL": 512,
|
||||
"ACTPDEN": 1,
|
||||
"PRPDEN": 1,
|
||||
"REFPDEN": 1,
|
||||
"RTRS": 1,
|
||||
"clkMhz": 533
|
||||
}
|
||||
}
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user