Have a one cycle END_RESP delay in the standard initiator

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Derek Christ

2025-01-24 14:42:48 +01:00

parent 1225f6b044

commit ba94d9fd84

11 changed files with 14 additions and 14 deletions

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tests/tests_regression/LPDDR5/expected/DRAMSys_lpddr4-example_lpddr4_ch0.tdb LFS

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tests/tests_regression/LPDDR5/expected/DRAMSys_lpddr5-example_example_ch0.tdb LFS Normal file

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