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Added Hammer Generator and some Refactorings

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This commit is contained in:
Matthias Jung
2021-09-01 14:53:17 +02:00
parent a101d80f44
commit b6cc348146
7 changed files with 101 additions and 35 deletions
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6
DRAMSys/library/resources/configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json
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@@ -16,9 +16,9 @@
"nbrOfChannels": 2,
"cmdMode": 1,
"refMode": 1,
"RAAIMT" : 3,
"RAAMMT" : 1,
"RAADEC" : 3
"RAAIMT" : 32,
"RAAMMT" : 64,
"RAADEC" : 16
},
"memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A",
"memoryType": "DDR5",

13
DRAMSys/library/resources/simulations/ddr5-rfm.json
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@@ -11,14 +11,19 @@
"clkMhz": 2000,
"type": "generator",
"name": "gen0",
"numRequests": 2000,
"numRequests": 4000,
"rwRatio": 0.85,
"addressDistribution": "random",
"seed": 123456,
"maxPendingReadRequests": 8,
"maxPendingWriteRequests": 8
"maxPendingReadRequests": 24,
"maxPendingWriteRequests": 24
},
{
"clkMhz": 4000,
"type": "hammer",
"name": "ham0",
"numRequests": 4000
}
]
}
}

14
DRAMSys/library/src/controller/BankMachine.cpp
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@@ -75,7 +75,7 @@ void BankMachine::updateState(Command command)
case Command::PDEA: case Command::PDEP: case Command::SREFEN:
sleeping = true;
break;
case Command::REFA: case Command::REFB: case Command::REFSB: case Command::RFMAB: case Command::RFMSB:
case Command::REFA: case Command::REFB: case Command::REFSB:
sleeping = false;
blocked = false;
@@ -87,6 +87,18 @@ void BankMachine::updateState(Command command)
}
}
break;
case Command::RFMAB: case Command::RFMSB:
sleeping = false;
blocked = false;
if(Configuration::getInstance().RFM == true) {
if (RFMCounter > Configuration::getInstance().memSpec->getRAAIMT()) {
RFMCounter -= Configuration::getInstance().memSpec->getRAAIMT();
} else {
RFMCounter = 0;
}
}
break;
case Command::PDXA: case Command::PDXP:
sleeping = false;
break;

58
DRAMSys/library/src/controller/refresh/RefreshManagerAllBank.cpp
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@@ -65,19 +65,6 @@ sc_time RefreshManagerAllBank::start()
timeToSchedule = sc_max_time();
nextCommand = Command::NOP;
// TODO nach unten ziehen, und in BM auslagern....
bool RFMRequired = false;
if(Configuration::getInstance().RFM == true) {
for(auto bm : bankMachinesOnRank) {
uint64_t threshold = memSpec->getRAAIMT() * memSpec->getRAAMMT();
if(bm->getRFMCounter() >= threshold) {
RFMRequired = true;
break;
}
}
}
if (sc_time_stamp() >= timeForNextTrigger)
{
powerDownManager->triggerInterruption();
@@ -151,21 +138,38 @@ sc_time RefreshManagerAllBank::start()
}
}
}
else if (RFMRequired)
{
if (activatedBanks > 0)
nextCommand = Command::PREA;
else
nextCommand = Command::RFMAB;
for (auto it : bankMachinesOnRank)
it->block();
timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, &refreshPayload);
return timeToSchedule;
}
else
return timeForNextTrigger;
{
bool RFMRequired = false;
if(Configuration::getInstance().RFM == true) {
for(auto bm : bankMachinesOnRank) {
uint64_t lowerThreshold = memSpec->getRAAIMT();
uint64_t upperThreshold = memSpec->getRAAMMT();
if(bm->getRFMCounter() >= lowerThreshold) {
RFMRequired = true;
break;
}
}
}
if(RFMRequired)
{
if (activatedBanks > 0)
nextCommand = Command::PREA;
else
nextCommand = Command::RFMAB;
for (auto it : bankMachinesOnRank)
it->block();
timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, &refreshPayload);
return timeToSchedule;
}
else
return timeForNextTrigger;
}
}
void RefreshManagerAllBank::updateState(Command command)

10
DRAMSys/simulator/TraceSetup.cpp
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@@ -171,6 +171,16 @@ TraceSetup::TraceSetup(const std::string &uri,
totalTransactions += numRequests;
}
else if (type == "hammer")
{
if (!value["numRequests"].is_number_unsigned())
SC_REPORT_FATAL("TraceSetup", "Number of requests is not a number.");
uint64_t numRequests = value["numRequests"];
auto generator = new TrafficGeneratorHammer(name.c_str(), playerClk, numRequests, this);
players.push_back(generator);
}
}
}

21
DRAMSys/simulator/TrafficGenerator.cpp
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@@ -147,3 +147,24 @@ uint64_t TrafficGeneratorSequential::getNextAddress()
currentAddress += addressIncrement;
return address;
}
TrafficGeneratorHammer::TrafficGeneratorHammer(const sc_core::sc_module_name &name,
const sc_core::sc_time &generatorClk,
uint64_t numRequests,
TraceSetup *setup) :
TrafficGenerator(name, generatorClk, numRequests, 0, 0, 1, 1, setup)
{
}
uint64_t TrafficGeneratorHammer::getNextAddress()
{
uint64_t address = currentAddress;
if(currentAddress == 0) {
currentAddress += 2097152;
} else {
currentAddress = 0;
}
return address;
}

14
DRAMSys/simulator/TrafficGenerator.h
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@@ -108,4 +108,18 @@ private:
uint64_t addressIncrement;
};
class TrafficGeneratorHammer final : public TrafficGenerator
{
public:
TrafficGeneratorHammer(const sc_core::sc_module_name &name,
const sc_core::sc_time &generatorClk,
uint64_t numRequests,
TraceSetup *setup);
private:
uint64_t getNextAddress() override;
uint64_t currentAddress = 0x0;
};
#endif // TRAFFICGENERATOR_H