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burstlength fix ddr4

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This commit is contained in:
Janik Schlemminger
2014-04-12 21:00:26 +02:00
parent e9633c1b30
commit b00e65a91f
1 changed files with 10 additions and 5 deletions
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15
dram/src/core/TimingCalculation.cpp
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@@ -63,17 +63,22 @@ sc_time getExecutionTime(Command command,tlm::tlm_generic_payload& payload)
}
else if(command == Command::Write || command == Command::WriteA)
{
sc_time lengthOnDataStrobe = getBurstLengthOnDataStrobe(payload.get_streaming_width());
if(Configuration::getInstance().DataRate == 1)
lengthOnDataStrobe -= Configuration::getInstance().Timings.clk;
sc_time lockTime;;
Configuration& config = Configuration::getInstance();
if(config.DataRate == 1)
lockTime = getBurstLengthOnDataStrobe(payload.get_streaming_width()) - config.Timings.clk;
else //special case DDR4 -> always 4 clocks
{
lockTime = config.Timings.clk * config.BurstLength / config.DataRate;
}
if (command == Command::Write)
{
return config.tWL + lengthOnDataStrobe;
return config.Timings.tWL + lockTime;
}
else
{
return config.tWL + lengthOnDataStrobe + config.tWR;
return config.Timings.tWL + lockTime + config.Timings.tWR;
}
}
else if(command == Command::PrechargeAll)