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Address mappings and specs that may be useful

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Also specificaiton file for a SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.
Nevertheless, this spec file is not necessarily 100% correct. Use this file at
your own risk! Before using this file, it's strongly recommended that you
double check if the ALL currents provided are for a DIMM (made of 4 chips x16
in this case) or a Device (one single chip x16). Currents were measured.
Additionally, the original fck was 800 MHz (DDR3-1600) but then underclocked
to fck 533 MHz (DDR3-1066).

Other changes:
Avoid duplicate trace files in Sim. manager.
This commit is contained in:
Éder F. Zulian
2016-11-19 17:25:36 +01:00
parent b0506239b0
commit aa6b7af216
5 changed files with 142 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

35
DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_brc.xml Normal file
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@@ -0,0 +1,35 @@
<!--
DDR3L Unbuffered SODIMM Information:
Part Number: M471B5674QH0-YH9/K0
Density: 2GB
Organization: 256Mx64
Component Composition: 256Mx16(K4B4G1646Q-HY##)*4
Number of Rank: 1
Device mounted: K4B4G1646Q-HYK0
Original fck is 800 MHz (DDR3-1600). Adapted to fck 533 MHz (DDR-1066).
Deepak provided most of the timing and current values. For the ones not provided datasheet values were used.
2GB x64 DIMM with: 4 * 4Gb x16 devices (K4B4G1646Q-HYK0) with Page Size: 2KB
DIMM Characteristics:
Byte Offset (Y): 8 [0:2] (8-byte-wide memory module, i.e., 64-bit-wide data bus) -> 3 bit
Cols (C): 1K [3:12] (A0 - A9) -> 10 bit
Rows (R): 32K [13:27] (A0 - A14) -> 15 bit
Bank (B): 8 [28:30] (BA0 - BA2) -> 3 bit
3 2 2 | 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1
0 9 8 | 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
B B B | R R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
-->
<addressmapping>
<channel from="128" to="128" /> <!-- workaround to have only one channel -->
<bank from="28" to="30" />
<row from="13" to="27" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>

35
DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_rbc.xml Normal file
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@@ -0,0 +1,35 @@
<!--
DDR3L Unbuffered SODIMM Information:
Part Number: M471B5674QH0-YH9/K0
Density: 2GB
Organization: 256Mx64
Component Composition: 256Mx16(K4B4G1646Q-HY##)*4
Number of Rank: 1
Device mounted: K4B4G1646Q-HYK0
Original fck is 800 MHz (DDR3-1600). Adapted to fck 533 MHz (DDR-1066).
Deepak provided most of the timing and current values. For the ones not provided datasheet values were used.
2GB x64 DIMM with: 4 * 4Gb x16 devices (K4B4G1646Q-HYK0) with Page Size: 2KB
DIMM Characteristics:
Byte Offset (Y): 8 [0:2] (8-byte-wide memory module, i.e., 64-bit-wide data bus) -> 3 bit
Cols (C): 1K [3:12] (A0 - A9) -> 10 bit
Bank (B): 8 [13:15] (BA0 - BA2) -> 3 bit
Rows (R): 32K [16:30] (A0 - A14) -> 15 bit
3 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1 | 1 1 1
0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 | 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
R R R R R R R R R R R R R R R | B B B | C C C C C C C C C C | Y Y Y
-->
<addressmapping>
<channel from="128" to="128" /> <!-- workaround to have only one channel -->
<row from="16" to="30" />
<bank from="13" to="15" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>

67
DRAMSys/simulator/resources/configs/memspecs/SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.xml Normal file
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@@ -0,0 +1,67 @@
<!DOCTYPE memspec SYSTEM "memspec.dtd">
<memspec>
<!--
DDR3L Unbuffered SODIMM Information
Part Number: M471B5674QH0-YH9/K0
Density: 2GB
Organization: 256Mx64
Component Composition: 256Mx16(K4B4G1646Q-HY##)*4
Number of Rank: 1
Device mounted: K4B4G1646Q-HYK0
Original fck is 800 MHz (DDR3-1600). Adapted to fck 533 MHz (DDR-1066).
Deepak provided most of the timing and current values.
-->
<parameter id="memoryId" type="string" value="SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit" />
<parameter id="memoryType" type="string" value="DDR3" />
<memarchitecturespec>
<parameter id="width" type="uint" value="16" />
<parameter id="nbrOfBanks" type="uint" value="8" />
<parameter id="nbrOfRanks" type="uint" value="1" />
<parameter id="nbrOfColumns" type="uint" value="1024" />
<parameter id="nbrOfRows" type="uint" value="32768" />
<parameter id="dataRate" type="uint" value="2" />
<parameter id="burstLength" type="uint" value="8" />
</memarchitecturespec>
<memtimingspec>
<parameter id="clkMhz" type="double" value="533" />
<parameter id="RC" type="uint" value="27" />
<parameter id="RCD" type="uint" value="8" />
<parameter id="RL" type="uint" value="6" />
<parameter id="RP" type="uint" value="8" />
<parameter id="RFC" type="uint" value="160" />
<parameter id="RAS" type="uint" value="20" />
<parameter id="WL" type="uint" value="5" />
<parameter id="AL" type="uint" value="0" />
<parameter id="DQSCK" type="uint" value="0" />
<parameter id="RTP" type="uint" value="6" />
<parameter id="WR" type="uint" value="8" />
<parameter id="XP" type="uint" value="4" />
<parameter id="XPDLL" type="uint" value="13" />
<parameter id="XS" type="uint" value="64" />
<parameter id="XSDLL" type="uint" value="512" />
<parameter id="REFI" type="uint" value="4160" />
<parameter id="CL" type="uint" value="6" />
<parameter id="FAW" type="uint" value="24" />
<parameter id="RRD" type="uint" value="8" />
<parameter id="CCD" type="uint" value="4" />
<parameter id="WTR" type="uint" value="6" />
<parameter id="CKE" type="uint" value="6" />
<parameter id="CKESR" type="uint" value="5" />
</memtimingspec>
<mempowerspec>
<parameter id="idd0" type="double" value="122.0" />
<parameter id="idd2p0" type="double" value="15.0" />
<parameter id="idd2p1" type="double" value="55.0" />
<parameter id="idd2n" type="double" value="39.0" />
<parameter id="idd3p0" type="double" value="70.0" />
<parameter id="idd3p1" type="double" value="70.0" />
<parameter id="idd3n" type="double" value="58.0" />
<parameter id="idd4w" type="double" value="440.0" />
<parameter id="idd4r" type="double" value="410.0" />
<parameter id="idd5" type="double" value="441.0" />
<parameter id="idd6" type="double" value="21.8" />
<parameter id="vdd" type="double" value="1.5" />
</mempowerspec>
</memspec>

4
DRAMSys/simulator/resources/resources.pri
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@@ -51,6 +51,7 @@ OTHER_FILES += resources/traces/chstone-motion_32.stl
OTHER_FILES += resources/traces/mediabench-adpcmdecode_32.stl
OTHER_FILES += resources/traces/ddr3_example.stl
OTHER_FILES += resources/traces/ddr3_single_dev_example.stl
OTHER_FILES += resources/traces/ddr3_SAMSUNG_M471B5674QH0_DIMM_example.stl
# mcconfigs
OTHER_FILES += resources/configs/mcconfigs/fifoStrict.xml
@@ -103,6 +104,7 @@ OTHER_FILES += resources/configs/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.xml
OTHER_FILES += resources/configs/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml
OTHER_FILES += resources/configs/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml
OTHER_FILES += resources/configs/memspecs/SAMSUNG_K4B1G1646E_1Gb_DDR3-1600_16bit.xml
OTHER_FILES += resources/configs/memspecs/SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.xml
# address mapping configs
OTHER_FILES += resources/configs/amconfigs/am_ddr3.xml
@@ -120,6 +122,8 @@ OTHER_FILES += resources/configs/amconfigs/am_lowHits.xml
OTHER_FILES += resources/configs/amconfigs/am_lowPara.xml
OTHER_FILES += resources/configs/amconfigs/am_wideioFourBanks.xml
OTHER_FILES += resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml
OTHER_FILES += resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_brc.xml
OTHER_FILES += resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_rbc.xml
# thermal simulation configs
OTHER_FILES += resources/configs/thermalsim/core.flp

3
DRAMSys/simulator/src/simulation/SimulationManager.cpp
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@@ -262,8 +262,6 @@ void SimulationManager::addTraceSetups(SimulationBatch &batch, tinyxml2::XMLElem
ntp->QueryUnsignedAttribute("value", &numberOfTracePlayers);
for (XMLElement *tracesetup = tracesetups->FirstChildElement("tracesetup"); tracesetup != NULL; tracesetup = tracesetup->NextSiblingElement("tracesetup")) {
// TODO: check device's "bl" argument.
for (XMLElement *device = tracesetup->FirstChildElement("device"); device != NULL; device = device->NextSiblingElement("device")) {
devices.push_back(Device(device->GetText(), device->IntAttribute("clkMhz"), device->IntAttribute("bl")));
}
@@ -274,6 +272,7 @@ void SimulationManager::addTraceSetups(SimulationBatch &batch, tinyxml2::XMLElem
}
batch.traceSetups.emplace(tracesetup->Attribute("id"), devices);
devices.clear();
}
}