Update expected traces for DDR5 and HBM3

2023-08-15 11:28:03 +02:00
parent a18bbc7465
commit a4342f7104
6 changed files with 11 additions and 12 deletions
--- a/tests/tests_regression/HBM3/hbm3-example.json
+++ b/tests/tests_regression/HBM3/hbm3-example.json
@@ -79,7 +79,7 @@
                "CCDS": 2,
                "CKE": 8,
                "DQSCK": 1,
-                "FAW": 16, 
+                "FAW": 16,
                "PL": 0,
                "PPD": 2,
                "RAS": 28,
@@ -126,11 +126,11 @@
        "simulationid": "hbm3-example",
        "tracesetup": [
            {
-                "clkMhz": 1000,
+                "clkMhz": 1600,
                "name": "trace1_test4.stl"
            },
 	    {
-                "clkMhz": 1000,
+                "clkMhz": 1600,
                "name": "trace2_test4.stl"
            }
        ]