Reformat all files.

This commit is contained in:
Lukas Steiner
2023-09-21 16:50:59 +02:00
parent 7eea9c54e0
commit 8224e97abe
44 changed files with 1992 additions and 1097 deletions

View File

@@ -40,9 +40,9 @@
#include <DRAMSys/controller/checker/CheckerIF.h>
#include <DRAMSys/configuration/memspec/MemSpecDDR5.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/common/utils.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/configuration/memspec/MemSpecDDR5.h>
namespace DRAMSys
{
@@ -51,15 +51,19 @@ class CheckerDDR5 final : public CheckerIF
{
public:
explicit CheckerDDR5(const Configuration& config);
sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecDDR5 *memSpec;
const MemSpecDDR5* memSpec;
std::vector<ControllerVector<DimmRank, sc_core::sc_time>> lastScheduledByCommandAndDimmRank;
std::vector<ControllerVector<PhysicalRank, sc_core::sc_time>> lastScheduledByCommandAndPhysicalRank;
std::vector<ControllerVector<LogicalRank, sc_core::sc_time>> lastScheduledByCommandAndLogicalRank;
std::vector<ControllerVector<PhysicalRank, sc_core::sc_time>>
lastScheduledByCommandAndPhysicalRank;
std::vector<ControllerVector<LogicalRank, sc_core::sc_time>>
lastScheduledByCommandAndLogicalRank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<sc_core::sc_time> lastScheduledByCommand;

View File

@@ -44,18 +44,21 @@ using namespace tlm;
namespace DRAMSys
{
CheckerHBM3::CheckerHBM3(const Configuration &config)
CheckerHBM3::CheckerHBM3(const Configuration& config)
{
memSpec = dynamic_cast<const MemSpecHBM3 *>(config.memSpec.get());
memSpec = dynamic_cast<const MemSpecHBM3*>(config.memSpec.get());
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerHBM3", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(), ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnRasBus = scMaxTime;
lastCommandOnCasBus = scMaxTime;
@@ -72,7 +75,8 @@ CheckerHBM3::CheckerHBM3(const Configuration &config)
tWRRDL = memSpec->tWL + 2 * memSpec->tCK + memSpec->tWTRL;
}
sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic_payload &payload) const
sc_time CheckerHBM3::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -85,7 +89,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
@@ -108,13 +113,15 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP);
if (lastCommandOnRasBus != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK / 2);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK / 2);
}
else if (command == Command::RD)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -159,7 +166,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -196,7 +204,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -216,8 +225,10 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + 2 * memSpec->tCK +
std::max(memSpec->tWR - memSpec->tRTP, memSpec->tWTRL));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tWL + 2 * memSpec->tCK +
std::max(memSpec->tWR - memSpec->tRTP, memSpec->tWTRL));
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -246,7 +257,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -296,48 +308,58 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK);
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart,
lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::REFPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::REFPB][bankGroup];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RFMAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RFMPB][bank];
if (lastCommandStart != scMaxTime)
@@ -349,7 +371,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart =
@@ -362,15 +385,18 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -411,7 +437,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -446,29 +473,35 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
if (lastCommandOnRasBus != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK / 2);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK / 2);
}
else if (command == Command::REFPB)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::ACT][bankGroup];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -518,9 +551,11 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
{
if (bankwiseRefreshCounter[rank] == 0)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
}
if (last4Activates[rank].size() >= 4)
@@ -534,16 +569,19 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
std::max(earliestTimeToStart,
lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -576,7 +614,8 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
@@ -601,15 +640,18 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::ACT][bankGroup];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
@@ -727,14 +769,15 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic
return earliestTimeToStart;
}
void CheckerHBM3::insert(Command command, const tlm_generic_payload &payload)
void CheckerHBM3::insert(Command command, const tlm_generic_payload& payload)
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
Bank bank = ControllerExtension::getBank(payload);
PRINTDEBUGMESSAGE("CheckerHBM3", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerHBM3",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

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@@ -40,25 +40,26 @@
#include <DRAMSys/controller/checker/CheckerIF.h>
#include <DRAMSys/configuration/memspec/MemSpecHBM3.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/common/utils.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/configuration/memspec/MemSpecHBM3.h>
namespace DRAMSys
{
class CheckerHBM3 final : public CheckerIF
{
public:
explicit CheckerHBM3(const Configuration& config);
sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
bool isFullCycle(const sc_core::sc_time& time) const;
const MemSpecHBM3 *memSpec;
const MemSpecHBM3* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

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@@ -40,9 +40,9 @@
#include <DRAMSys/controller/checker/CheckerIF.h>
#include <DRAMSys/configuration/memspec/MemSpecLPDDR5.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/common/utils.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/configuration/memspec/MemSpecLPDDR5.h>
namespace DRAMSys
{
@@ -51,11 +51,13 @@ class CheckerLPDDR5 final : public CheckerIF
{
public:
explicit CheckerLPDDR5(const Configuration& config);
sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecLPDDR5 *memSpec;
const MemSpecLPDDR5* memSpec;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -37,11 +37,10 @@
#define SOCKETCOUPLER_H
#include <systemc>
#include <tlm_utils/simple_target_socket.h>
#include <tlm_utils/multi_passthrough_initiator_socket.h>
#include <tlm_utils/simple_target_socket.h>
template<unsigned T = 1>
class SocketCoupler : public sc_core::sc_module
template <unsigned T = 1> class SocketCoupler : public sc_core::sc_module
{
public:
SocketCoupler(sc_core::sc_module_name name) : sc_core::sc_module(name)
@@ -58,19 +57,23 @@ public:
tlm_utils::multi_passthrough_initiator_socket<SocketCoupler> iSocket;
private:
tlm::tlm_sync_enum nb_transport_fw(int id, tlm::tlm_generic_payload &payload,
tlm::tlm_phase &phase, sc_core::sc_time &delay)
tlm::tlm_sync_enum nb_transport_fw(int id,
tlm::tlm_generic_payload& payload,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
return iSocket[id]->nb_transport_fw(payload, phase, delay);
}
unsigned transport_dbg(int id, tlm::tlm_generic_payload &trans)
unsigned transport_dbg(int id, tlm::tlm_generic_payload& trans)
{
return iSocket[id]->transport_dbg(trans);
}
tlm::tlm_sync_enum nb_transport_bw(int id, tlm::tlm_generic_payload &payload,
tlm::tlm_phase &phase, sc_core::sc_time &delay)
tlm::tlm_sync_enum nb_transport_bw(int id,
tlm::tlm_generic_payload& payload,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
return tSocket[id]->nb_transport_bw(payload, phase, delay);
}

View File

@@ -43,7 +43,6 @@
#include <tlm_utils/multi_passthrough_target_socket.h>
/**
* This is just a dummy module. Platform Architect is not able to parse the
* real module...
@@ -57,9 +56,7 @@ public:
sc_core::sc_event terminateSimulation;
SC_HAS_PROCESS(DRAMSys);
DRAMSys(sc_core::sc_module_name name,
std::string simulationToRun,
std::string pathToResources);
DRAMSys(sc_core::sc_module_name name, std::string simulationToRun, std::string pathToResources);
};
class DRAMSysRecordable : public DRAMSys
@@ -71,4 +68,3 @@ public:
};
#endif // DUMMY_H

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@@ -50,10 +50,12 @@ CheckerDDR3::CheckerDDR3(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerDDR3", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -69,7 +71,8 @@ CheckerDDR3::CheckerDDR3(const Configuration& config) :
tWRAPDEN = memSpec->tWL + tBURST + memSpec->tWR + memSpec->tCK;
}
sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerDDR3::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
Bank bank = ControllerExtension::getBank(payload);
@@ -83,29 +86,39 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
@@ -132,19 +145,24 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSDLL);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
assert(ControllerExtension::getBurstLength(payload) == 8);
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -152,7 +170,10 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -160,17 +181,25 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -192,11 +221,14 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -223,7 +255,8 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PREPB)
{
@@ -233,7 +266,8 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
@@ -251,11 +285,13 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
@@ -277,11 +313,14 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -307,7 +346,8 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -327,7 +367,8 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -355,11 +396,13 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank];
if (lastCommandStart != scMaxTime)
@@ -367,7 +410,8 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
if (lastCommandStart != scMaxTime)
@@ -387,11 +431,14 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart,
lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -439,8 +486,9 @@ void CheckerDDR3::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerDDR3", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerDDR3",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndRank[command][rank] = sc_time_stamp();
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERDDR3_H
#define CHECKERDDR3_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecDDR3.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecDDR3.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerDDR3 final : public CheckerIF
{
public:
explicit CheckerDDR3(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecDDR3 *memSpec;
const MemSpecDDR3* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;

View File

@@ -50,13 +50,15 @@ CheckerDDR4::CheckerDDR4(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerDDR4", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>
(Command::numberOfCommands(), ControllerVector<BankGroup,
sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -73,7 +75,8 @@ CheckerDDR4::CheckerDDR4(const Configuration& config) :
tWRAPDEN = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR;
}
sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerDDR4::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -88,7 +91,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -98,9 +102,13 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_S);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -110,15 +118,20 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_S);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
}
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
@@ -153,19 +166,24 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSDLL);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
assert(ControllerExtension::getBurstLength(payload) == 8);
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -173,7 +191,10 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -185,9 +206,13 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_S);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -197,9 +222,13 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_S);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -225,11 +254,14 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -256,7 +288,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PREPB)
{
@@ -266,7 +299,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
@@ -284,11 +318,13 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
@@ -310,11 +346,14 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -340,7 +379,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -360,7 +400,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -388,11 +429,13 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank];
if (lastCommandStart != scMaxTime)
@@ -400,7 +443,8 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
if (lastCommandStart != scMaxTime)
@@ -420,11 +464,14 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart,
lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -473,8 +520,9 @@ void CheckerDDR4::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerDDR4", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerDDR4",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

View File

@@ -35,14 +35,14 @@
#ifndef CHECKERDDR4_H
#define CHECKERDDR4_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecDDR4.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecDDR4.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
#include <unordered_map>
#include <utility>
#include <vector>
namespace DRAMSys
{
@@ -51,11 +51,13 @@ class CheckerDDR4 final : public CheckerIF
{
public:
explicit CheckerDDR4(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecDDR4 *memSpec;
const MemSpecDDR4* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -50,13 +50,15 @@ CheckerGDDR5::CheckerGDDR5(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerGDDR5", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>
(Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -74,7 +76,8 @@ CheckerGDDR5::CheckerGDDR5(const Configuration& config) :
tWRPRE = memSpec->tWL + tBURST + memSpec->tWR;
}
sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -99,9 +102,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -111,15 +118,20 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
}
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
@@ -130,7 +142,10 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -142,7 +157,10 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -166,7 +184,10 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -174,7 +195,10 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -186,9 +210,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -198,9 +226,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -226,11 +258,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -265,10 +299,12 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
if (last32Activates[rank].size() >= 32)
earliestTimeToStart = std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
earliestTimeToStart =
std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
}
else if (command == Command::PREPB)
{
@@ -334,11 +370,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -380,11 +418,13 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -414,9 +454,11 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
{
if (bankwiseRefreshCounter[rank] == 0)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
@@ -424,10 +466,12 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
if (last32Activates[rank].size() >= 32)
earliestTimeToStart = std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
earliestTimeToStart =
std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
}
else if (command == Command::PDEA)
{
@@ -497,11 +541,14 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -549,8 +596,9 @@ void CheckerGDDR5::insert(Command command, const tlm_generic_payload& payload)
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
Bank bank = ControllerExtension::getBank(payload);
PRINTDEBUGMESSAGE("CheckerGDDR5", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerGDDR5",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERGDDR5_H
#define CHECKERGDDR5_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR5.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR5.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerGDDR5 final : public CheckerIF
{
public:
explicit CheckerGDDR5(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecGDDR5 *memSpec;
const MemSpecGDDR5* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -50,13 +50,15 @@ CheckerGDDR5X::CheckerGDDR5X(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerGDDR5X", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>
(Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -74,7 +76,8 @@ CheckerGDDR5X::CheckerGDDR5X(const Configuration& config) :
tWRPRE = memSpec->tWL + tBURST + memSpec->tWR;
}
sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -86,7 +89,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (command == Command::RD || command == Command::RDA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert(!(memSpec->dataRate == 4) || (burstLength == 8)); // DDR mode (QDR wrt CK)
assert(!(memSpec->dataRate == 4) || (burstLength == 8)); // DDR mode (QDR wrt CK)
assert(!(memSpec->dataRate == 8) || (burstLength == 16)); // QDR mode (ODR wrt CK)
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
@@ -101,9 +104,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -113,15 +120,20 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
}
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
@@ -132,7 +144,10 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -144,7 +159,10 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -159,7 +177,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
else if (command == Command::WR || command == Command::WRA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert(!(memSpec->dataRate == 4) || (burstLength == 8)); // DDR mode (QDR wrt CK)
assert(!(memSpec->dataRate == 4) || (burstLength == 8)); // DDR mode (QDR wrt CK)
assert(!(memSpec->dataRate == 8) || (burstLength == 16)); // QDR mode (ODR wrt CK)
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
@@ -170,7 +188,10 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -178,7 +199,10 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -190,9 +214,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -202,9 +230,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -230,11 +262,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -269,10 +303,12 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
if (last32Activates[rank].size() >= 32)
earliestTimeToStart = std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
earliestTimeToStart =
std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
}
else if (command == Command::PREPB)
{
@@ -338,11 +374,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -384,11 +422,13 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -418,9 +458,11 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
{
if (bankwiseRefreshCounter[rank] == 0)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCPB);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
@@ -428,10 +470,12 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
if (last32Activates[rank].size() >= 32)
earliestTimeToStart = std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
earliestTimeToStart =
std::max(earliestTimeToStart, last32Activates[rank].front() + memSpec->t32AW);
}
else if (command == Command::PDEA)
{
@@ -501,11 +545,14 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -553,8 +600,9 @@ void CheckerGDDR5X::insert(Command command, const tlm_generic_payload& payload)
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
Bank bank = ControllerExtension::getBank(payload);
PRINTDEBUGMESSAGE("CheckerGDDR5X", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerGDDR5X",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERGDDR5X_H
#define CHECKERGDDR5X_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR5X.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR5X.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerGDDR5X final : public CheckerIF
{
public:
explicit CheckerGDDR5X(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecGDDR5X *memSpec;
const MemSpecGDDR5X* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -50,13 +50,15 @@ CheckerGDDR6::CheckerGDDR6(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerGDDR6", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>
(Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -73,7 +75,8 @@ CheckerGDDR6::CheckerGDDR6(const Configuration& config) :
tWRPRE = memSpec->tWL + tBURST + memSpec->tWR;
}
sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -98,9 +101,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -110,15 +117,20 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
}
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
@@ -129,7 +141,10 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -141,7 +156,10 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_S);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -165,7 +183,10 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -173,7 +194,10 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTW);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -185,9 +209,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -197,9 +225,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -225,11 +257,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -264,7 +298,8 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PREPB)
{
@@ -330,11 +365,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -376,11 +413,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -410,9 +449,11 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
if (lastCommandStart != scMaxTime)
{
if (bankwiseRefreshCounter[rank] == 0)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
@@ -420,13 +461,15 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PDEA)
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -446,11 +489,13 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -478,19 +523,23 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPREPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFPDE);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank];
if (lastCommandStart != scMaxTime)
@@ -518,11 +567,14 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, const tlm_generi
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -570,8 +622,9 @@ void CheckerGDDR6::insert(Command command, const tlm_generic_payload& payload)
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
Bank bank = ControllerExtension::getBank(payload);
PRINTDEBUGMESSAGE("CheckerGDDR6", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerGDDR6",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERGDDR6_H
#define CHECKERGDDR6_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR6.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecGDDR6.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerGDDR6 final : public CheckerIF
{
public:
explicit CheckerGDDR6(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecGDDR6 *memSpec;
const MemSpecGDDR6* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -50,13 +50,15 @@ CheckerHBM2::CheckerHBM2(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerHBM2", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>
(Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndBankGroup = std::vector<ControllerVector<BankGroup, sc_time>>(
Command::numberOfCommands(),
ControllerVector<BankGroup, sc_time>(memSpec->bankGroupsPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnRasBus = scMaxTime;
lastCommandOnCasBus = scMaxTime;
@@ -74,7 +76,8 @@ CheckerHBM2::CheckerHBM2(const Configuration& config) :
tWRRDL = memSpec->tWL + tBURST + memSpec->tWTRL;
}
sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerHBM2::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
BankGroup bankGroup = ControllerExtension::getBankGroup(payload);
@@ -86,12 +89,14 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
if (command == Command::RD || command == Command::RDA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert(!(memSpec->ranksPerChannel == 1) || (burstLength == 2 || burstLength == 4)); // Legacy mode
assert(!(memSpec->ranksPerChannel == 1) ||
(burstLength == 2 || burstLength == 4)); // Legacy mode
assert(!(memSpec->ranksPerChannel == 2) || (burstLength == 4)); // Pseudo-channel mode
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankGroup];
if (lastCommandStart != scMaxTime)
@@ -113,7 +118,8 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP);
}
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup];
@@ -136,15 +142,18 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert(!(memSpec->ranksPerChannel == 1) || (burstLength == 2 || burstLength == 4)); // Legacy mode
assert(!(memSpec->ranksPerChannel == 1) ||
(burstLength == 2 || burstLength == 4)); // Legacy mode
assert(!(memSpec->ranksPerChannel == 2) || (burstLength == 4)); // Pseudo-channel mode
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -190,52 +199,65 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart,
lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK);
lastCommandStart = lastScheduledByCommand[Command::PDXA];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
lastCommandStart = lastScheduledByCommand[Command::PDXP];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::REFPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB - memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK);
lastCommandStart = lastScheduledByCommand[Command::SREFEX];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW - memSpec->tCK);
earliestTimeToStart = std::max(
earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW - memSpec->tCK);
}
else if (command == Command::PREPB)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
@@ -253,7 +275,8 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -283,15 +306,18 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -321,23 +347,28 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBankGroup[Command::ACT][bankGroup];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -367,9 +398,11 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
if (lastCommandStart != scMaxTime)
{
if (bankwiseRefreshCounter[rank] == 0)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD);
}
lastCommandStart = lastScheduledByCommand[Command::SREFEX];
@@ -377,7 +410,8 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PDEA)
{
@@ -439,15 +473,19 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, const tlm_generic
{
lastCommandStart = lastScheduledByCommand[Command::ACT];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK);
lastCommandStart = lastScheduledByCommand[Command::RDA];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(memSpec->tRTP + memSpec->tRP, tRDSRE));
lastCommandStart = lastScheduledByCommand[Command::WRA];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommand[Command::PREPB];
if (lastCommandStart != scMaxTime)
@@ -508,8 +546,9 @@ void CheckerHBM2::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerHBM2", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerHBM2",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndBankGroup[command][bankGroup] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERHBM2_H
#define CHECKERHBM2_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecHBM2.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecHBM2.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerHBM2 final : public CheckerIF
{
public:
explicit CheckerHBM2(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecHBM2 *memSpec;
const MemSpecHBM2* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<BankGroup, sc_core::sc_time>> lastScheduledByCommandAndBankGroup;

View File

@@ -45,16 +45,17 @@ namespace DRAMSys
class CheckerIF
{
protected:
CheckerIF(const CheckerIF &) = default;
CheckerIF(CheckerIF &&) = default;
CheckerIF &operator=(const CheckerIF &) = default;
CheckerIF &operator=(CheckerIF &&) = default;
CheckerIF(const CheckerIF&) = default;
CheckerIF(CheckerIF&&) = default;
CheckerIF& operator=(const CheckerIF&) = default;
CheckerIF& operator=(CheckerIF&&) = default;
public:
CheckerIF() = default;
virtual ~CheckerIF() = default;
[[nodiscard]] virtual sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const = 0;
[[nodiscard]] virtual sc_core::sc_time
timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const = 0;
virtual void insert(Command command, const tlm::tlm_generic_payload& payload) = 0;
};

View File

@@ -50,18 +50,22 @@ CheckerLPDDR4::CheckerLPDDR4(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerLPDDR4", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
lastBurstLengthByCommandAndBank = ControllerVector<Command, ControllerVector<Bank, uint8_t>>(Command::WRA + 1, ControllerVector<Bank, uint8_t>(memSpec->banksPerChannel));
lastBurstLengthByCommandAndBank = ControllerVector<Command, ControllerVector<Bank, uint8_t>>(
Command::WRA + 1, ControllerVector<Bank, uint8_t>(memSpec->banksPerChannel));
tBURST = memSpec->defaultBurstLength / memSpec->dataRate * memSpec->tCK;
tRDWR = memSpec->tRL + memSpec->tDQSCK + tBURST - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST;
tRDWR =
memSpec->tRL + memSpec->tDQSCK + tBURST - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST;
tRDWR_R = memSpec->tRL + tBURST + memSpec->tRTRS - memSpec->tWL;
tWRRD = memSpec->tWL + memSpec->tCK + tBURST + memSpec->tWTR;
tWRRD_R = memSpec->tWL + tBURST + memSpec->tRTRS - memSpec->tRL;
@@ -72,12 +76,21 @@ CheckerLPDDR4::CheckerLPDDR4(const Configuration& config) :
tACTPDEN = 3 * memSpec->tCK + memSpec->tCMDCKE;
tPRPDEN = memSpec->tCK + memSpec->tCMDCKE;
tRDPDEN = 3 * memSpec->tCK + memSpec->tRL + memSpec->tDQSCK + tBURST + memSpec->tRPST;
tWRPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR;
tWRAPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR + 2 * memSpec->tCK;
tWRPDEN =
3 * memSpec->tCK + memSpec->tWL +
(std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) *
memSpec->tCK +
tBURST + memSpec->tWR;
tWRAPDEN =
3 * memSpec->tCK + memSpec->tWL +
(std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) *
memSpec->tCK +
tBURST + memSpec->tWR + 2 * memSpec->tCK;
tREFPDEN = memSpec->tCK + memSpec->tCMDCKE;
}
sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
Bank bank = ControllerExtension::getBank(payload);
@@ -99,30 +112,42 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tRDPRE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tRDPRE);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -130,7 +155,10 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -138,7 +166,8 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert((burstLength == 16) || (burstLength == 32));
@@ -152,7 +181,10 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -160,7 +192,10 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -168,17 +203,25 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::MWR || command == Command::MWRA)
{
@@ -186,17 +229,21 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
{
if (lastBurstLengthByCommandAndBank[Command::WR][bank] == 32)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW + 8 * memSpec->tCK);
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + memSpec->tCCDMW + 8 * memSpec->tCK);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW);
}
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
{
if (lastBurstLengthByCommandAndBank[Command::WRA][bank] == 32)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW + 8 * memSpec->tCK);
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + memSpec->tCCDMW + 8 * memSpec->tCK);
else
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDMW);
}
}
@@ -224,11 +271,13 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb - 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb - 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab - 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab - 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -240,28 +289,35 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndRank[Command::REFAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCab - 2 * memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart,
lastCommandStart + memSpec->tRFCab - 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::REFPB][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb - 2 * memSpec->tCK);
earliestTimeToStart = std::max(earliestTimeToStart,
lastCommandStart + memSpec->tRFCpb - 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::REFPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD - 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD - 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR - 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR - 2 * memSpec->tCK);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW - 3 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart,
last4Activates[rank].front() + memSpec->tFAW - 3 * memSpec->tCK);
}
else if (command == Command::PREPB)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
@@ -283,7 +339,8 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -317,15 +374,18 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -355,19 +415,23 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -398,7 +462,8 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW - memSpec->tCK);
earliestTimeToStart = std::max(
earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW - memSpec->tCK);
}
else if (command == Command::PDEA)
{
@@ -488,15 +553,19 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, const tlm_gener
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tRDPRE + memSpec->tRPpb));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tRDPRE + memSpec->tRPpb));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRPpb));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRPpb));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -549,8 +618,9 @@ void CheckerLPDDR4::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerLPDDR4", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerLPDDR4",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndRank[command][rank] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERLPDDR4_H
#define CHECKERLPDDR4_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecLPDDR4.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecLPDDR4.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerLPDDR4 final : public CheckerIF
{
public:
explicit CheckerLPDDR4(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecLPDDR4 *memSpec;
const MemSpecLPDDR4* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;

View File

@@ -50,10 +50,12 @@ CheckerSTTMRAM::CheckerSTTMRAM(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerSTTMRAM", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -69,7 +71,8 @@ CheckerSTTMRAM::CheckerSTTMRAM(const Configuration& config) :
tWRAPDEN = memSpec->tWL + tBURST + memSpec->tWR + memSpec->tCK;
}
sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
Bank bank = ControllerExtension::getBank(payload);
@@ -83,31 +86,39 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ?
lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ?
lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + tWRPRE - memSpec->tRTP - memSpec->tAL);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
@@ -134,19 +145,24 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSDLL);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
assert(ControllerExtension::getBurstLength(payload) == 8);
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCD - memSpec->tAL);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -154,7 +170,10 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -162,17 +181,25 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -194,11 +221,14 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + memSpec->tAL + memSpec->tRTP + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -221,7 +251,8 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PREPB)
{
@@ -231,7 +262,8 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
@@ -249,11 +281,13 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tAL + memSpec->tRTP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
@@ -271,7 +305,8 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tACTPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank];
if (lastCommandStart != scMaxTime)
@@ -291,7 +326,8 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -319,11 +355,13 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREAB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + memSpec->tPRPDEN);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank];
if (lastCommandStart != scMaxTime)
@@ -347,11 +385,14 @@ sc_time CheckerSTTMRAM::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart,
lastCommandStart + std::max(tRDPDEN, memSpec->tAL + memSpec->tRTP + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -395,8 +436,9 @@ void CheckerSTTMRAM::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerSTTMRAM", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerSTTMRAM",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndRank[command][rank] = sc_time_stamp();
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERSTTMRAM_H
#define CHECKERSTTMRAM_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecSTTMRAM.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecSTTMRAM.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerSTTMRAM final : public CheckerIF
{
public:
explicit CheckerSTTMRAM(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecSTTMRAM *memSpec;
const MemSpecSTTMRAM* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;

View File

@@ -50,10 +50,12 @@ CheckerWideIO::CheckerWideIO(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerWideIO", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last2Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -69,7 +71,8 @@ CheckerWideIO::CheckerWideIO(const Configuration& config) :
tWRAPDEN = memSpec->tWL + tBURST + memSpec->tWR; // + memSpec->tCK; ??
}
sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerWideIO::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
Bank bank = ControllerExtension::getBank(payload);
@@ -91,30 +94,42 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tBURST);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tBURST);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -122,7 +137,10 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -130,7 +148,8 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert((burstLength == 2) || (burstLength == 4));
@@ -144,7 +163,10 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -152,7 +174,10 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -160,17 +185,25 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -188,11 +221,13 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -219,7 +254,8 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR);
if (last2Activates[rank].size() >= 2)
earliestTimeToStart = std::max(earliestTimeToStart, last2Activates[rank].front() + memSpec->tTAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last2Activates[rank].front() + memSpec->tTAW);
}
else if (command == Command::PREPB)
{
@@ -273,11 +309,13 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -363,11 +401,13 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, const tlm_gener
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tBURST + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tBURST + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRP));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -416,8 +456,9 @@ void CheckerWideIO::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerWideIO", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerWideIO",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndRank[command][rank] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERWIDEIO_H
#define CHECKERWIDEIO_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecWideIO.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecWideIO.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerWideIO final : public CheckerIF
{
public:
explicit CheckerWideIO(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecWideIO *memSpec;
const MemSpecWideIO* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;

View File

@@ -50,10 +50,12 @@ CheckerWideIO2::CheckerWideIO2(const Configuration& config) :
if (memSpec == nullptr)
SC_REPORT_FATAL("CheckerWideIO2", "Wrong MemSpec chosen");
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>
(Command::numberOfCommands(), ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommandAndBank = std::vector<ControllerVector<Bank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Bank, sc_time>(memSpec->banksPerChannel, scMaxTime));
lastScheduledByCommandAndRank = std::vector<ControllerVector<Rank, sc_time>>(
Command::numberOfCommands(),
ControllerVector<Rank, sc_time>(memSpec->ranksPerChannel, scMaxTime));
lastScheduledByCommand = std::vector<sc_time>(Command::numberOfCommands(), scMaxTime);
lastCommandOnBus = scMaxTime;
last4Activates = ControllerVector<Rank, std::queue<sc_time>>(memSpec->ranksPerChannel);
@@ -70,7 +72,8 @@ CheckerWideIO2::CheckerWideIO2(const Configuration& config) :
tWRRD_R = memSpec->tWL + memSpec->tCK + tBURST + memSpec->tRTRS - memSpec->tRL;
}
sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_generic_payload& payload) const
sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command,
const tlm_generic_payload& payload) const
{
Rank rank = ControllerExtension::getRank(payload);
Bank bank = ControllerExtension::getBank(payload);
@@ -92,30 +95,42 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
if (command == Command::RDA)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tRDPRE);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE - tRDPRE);
}
lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -123,7 +138,10 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_R);
@@ -131,7 +149,8 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP);
}
else if (command == Command::WR || command == Command::WRA || command == Command::MWR || command == Command::MWRA)
else if (command == Command::WR || command == Command::WRA || command == Command::MWR ||
command == Command::MWRA)
{
unsigned burstLength = ControllerExtension::getBurstLength(payload);
assert((burstLength == 4) || (burstLength == 8));
@@ -145,7 +164,10 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank] ? lastScheduledByCommand[Command::RD] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::RD] != lastScheduledByCommandAndRank[Command::RD][rank]
? lastScheduledByCommand[Command::RD]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -153,7 +175,10 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR);
lastCommandStart = lastScheduledByCommand[Command::RDA] != lastScheduledByCommandAndRank[Command::RDA][rank] ? lastScheduledByCommand[Command::RDA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::RDA] !=
lastScheduledByCommandAndRank[Command::RDA][rank]
? lastScheduledByCommand[Command::RDA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_R);
@@ -161,17 +186,25 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank] ? lastScheduledByCommand[Command::WR] : scMaxTime;
lastCommandStart =
lastScheduledByCommand[Command::WR] != lastScheduledByCommandAndRank[Command::WR][rank]
? lastScheduledByCommand[Command::WR]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD);
lastCommandStart = lastScheduledByCommand[Command::WRA] != lastScheduledByCommandAndRank[Command::WRA][rank] ? lastScheduledByCommand[Command::WRA] : scMaxTime;
lastCommandStart = lastScheduledByCommand[Command::WRA] !=
lastScheduledByCommandAndRank[Command::WRA][rank]
? lastScheduledByCommand[Command::WRA]
: scMaxTime;
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tBURST + memSpec->tRTRS);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -189,11 +222,13 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -228,7 +263,8 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PREPB)
{
@@ -246,7 +282,8 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -276,7 +313,8 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + 2 * memSpec->tCK);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + 2 * memSpec->tCK);
lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank];
if (lastCommandStart != scMaxTime)
@@ -286,7 +324,7 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb);
}
else if(command == Command::REFAB)
else if (command == Command::REFAB)
{
lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank];
if (lastCommandStart != scMaxTime)
@@ -294,11 +332,13 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -324,7 +364,7 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR);
}
else if(command == Command::REFPB)
else if (command == Command::REFPB)
{
lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank];
if (lastCommandStart != scMaxTime)
@@ -336,11 +376,13 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tRDPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
earliestTimeToStart =
std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRPpb);
lastCommandStart = lastScheduledByCommandAndBank[Command::PREPB][bank];
if (lastCommandStart != scMaxTime)
@@ -371,7 +413,8 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR);
if (last4Activates[rank].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
earliestTimeToStart =
std::max(earliestTimeToStart, last4Activates[rank].front() + memSpec->tFAW);
}
else if (command == Command::PDEA)
{
@@ -437,11 +480,14 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, const tlm_gene
lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tRDPRE + memSpec->tRPpb));
earliestTimeToStart = std::max(
earliestTimeToStart, lastCommandStart + std::max(tRDPDEN, tRDPRE + memSpec->tRPpb));
lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank];
if (lastCommandStart != scMaxTime)
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRPpb));
earliestTimeToStart =
std::max(earliestTimeToStart,
lastCommandStart + std::max(tWRAPDEN, tWRPRE + memSpec->tRPpb));
lastCommandStart = lastScheduledByCommandAndRank[Command::PREPB][rank];
if (lastCommandStart != scMaxTime)
@@ -494,8 +540,9 @@ void CheckerWideIO2::insert(Command command, const tlm_generic_payload& payload)
else if (command == Command::MWRA)
command = Command::WRA;
PRINTDEBUGMESSAGE("CheckerWideIO2", "Changing state on bank " + std::to_string(static_cast<std::size_t>(bank))
+ " command is " + command.toString());
PRINTDEBUGMESSAGE("CheckerWideIO2",
"Changing state on bank " + std::to_string(static_cast<std::size_t>(bank)) +
" command is " + command.toString());
lastScheduledByCommandAndBank[command][bank] = sc_time_stamp();
lastScheduledByCommandAndRank[command][rank] = sc_time_stamp();

View File

@@ -35,9 +35,9 @@
#ifndef CHECKERWIDEIO2_H
#define CHECKERWIDEIO2_H
#include "DRAMSys/controller/checker/CheckerIF.h"
#include "DRAMSys/configuration/memspec/MemSpecWideIO2.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/configuration/memspec/MemSpecWideIO2.h"
#include "DRAMSys/controller/checker/CheckerIF.h"
#include <queue>
#include <vector>
@@ -49,11 +49,13 @@ class CheckerWideIO2 final : public CheckerIF
{
public:
explicit CheckerWideIO2(const Configuration& config);
[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
[[nodiscard]] sc_core::sc_time
timeToSatisfyConstraints(Command command,
const tlm::tlm_generic_payload& payload) const override;
void insert(Command command, const tlm::tlm_generic_payload& payload) override;
private:
const MemSpecWideIO2 *memSpec;
const MemSpecWideIO2* memSpec;
std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;

View File

@@ -70,7 +70,7 @@ public:
DRAMSys(const sc_core::sc_module_name& name, const ::DRAMSys::Config::Configuration& configLib);
const Configuration& getConfig() const;
const AddressDecoder &getAddressDecoder() const { return *addressDecoder; }
const AddressDecoder& getAddressDecoder() const { return *addressDecoder; }
/**
* Returns true if all memory controllers are in idle state.

View File

@@ -35,11 +35,11 @@
#include <DRAMSys/config/DRAMSysConfiguration.h>
#include <nlohmann/json.hpp>
#include <fstream>
#include <iostream>
#include <nlohmann/json.hpp>
int main(int argc, char **argv)
int main(int argc, char** argv)
{
if (argc < 2)
{
@@ -52,7 +52,6 @@ int main(int argc, char **argv)
auto configuration = DRAMSys::Config::from_path(pathToJson, resourceDirectory);
nlohmann::json json;
json["simulation"] = configuration;

View File

@@ -46,12 +46,12 @@ using namespace DRAMSys::Config;
class ConfigurationTest : public ::testing::Test
{
protected:
ConfigurationTest()
: memSpec(createMemSpec()),
tracePlayer(createTracePlayer()),
traceGeneratorOneState(createTraceGeneratorOneState()),
traceGeneratorMultipleStates(createTraceGeneratorMultipleStates()),
traceHammer(createTraceHammer())
ConfigurationTest() :
memSpec(createMemSpec()),
tracePlayer(createTracePlayer()),
traceGeneratorOneState(createTraceGeneratorOneState()),
traceGeneratorMultipleStates(createTraceGeneratorMultipleStates()),
traceHammer(createTraceHammer())
{
}
@@ -118,38 +118,33 @@ protected:
DRAMSys::Config::TrafficGenerator traceGeneratorOneState;
DRAMSys::Config::TrafficGeneratorStateMachine traceGeneratorMultipleStates;
DRAMSys::Config::RowHammer traceHammer;
std::vector<DRAMSys::Config::Initiator> traceSetup{{tracePlayer, traceGeneratorOneState, traceGeneratorMultipleStates, traceHammer}};
std::vector<DRAMSys::Config::Initiator> traceSetup{
{tracePlayer, traceGeneratorOneState, traceGeneratorMultipleStates, traceHammer}};
DRAMSys::Config::Configuration configuration{
addressMapping,
mcConfig,
memSpec,
simConfig,
"std::string_simulationId",
traceSetup
};
addressMapping, mcConfig, memSpec, simConfig, "std::string_simulationId", traceSetup};
};
DRAMSys::Config::MemSpec ConfigurationTest::createMemSpec()
{
MemArchitectureSpecType memArchitectureSpec{{{"burstLength", 16},
{"dataRate", 2},
{"nbrOfBankGroups", 8},
{"nbrOfBanks", 16},
{"nbrOfColumns", 2048},
{"nbrOfRanks", 1},
{"nbrOfDIMMRanks", 1},
{"nbrOfPhysicalRanks", 1},
{"nbrOfLogicalRanks", 1},
{"nbrOfRows", 65536},
{"width", 4},
{"nbrOfDevices", 8},
{"nbrOfChannels", 2},
{"cmdMode", 1},
{"refMode", 1},
{"RAAIMT", 32},
{"RAAMMT", 96},
{"RAADEC", 1}}};
{"dataRate", 2},
{"nbrOfBankGroups", 8},
{"nbrOfBanks", 16},
{"nbrOfColumns", 2048},
{"nbrOfRanks", 1},
{"nbrOfDIMMRanks", 1},
{"nbrOfPhysicalRanks", 1},
{"nbrOfLogicalRanks", 1},
{"nbrOfRows", 65536},
{"width", 4},
{"nbrOfDevices", 8},
{"nbrOfChannels", 2},
{"cmdMode", 1},
{"refMode", 1},
{"RAAIMT", 32},
{"RAAMMT", 96},
{"RAADEC", 1}}};
MemTimingSpecType memTimingSpec{{{
{"RCD", 22}, {"PPD", 2}, {"RP", 22}, {"RAS", 52},
@@ -195,7 +190,8 @@ DRAMSys::Config::TrafficGenerator ConfigurationTest::createTraceGeneratorOneStat
return gen;
}
DRAMSys::Config::TrafficGeneratorStateMachine ConfigurationTest::createTraceGeneratorMultipleStates()
DRAMSys::Config::TrafficGeneratorStateMachine
ConfigurationTest::createTraceGeneratorMultipleStates()
{
DRAMSys::Config::TrafficGeneratorStateMachine gen;

View File

@@ -109,7 +109,7 @@ TEST_F(AddressDecoderFixture, DeEncoding)
std::uint64_t(0x2FFA'1231),
std::uint64_t(0x0001'FFFF)};
for (auto address: testAddresses)
for (auto address : testAddresses)
{
DRAMSys::DecodedAddress decodedAddress = addressDecoder.decodeAddress(address);
uint64_t encodedAddress = addressDecoder.encodeAddress(decodedAddress);

View File

@@ -47,9 +47,9 @@ public:
class BTransportNoStorage : public SystemCTest
{
protected:
BTransportNoStorage()
: no_storage_config(DRAMSys::Config::from_path("b_transport/configs/no_storage.json")),
dramSysNoStorage("NoStorageDRAMSys", no_storage_config)
BTransportNoStorage() :
no_storage_config(DRAMSys::Config::from_path("b_transport/configs/no_storage.json")),
dramSysNoStorage("NoStorageDRAMSys", no_storage_config)
{
}
@@ -60,9 +60,9 @@ protected:
class BTransportStorage : public SystemCTest
{
protected:
BTransportStorage()
: storage_config(DRAMSys::Config::from_path("b_transport/configs/storage.json")),
dramSysStorage("StorageDRAMSys", storage_config)
BTransportStorage() :
storage_config(DRAMSys::Config::from_path("b_transport/configs/storage.json")),
dramSysStorage("StorageDRAMSys", storage_config)
{
}
@@ -74,10 +74,11 @@ struct BlockingInitiator : sc_core::sc_module
{
tlm_utils::simple_initiator_socket<BlockingInitiator> iSocket;
static constexpr std::array<uint64_t, 8> TEST_DATA = {0xDEADBEEF};
DRAMSys::DRAMSys const &dramSys;
DRAMSys::DRAMSys const& dramSys;
BlockingInitiator(sc_core::sc_module_name const &name, DRAMSys::DRAMSys const &dramSys)
: sc_core::sc_module(name), dramSys(dramSys)
BlockingInitiator(sc_core::sc_module_name const& name, DRAMSys::DRAMSys const& dramSys) :
sc_core::sc_module(name),
dramSys(dramSys)
{
SC_THREAD(readAccess);
SC_THREAD(writeAccess);
@@ -100,7 +101,7 @@ struct BlockingInitiator : sc_core::sc_module
tlm::tlm_generic_payload payload;
payload.set_command(tlm::TLM_WRITE_COMMAND);
payload.set_data_length(64);
payload.set_data_ptr(reinterpret_cast<unsigned char *>(&data));
payload.set_data_ptr(reinterpret_cast<unsigned char*>(&data));
sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
iSocket->b_transport(payload, delay);
@@ -136,7 +137,7 @@ TEST_F(BTransportStorage, DataWritten)
tlm::tlm_generic_payload payload;
payload.set_command(tlm::TLM_READ_COMMAND);
payload.set_data_length(64);
payload.set_data_ptr(reinterpret_cast<unsigned char *>(&data));
payload.set_data_ptr(reinterpret_cast<unsigned char*>(&data));
initiator.iSocket->transport_dbg(payload);
EXPECT_EQ(data, BlockingInitiator::TEST_DATA);
@@ -149,7 +150,7 @@ TEST_F(BTransportNoStorage, Warning)
// Redirect stdout to buffer
std::stringstream buffer;
std::streambuf *sbuf = std::cout.rdbuf();
std::streambuf* sbuf = std::cout.rdbuf();
std::cout.rdbuf(buffer.rdbuf());
sc_core::sc_start(sc_core::sc_time(1, sc_core::SC_US));

View File

@@ -33,11 +33,11 @@
* Lukas Steiner
*/
#include "Testfile.h"
#include <gtest/gtest.h>
#include <systemc>
#include "Testfile.h"
int sc_main(int argc, char **argv)
int sc_main(int argc, char** argv)
{
testing::InitGoogleTest(&argc, argv);
return RUN_ALL_TESTS();

View File

@@ -1,16 +1,11 @@
#include <gtest/gtest.h>
class MiscTest : public ::testing::Test {
protected:
virtual void SetUp()
{
}
virtual void TearDown()
{
}
};
TEST_F(MiscTest, Test)
class MiscTest : public ::testing::Test
{
protected:
virtual void SetUp() {}
virtual void TearDown() {}
};
TEST_F(MiscTest, Test){};

View File

@@ -2,8 +2,8 @@
#include <DRAMSys/common/utils.h>
using sc_core::sc_time;
using sc_core::SC_NS;
using sc_core::sc_time;
using sc_core::SC_US;
TEST(AlignAtNext, FullCycle)

View File

@@ -43,11 +43,11 @@
#include <tlm>
#include <utility>
ListInitiator::ListInitiator(const sc_core::sc_module_name &name, MemoryManager &memoryManager)
: sc_core::sc_module(name),
iSocket("iSocket"),
peq(this, &ListInitiator::peqCallback),
memoryManager(memoryManager)
ListInitiator::ListInitiator(const sc_core::sc_module_name& name, MemoryManager& memoryManager) :
sc_core::sc_module(name),
iSocket("iSocket"),
peq(this, &ListInitiator::peqCallback),
memoryManager(memoryManager)
{
iSocket.register_nb_transport_bw(this, &ListInitiator::nb_transport_bw);
SC_THREAD(process);
@@ -55,7 +55,7 @@ ListInitiator::ListInitiator(const sc_core::sc_module_name &name, MemoryManager
void ListInitiator::process()
{
for (auto &testTransactionData : testTransactionList)
for (auto& testTransactionData : testTransactionList)
{
wait(testTransactionData.startTime - sc_core::sc_time_stamp());
@@ -64,10 +64,10 @@ void ListInitiator::process()
? tlm::TLM_WRITE_COMMAND
: tlm::TLM_READ_COMMAND;
auto &trans = memoryManager.allocate(testTransactionData.dataLength);
auto& trans = memoryManager.allocate(testTransactionData.dataLength);
trans.acquire();
TestExtension *ext = new TestExtension(testTransactionData);
TestExtension* ext = new TestExtension(testTransactionData);
trans.set_auto_extension(ext);
trans.set_command(command);
@@ -79,7 +79,8 @@ void ListInitiator::process()
trans.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
if (trans.is_write())
std::memcpy(trans.get_data_ptr(), &testTransactionData.data, testTransactionData.dataLength);
std::memcpy(
trans.get_data_ptr(), &testTransactionData.data, testTransactionData.dataLength);
if (requestInProgress != nullptr)
{
@@ -113,15 +114,15 @@ void ListInitiator::process()
}
}
tlm::tlm_sync_enum ListInitiator::nb_transport_bw(tlm::tlm_generic_payload &trans,
tlm::tlm_phase &phase,
sc_core::sc_time &delay)
tlm::tlm_sync_enum ListInitiator::nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
peq.notify(trans, phase, delay);
return tlm::TLM_ACCEPTED;
}
void ListInitiator::peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
void ListInitiator::peqCallback(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase)
{
if (phase == tlm::END_REQ || (&trans == requestInProgress && phase == tlm::BEGIN_RESP))
{
@@ -145,7 +146,7 @@ void ListInitiator::peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_
}
}
void ListInitiator::checkTransaction(tlm::tlm_generic_payload &trans)
void ListInitiator::checkTransaction(tlm::tlm_generic_payload& trans)
{
if (trans.is_response_error())
{
@@ -157,15 +158,15 @@ void ListInitiator::checkTransaction(tlm::tlm_generic_payload &trans)
uint64_t transData{};
if (trans.get_data_length() == 1)
transData = *reinterpret_cast<uint8_t *>(trans.get_data_ptr());
transData = *reinterpret_cast<uint8_t*>(trans.get_data_ptr());
else if (trans.get_data_length() == 2)
transData = *reinterpret_cast<uint16_t *>(trans.get_data_ptr());
transData = *reinterpret_cast<uint16_t*>(trans.get_data_ptr());
else if (trans.get_data_length() == 4)
transData = *reinterpret_cast<uint32_t *>(trans.get_data_ptr());
transData = *reinterpret_cast<uint32_t*>(trans.get_data_ptr());
else if (trans.get_data_length() == 8)
transData = *reinterpret_cast<uint64_t *>(trans.get_data_ptr());
transData = *reinterpret_cast<uint64_t*>(trans.get_data_ptr());
TestExtension *ext = nullptr;
TestExtension* ext = nullptr;
trans.get_extension(ext);
TestTransactionData data = ext->getTestData();

View File

@@ -44,7 +44,7 @@ public:
tlm_utils::simple_initiator_socket<ListInitiator> iSocket;
SC_HAS_PROCESS(ListInitiator);
ListInitiator(const sc_core::sc_module_name &name, MemoryManager &memoryManager);
ListInitiator(const sc_core::sc_module_name& name, MemoryManager& memoryManager);
struct TestTransactionData
{
@@ -62,9 +62,11 @@ public:
uint64_t data;
};
void appendTestTransactionList(const std::vector<TestTransactionData> &testTransactionList)
void appendTestTransactionList(const std::vector<TestTransactionData>& testTransactionList)
{
std::copy(testTransactionList.cbegin(), testTransactionList.cend(), std::back_inserter(this->testTransactionList));
std::copy(testTransactionList.cbegin(),
testTransactionList.cend(),
std::back_inserter(this->testTransactionList));
}
private:
@@ -73,11 +75,11 @@ private:
public:
TestExtension(TestTransactionData data) : data(std::move(data)) {}
tlm_extension_base *clone() const { return new TestExtension(data); }
tlm_extension_base* clone() const { return new TestExtension(data); }
void copy_from(const tlm_extension_base &ext)
void copy_from(const tlm_extension_base& ext)
{
const TestExtension &cpyFrom = static_cast<const TestExtension &>(ext);
const TestExtension& cpyFrom = static_cast<const TestExtension&>(ext);
data = cpyFrom.getTestData();
}
@@ -89,16 +91,16 @@ private:
void process();
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &trans,
tlm::tlm_phase &phase,
sc_core::sc_time &delay);
void peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase);
void checkTransaction(tlm::tlm_generic_payload &trans);
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay);
void peqCallback(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase);
void checkTransaction(tlm::tlm_generic_payload& trans);
std::vector<TestTransactionData> testTransactionList;
sc_core::sc_event endRequest;
tlm_utils::peq_with_cb_and_phase<ListInitiator> peq;
tlm::tlm_generic_payload *requestInProgress = nullptr;
MemoryManager &memoryManager;
tlm::tlm_generic_payload* requestInProgress = nullptr;
MemoryManager& memoryManager;
};

View File

@@ -42,16 +42,16 @@
DECLARE_EXTENDED_PHASE(INTERNAL);
TargetMemory::TargetMemory(const sc_core::sc_module_name &name,
TargetMemory::TargetMemory(const sc_core::sc_module_name& name,
sc_core::sc_time acceptDelay,
sc_core::sc_time memoryLatency,
std::size_t bufferSize)
: sc_core::sc_module(name),
tSocket("tSocket"),
bufferSize(bufferSize),
acceptDelay(acceptDelay),
memoryLatency(memoryLatency),
peq(this, &TargetMemory::peqCallback)
std::size_t bufferSize) :
sc_core::sc_module(name),
tSocket("tSocket"),
bufferSize(bufferSize),
acceptDelay(acceptDelay),
memoryLatency(memoryLatency),
peq(this, &TargetMemory::peqCallback)
{
tSocket.register_nb_transport_fw(this, &TargetMemory::nb_transport_fw);
@@ -59,9 +59,9 @@ TargetMemory::TargetMemory(const sc_core::sc_module_name &name,
std::fill(memory.begin(), memory.end(), 0);
}
tlm::tlm_sync_enum TargetMemory::nb_transport_fw(tlm::tlm_generic_payload &trans,
tlm::tlm_phase &phase,
sc_core::sc_time &delay)
tlm::tlm_sync_enum TargetMemory::nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
peq.notify(trans, phase, delay);
return tlm::TLM_ACCEPTED;
@@ -86,7 +86,7 @@ void TargetMemory::printBuffer(int max, int n)
std::cout.flush();
}
void TargetMemory::peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
void TargetMemory::peqCallback(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase)
{
sc_core::sc_time delay;
@@ -116,7 +116,7 @@ void TargetMemory::peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_p
responseInProgress = false;
if (!responseQueue.empty())
{
tlm::tlm_generic_payload *next = responseQueue.front();
tlm::tlm_generic_payload* next = responseQueue.front();
responseQueue.pop();
sendResponse(*next);
}
@@ -146,7 +146,7 @@ void TargetMemory::peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_p
}
}
void TargetMemory::sendEndRequest(tlm::tlm_generic_payload &trans)
void TargetMemory::sendEndRequest(tlm::tlm_generic_payload& trans)
{
tlm::tlm_phase bw_phase;
sc_core::sc_time delay;
@@ -165,7 +165,7 @@ void TargetMemory::sendEndRequest(tlm::tlm_generic_payload &trans)
printBuffer(bufferSize, currentTransactions);
}
void TargetMemory::sendResponse(tlm::tlm_generic_payload &trans)
void TargetMemory::sendResponse(tlm::tlm_generic_payload& trans)
{
sc_assert(responseInProgress == false);
@@ -186,13 +186,13 @@ void TargetMemory::sendResponse(tlm::tlm_generic_payload &trans)
trans.release();
}
void TargetMemory::executeTransaction(tlm::tlm_generic_payload &trans)
void TargetMemory::executeTransaction(tlm::tlm_generic_payload& trans)
{
tlm::tlm_command command = trans.get_command();
sc_dt::uint64 address = trans.get_address();
unsigned char *data_ptr = trans.get_data_ptr();
unsigned char* data_ptr = trans.get_data_ptr();
unsigned int data_length = trans.get_data_length();
unsigned char *byte_enable_ptr = trans.get_byte_enable_ptr();
unsigned char* byte_enable_ptr = trans.get_byte_enable_ptr();
unsigned int streaming_width = trans.get_streaming_width();
if (address >= SIZE - 64)
@@ -225,7 +225,7 @@ void TargetMemory::executeTransaction(tlm::tlm_generic_payload &trans)
<< (command == tlm::TLM_WRITE_COMMAND ? "Exec. Write " : "Exec. Read ")
<< "Addr = " << std::setfill('0') << std::setw(8) << std::dec << address << " Data = "
<< "0x" << std::setfill('0') << std::setw(8) << std::hex
<< *reinterpret_cast<int *>(data_ptr) << "\033[0m" << std::endl;
<< *reinterpret_cast<int*>(data_ptr) << "\033[0m" << std::endl;
trans.set_response_status(tlm::TLM_OK_RESPONSE);
}

View File

@@ -47,21 +47,21 @@ class TargetMemory : public sc_core::sc_module
public:
tlm_utils::simple_target_socket<TargetMemory> tSocket;
SC_HAS_PROCESS(TargetMemory);
TargetMemory(const sc_core::sc_module_name &name,
TargetMemory(const sc_core::sc_module_name& name,
sc_core::sc_time acceptDelay,
sc_core::sc_time memoryLatency,
std::size_t bufferSize = DEFAULT_BUFFER_SIZE);
private:
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &trans,
tlm::tlm_phase &phase,
sc_core::sc_time &delay);
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay);
void peqCallback(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase);
void peqCallback(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase);
void sendEndRequest(tlm::tlm_generic_payload &trans);
void sendResponse(tlm::tlm_generic_payload &trans);
void executeTransaction(tlm::tlm_generic_payload &trans);
void sendEndRequest(tlm::tlm_generic_payload& trans);
void sendResponse(tlm::tlm_generic_payload& trans);
void executeTransaction(tlm::tlm_generic_payload& trans);
void printBuffer(int max, int n);
@@ -76,8 +76,8 @@ private:
unsigned int currentTransactions = 0;
bool responseInProgress = false;
tlm::tlm_generic_payload *endRequestPending = nullptr;
tlm::tlm_generic_payload* endRequestPending = nullptr;
tlm_utils::peq_with_cb_and_phase<TargetMemory> peq;
std::queue<tlm::tlm_generic_payload *> responseQueue;
std::queue<tlm::tlm_generic_payload*> responseQueue;
};

View File

@@ -50,23 +50,23 @@ public:
class DirectMappedCache : public SystemCTest
{
protected:
DirectMappedCache()
: memoryManager(true),
initiator("ListInitiator", memoryManager),
target("TargetMemory",
sc_core::sc_time(1, sc_core::SC_NS),
sc_core::sc_time(10, sc_core::SC_NS)),
cache("Cache",
32768,
1,
32,
8,
8,
8,
true,
sc_core::sc_time(1, sc_core::SC_NS),
5,
memoryManager)
DirectMappedCache() :
memoryManager(true),
initiator("ListInitiator", memoryManager),
target("TargetMemory",
sc_core::sc_time(1, sc_core::SC_NS),
sc_core::sc_time(10, sc_core::SC_NS)),
cache("Cache",
32768,
1,
32,
8,
8,
8,
true,
sc_core::sc_time(1, sc_core::SC_NS),
5,
memoryManager)
{
initiator.iSocket.bind(cache.tSocket);
cache.iSocket.bind(target.tSocket);

View File

@@ -36,7 +36,7 @@
#include <gtest/gtest.h>
#include <systemc>
int sc_main(int argc, char **argv)
int sc_main(int argc, char** argv)
{
testing::InitGoogleTest(&argc, argv);
return RUN_ALL_TESTS();

View File

@@ -2,15 +2,12 @@
#include <DRAMSys/util/json.h>
class JsonTest : public ::testing::Test {
class JsonTest : public ::testing::Test
{
protected:
virtual void SetUp()
{
}
virtual void SetUp() {}
virtual void TearDown()
{
}
virtual void TearDown() {}
};
TEST_F(JsonTest, Test)