Fix various compile warnings
This commit is contained in:
@@ -159,17 +159,15 @@ Dram::nb_transport_fw(tlm_generic_payload& trans, tlm_phase& phase, [[maybe_unus
|
|||||||
|
|
||||||
if (DRAMPower)
|
if (DRAMPower)
|
||||||
{
|
{
|
||||||
std::size_t channel = static_cast<std::size_t>(ArbiterExtension::getChannel(trans));
|
auto rank = static_cast<std::size_t>(
|
||||||
std::size_t rank = static_cast<std::size_t>(
|
|
||||||
ControllerExtension::getRank(trans)); // relaitve to the channel
|
ControllerExtension::getRank(trans)); // relaitve to the channel
|
||||||
std::size_t bank_group_abs = static_cast<std::size_t>(
|
auto bank_group_abs = static_cast<std::size_t>(
|
||||||
ControllerExtension::getBankGroup(trans)); // relative to the channel
|
ControllerExtension::getBankGroup(trans)); // relative to the channel
|
||||||
std::size_t bank_group =
|
auto bank_group = bank_group_abs - (rank * memSpec.groupsPerRank); // relative to the rank
|
||||||
bank_group_abs - rank * memSpec.groupsPerRank; // relative to the rank
|
auto bank = static_cast<std::size_t>(ControllerExtension::getBank(trans)) -
|
||||||
std::size_t bank = static_cast<std::size_t>(ControllerExtension::getBank(trans)) -
|
(bank_group_abs * memSpec.banksPerGroup); // relative to the bank_group
|
||||||
bank_group_abs * memSpec.banksPerGroup; // relative to the bank_group
|
auto row = static_cast<std::size_t>(ControllerExtension::getRow(trans));
|
||||||
std::size_t row = static_cast<std::size_t>(ControllerExtension::getRow(trans));
|
auto column = static_cast<std::size_t>(ControllerExtension::getColumn(trans));
|
||||||
std::size_t column = static_cast<std::size_t>(ControllerExtension::getColumn(trans));
|
|
||||||
uint64_t cycle = std::lround((sc_time_stamp() + delay) / memSpec.tCK);
|
uint64_t cycle = std::lround((sc_time_stamp() + delay) / memSpec.tCK);
|
||||||
|
|
||||||
// DRAMPower:
|
// DRAMPower:
|
||||||
|
|||||||
@@ -86,14 +86,8 @@ Simulator::instantiateInitiator(const DRAMSys::Config::Initiator& initiator)
|
|||||||
uint64_t memorySize = dramSys->getMemSpec().getSimMemSizeInBytes();
|
uint64_t memorySize = dramSys->getMemSpec().getSimMemSizeInBytes();
|
||||||
sc_core::sc_time interfaceClk = dramSys->getMemSpec().tCK;
|
sc_core::sc_time interfaceClk = dramSys->getMemSpec().tCK;
|
||||||
|
|
||||||
// To support non-power-of-two values for the burst length and width, we round the BL
|
|
||||||
// down to the smaller-or-equal power-of-two.
|
|
||||||
unsigned int burstBits = std::log2(dramSys->getMemSpec().defaultBurstLength);
|
|
||||||
unsigned int widthBits = std::log2(dramSys->getMemSpec().dataBusWidth);
|
|
||||||
unsigned int defaultDataLength = std::pow(2, burstBits) * std::pow(2, widthBits) / 8;
|
|
||||||
|
|
||||||
return std::visit(
|
return std::visit(
|
||||||
[=](auto&& config) -> std::unique_ptr<RequestIssuer>
|
[this, memorySize, interfaceClk](auto&& config) -> std::unique_ptr<RequestIssuer>
|
||||||
{
|
{
|
||||||
using T = std::decay_t<decltype(config)>;
|
using T = std::decay_t<decltype(config)>;
|
||||||
if constexpr (std::is_same_v<T, DRAMSys::Config::TrafficGenerator> ||
|
if constexpr (std::is_same_v<T, DRAMSys::Config::TrafficGenerator> ||
|
||||||
|
|||||||
@@ -49,7 +49,7 @@ TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGeneratorStateMachine
|
|||||||
for (auto const& state : config.states)
|
for (auto const& state : config.states)
|
||||||
{
|
{
|
||||||
std::visit(
|
std::visit(
|
||||||
[=, &config](auto&& arg)
|
[this, memorySize, dataLength, dataAlignment, &config](auto&& arg)
|
||||||
{
|
{
|
||||||
using DRAMSys::Config::TrafficGeneratorActiveState;
|
using DRAMSys::Config::TrafficGeneratorActiveState;
|
||||||
using DRAMSys::Config::TrafficGeneratorIdleState;
|
using DRAMSys::Config::TrafficGeneratorIdleState;
|
||||||
@@ -132,7 +132,7 @@ TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGenerator const& conf
|
|||||||
Request TrafficGenerator::nextRequest()
|
Request TrafficGenerator::nextRequest()
|
||||||
{
|
{
|
||||||
if (currentState == STOP_STATE)
|
if (currentState == STOP_STATE)
|
||||||
return Request{Request::Command::Stop};
|
return Request{Request::Command::Stop, 0, 0, {}};
|
||||||
|
|
||||||
Request request = producers[currentState]->nextRequest();
|
Request request = producers[currentState]->nextRequest();
|
||||||
requestsInState++;
|
requestsInState++;
|
||||||
|
|||||||
@@ -46,7 +46,7 @@ RowHammer::RowHammer(DRAMSys::Config::RowHammer const& config) :
|
|||||||
Request RowHammer::nextRequest()
|
Request RowHammer::nextRequest()
|
||||||
{
|
{
|
||||||
if (generatedRequests >= numberOfRequests)
|
if (generatedRequests >= numberOfRequests)
|
||||||
return Request{Request::Command::Stop};
|
return Request{Request::Command::Stop, 0, 0, {}};
|
||||||
|
|
||||||
generatedRequests++;
|
generatedRequests++;
|
||||||
|
|
||||||
|
|||||||
@@ -108,7 +108,7 @@ Request StlPlayer::nextRequest()
|
|||||||
if (!currentLineContent.has_value())
|
if (!currentLineContent.has_value())
|
||||||
{
|
{
|
||||||
// The file is read in completely. Nothing more to do.
|
// The file is read in completely. Nothing more to do.
|
||||||
return Request{Request::Command::Stop};
|
return Request{Request::Command::Stop, 0, 0, {}};
|
||||||
}
|
}
|
||||||
|
|
||||||
auto command = currentLineContent->command == LineContent::Command::Read
|
auto command = currentLineContent->command == LineContent::Command::Read
|
||||||
|
|||||||
@@ -93,8 +93,9 @@ TEST_F(AddressDecoderFixture, DecodingNP2Failure)
|
|||||||
addressDecoder.plausibilityCheck(*memSpec);
|
addressDecoder.plausibilityCheck(*memSpec);
|
||||||
|
|
||||||
uint64_t address = 0x3A59'1478;
|
uint64_t address = 0x3A59'1478;
|
||||||
addressDecoder.decodeAddress(address);
|
std::ignore = addressDecoder.decodeAddress(address);
|
||||||
// EXPECT_EQ(trans.get_response_status(), tlm::TLM_ADDRESS_ERROR_RESPONSE);
|
// EXPECT_EQ(trans.get_response_status(), tlm::TLM_ADDRESS_ERROR_RESPONSE);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
TEST_F(AddressDecoderFixture, DecodingNP2Success)
|
TEST_F(AddressDecoderFixture, DecodingNP2Success)
|
||||||
|
|||||||
Reference in New Issue
Block a user