derek/DRAMSys
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

New address mappings for DDR3

Browse Source
This commit is contained in:
Éder F. Zulian
2016-05-18 15:12:37 +02:00
parent 3a417e4e7c
commit 7722471b5a
2 changed files with 16 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_x16_brc.xml Normal file
View File

@@ -0,0 +1,8 @@
<addressmapping>
<channel from="128" to="128" /> <!-- only one channel -->
<bank from="26" to="28" />
<row from="13" to="25" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>

8
DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_x16_rbc.xml Normal file
View File

@@ -0,0 +1,8 @@
<addressmapping>
<channel from="128" to="128" /> <!-- only one channel -->
<row from="16" to="28" />
<bank from="13" to="15" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>