Added PCT related files

This commit is contained in:
Matthias Jung
2017-02-21 23:04:51 +01:00
parent d7ef8a5d3a
commit 72d77f4587
7 changed files with 172 additions and 6 deletions

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@@ -19,4 +19,3 @@ SUBDIRS += analyzer/traceAnalyzer.pro
# Additional Files:
# tests folder (DRAMSys/tests)
include(tests/tests.pri)

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@@ -0,0 +1,8 @@
#!/usr/bin/sh
JOBS=$(nproc --all)
mkdir lib
cd lib
DRAMSYS_PCT=true qmake ../../simulator/library.pro
DRAMSYS_PCT=true make -j$JOBS

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@@ -0,0 +1,78 @@
#!/usr/bin/tclsh
#
# Copyright (c) 2017, University of Kaiserslautern
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors:
# Matthias Jung
# Setup PCT:
::pct::open_library $env(COWAREHOME)/pc/TLM2_PROTOCOLS/ConvergenSC/TLM2_PROTOCOLS.xml
::pct::clear_systemc_defines
::pct::clear_systemc_include_path
# Import Dummy Module:
::pct::set_import_protocol_generation_flag true
::pct::set_update_existing_encaps_flag true
::pct::set_dynamic_port_arrays_flag true
::pct::set_import_scml_properties_flag true
::pct::load_all_modules "--set-category" "dummy.h"
::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
# Add DRAMSys Library // ../[glob -type d ../../build*]/simulator/
::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSys drampower"
::pct::set_simulation_build_project_setting Debug {Library Search Paths} [concat ../lib/ /usr/lib64/ ../../simulator/src/common/third_party/DRAMPower/src/]
::pct::set_simulation_build_project_setting Debug {Defined Symbols} SC_INCLUDE_DYNAMIC_PROCESSES=1
# Configure for dynamic linking
#::pct::set_encap_config_setting Project:DRAMSys/DRAMSys FromSource build dynamic_library true
#::pct::add_encap_config_setting Project:DRAMSys/DRAMSys FromSource package dynamic_library_search_path [concat [glob -type d ../../build*]/simulator/] *
# Disable Fast Linking and Caching
::pct::set_simulation_build_project_setting Debug {Cache Objects} false
::pct::set_simulation_build_project_setting Debug {Fast Linking} false
# Configure DDR3 Example:
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../simulator/resources/
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../simulator/resources/simulations/ddr3-example.xml
# Build Rest of the Example system:
::pct::open_library "GFRBM"
::pct::create_instance GFRBM:GFRBM_TLM2 /HARDWARE i_GFRBM_TLM2 GFRBM_TLM2 GFRBM_TLM2()
::pct::create_connection C /HARDWARE /HARDWARE/i_GFRBM_TLM2/INIT_SOCKET /HARDWARE/i_DRAMSys/tSocket
::pct::open_library "GenericIPlib"
::pct::create_instance GenericIPlib:ClockGenerator /HARDWARE i_ClockGenerator GIPL_CLK {GIPL_CLK(period, period_unit, duty_cycle, start_time, start_time_unit, posedge_first)}
::pct::create_connection C_1 /HARDWARE /HARDWARE/i_ClockGenerator/CLK /HARDWARE/i_GFRBM_TLM2/CLK
# Configure GFRBM:
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Scml Properties} InputFile ../../simulator/resources/traces/ddr3_example.stl
# Design:
::pct::set_background_color_rgb /HARDWARE/i_DRAMSys 113 200 55 255

65
DRAMSys/pct/dummy.h Normal file
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@@ -0,0 +1,65 @@
/*
* Copyright (c) 2017, University of Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Matthias Jung
*/
#ifndef DRAMSYS_H_
#define DRAMSYS_H_
#include <string>
#include <systemc>
#include <tlm>
#include <tlm_utils/multi_passthrough_target_socket.h>
/**
* This is just a dummy module. Platform Architect is not able to parse the
* real module...
*/
class DRAMSys: public sc_module
{
public:
tlm_utils::multi_passthrough_target_socket<DRAMSys> tSocket;
sc_event terminateSimulation;
SC_HAS_PROCESS(DRAMSys);
DRAMSys(sc_module_name name,
string simulationToRun,
string pathToResources);
};
#endif /* SIMULATIONMANAGER_H_ */

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@@ -12,6 +12,20 @@ systemc_home = $$(SYSTEMC_HOME)
isEmpty(systemc_home) {
systemc_home = /opt/systemc
}
# Check if PCT's SystemC should be used?
dramsys_pct = $$(DRAMSYS_PCT)
isEmpty(dramsys_pct) {
dramsys_pct = false
}
$$eval(dramsys_pct) {
# PCT:
message(PCT Simulation Feature Enabled)
systemc_home = /software/Synopsys_CoWare/K-2015.12-SP1/SLS/linux/common
INCLUDEPATH += $${systemc_home}/include/tlm
}
message(SystemC home is $${systemc_home})
systemc_target_arch = $$(SYSTEMC_TARGET_ARCH)
@@ -20,10 +34,8 @@ isEmpty(systemc_target_arch) {
}
message(SystemC target architecture is $${systemc_target_arch})
QMAKE_RPATHDIR += $${systemc_home}/lib-$${systemc_target_arch}
message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
INCLUDEPATH += $${systemc_home}/include
INCLUDEPATH += src/common/third_party/DRAMPower/src
INCLUDEPATH += src/common/third_party/DRAMPower/src/libdrampower

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@@ -15,8 +15,12 @@ systemc_target_arch = $$(SYSTEMC_TARGET_ARCH)
isEmpty(systemc_target_arch) {
systemc_target_arch = linux64
}
message(SystemC target architecture is $${systemc_target_arch})
#QMAKE_RPATHDIR += $${systemc_home}/lib-$${systemc_target_arch}
#message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
DEFINES += TIXML_USE_STL
DEFINES += SC_INCLUDE_DYNAMIC_PROCESSES

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@@ -41,8 +41,8 @@
#define DRAM_H_
#include <sys/mman.h>
#include <tlm.h>
#include <systemc.h>
#include <tlm>
#include <systemc>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include <tlm_utils/simple_target_socket.h>
#include <vector>