Readme file updated. Text enhanced.

This commit is contained in:
Éder Ferreira Zulian
2015-06-18 13:17:58 +02:00
parent 21ad5962aa
commit 707b7073a8

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@@ -115,6 +115,7 @@ The XML code below shows a typic configuration:
``` xml
<simulation>
<!-- Simulator configuration -->
<simconfig>
<Debug value="1"/>
<DatabaseRecording value="1"/>
@@ -123,18 +124,22 @@ The XML code below shows a typic configuration:
<NumberOfMemChannels value="1"/>
</simconfig>
<!-- Memory specifications -->
<memspecs>
<memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<!-- Address mappings -->
<addressmappings>
<addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<!-- Memory configurations -->
<memconfigs>
<memconfig src="../resources/configs/memconfigs/fifo.xml"/>
</memconfigs>
<!-- Trace setups -->
<tracesetups>
<!-- Multiple trace setups are allowed for the same simulation setup -->
<tracesetup id="fifo">
@@ -163,28 +168,29 @@ configuration structure.
#### Simulation Setups
Every possible combination of **memory specification**, **address mapping**
and **memory configuration** corresponds to a **simulation setup**.
Every possible combination of memory specification, address mapping and memory configuration corresponds to a **simulation setup**.
Each of the **trace setups** listed in the configuration is added to every
simulation setup.
DRAMSys executes all the **trace setups** listed in the configuration file for
each of the simulation setups.
A **trace setup** is composed of an id string and one or more **devices**.
A single **trace setup** is composed of an id string and one or more
**devices**.
A **device** configuration consists of two configuration fields - clkMhz
(operation frequence for this device) and bl (burst length) - and a
The **device** configuration consists of two configuration fields - clkMhz
(operation frequency for this device) and bl (burst length) - and a
**trace file**.
A **trace file** is a pre-recorded file containing memory transactions. All
memory transactions have a timestamp that tells the simulator when they shall
happen, a transaction type (e.g.: read, write) and a memory address.
A **trace file** is a pre-recorded file containing memory transactions. Each
memory transaction has a timestamp that tells the simulator when it shall
happen, a transaction type (e.g. read, write) and a memory address.
A **trace player** is the **equivalent** to bus master **device**, i.e. a
device that locks a bus and generates memory transactions. The **device**
section within a **trace setup** makes it is possible to add a trace file, and
specify the operation frequence and the burst length as well, for each of the
trace players. Trace players without a corresponding device configuration will
not generate transactions.
A **trace player** is **equivalent** to a bus master **device** (i.e. a device
that locks a bus and generates memory transactions). By adding device elements
into the trace setup section one can specify the operation frequency, the
burst length and the trace file to be used by trace players.
Trace players without a corresponding device configuration do not generate
transactions.
**DRAMSys** executes all the simulation setups within the configuration file
providing **flexibility** for **exhaustive explorations.**
@@ -310,9 +316,9 @@ Below are listed the configuration sections and configuration fields.
- Trace setup id. Two files are generated by DRAMSys: an SQLite database
file (.tdb) and a text file (.txt) containing the program output. The
name of these files comes from this field.
- *clkMhz*
- *clkMhz* (unsigned int)
- Speed of the trace player
- *bl*
- *bl* (unsigned int)
- Burst length
- *trace file*
- A pre-recorded file containing memory transactions to be executed by a