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coding style

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This commit is contained in:
Éder F. Zulian
2018-07-02 07:59:22 +02:00
parent 81914bc25f
commit 6b8a123675
7 changed files with 17 additions and 15 deletions
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13
DRAMSys/library/src/controller/core/configuration/Configuration.cpp
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@@ -153,7 +153,8 @@ void Configuration::setParameter(std::string name, std::string value)
". This parameter must be between 0 and 100.").c_str());
} else {
SJFProbability = string2int(value);
} else if (name == "RequestBufferSize")
}
else if (name == "RequestBufferSize")
RequestBufferSize = string2int(value);
else if (name == "Capsize")
Capsize = string2int(value);
@@ -202,11 +203,11 @@ void Configuration::setParameter(std::string name, std::string value)
else if (name == "ControllerCoreRowGranularRefRowInc")RowInc = string2int(
value);
else if (name == "ControllerCoreRefMode") {
RefMode = string2int(value);
if (RefMode != 1 && RefMode != 2 && RefMode != 4)
SC_REPORT_FATAL("Configuration", (name + " invalid value.").c_str());
}
else if (name == "ControllerCoreRowGranularRefNumAR")NumAR = string2int(value);
RefMode = string2int(value);
if (RefMode != 1 && RefMode != 2 && RefMode != 4)
SC_REPORT_FATAL("Configuration", (name + " invalid value.").c_str());
} else if (name == "ControllerCoreRowGranularRefNumAR")NumAR = string2int(
value);
else if (name == "ControllerCoreRowGranularRefB0")RGRB0 = string2bool(value);
else if (name == "ControllerCoreRowGranularRefB1")RGRB1 = string2bool(value);
else if (name == "ControllerCoreRowGranularRefB2")RGRB2 = string2bool(value);

7
DRAMSys/library/src/controller/core/refresh/RGR.cpp
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@@ -43,7 +43,7 @@ RGR::RGR(sc_module_name, ControllerCore &ctrlcore) : ccore(ctrlcore),
timing(ctrlcore.config.memSpec.refreshTimings[ccore.getBanks()[0]])
{
auto m = ccore.config.getRefMode();
tREFIx = timing.tREFI / m;
tREFIx = timing.tREFI / m;
if (ccore.config.ControllerCoreEnableRefPostpone)
maxpostpone = ccore.config.ControllerCoreMaxPostponedARCmd * m;
if (ccore.config.ControllerCoreEnableRefPullIn)
@@ -51,7 +51,7 @@ RGR::RGR(sc_module_name, ControllerCore &ctrlcore) : ccore(ctrlcore),
#if 0
if (ccore.config.BankwiseLogic) {
for (Bank b : ccore.getBanks()) {
auto nbs = ccore.config.memSpec.NumberOfBanks;
auto nbs = ccore.config.memSpec.NumberOfBanks;
nextPlannedRefreshs[b] = b.ID() * tREFIx / nbs;
}
}
@@ -86,7 +86,8 @@ bool RGR::hasCollision(const ScheduledCommand __attribute__((unused)) &cmd)
for (unsigned b = 0; b < nbs; b++) {
if (cmd.getStart() < currentRefresh[b] && cmd.getEnd() > currentRefresh[b])
r = true;
if (cmd.getStart() < nextPlannedRefreshs[b] && cmd.getEnd() > nextPlannedRefreshs[b])
if (cmd.getStart() < nextPlannedRefreshs[b]
&& cmd.getEnd() > nextPlannedRefreshs[b])
r = true;
}
return r;

2
DRAMSys/library/src/controller/core/refresh/RGR.h
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@@ -49,7 +49,7 @@ public:
void reInitialize(Bank bank, sc_time time) override;
bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) override;
private:
sc_time tREFIx;
sc_time tREFIx;
ControllerCore &ccore;
RefreshTiming &timing;
std::map<Bank, tlm::tlm_generic_payload> rps;

4
DRAMSys/library/src/controller/core/refresh/RefreshManager.cpp
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@@ -51,7 +51,7 @@ RefreshManager::RefreshManager(sc_module_name /*name*/,
nextPlannedRefresh(SC_ZERO_TIME)
{
auto m = controllerCore.config.getRefMode();
tREFIx = timing.tREFI / m;
tREFIx = timing.tREFI / m;
if (controllerCore.config.ControllerCoreEnableRefPostpone) {
maxpostpone = controllerCore.config.ControllerCoreMaxPostponedARCmd * m;
}
@@ -140,7 +140,7 @@ void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload &payload
switch (currentState) {
case ST_REFRESH:
// Regular Refresh. It's possible to migrate from this to the flexible refresh states
// The arCmdCounter should always be equal to zero here
// The arCmdCounter should always be equal to zero here
assert(arCmdCounter == 0);
if (canPostpone) {

2
DRAMSys/library/src/controller/core/refresh/RefreshManager.h
View File

@@ -59,7 +59,7 @@ private:
ControllerCore &controllerCore;
RefreshTiming &timing;
sc_time nextPlannedRefresh;
sc_time tREFIx;
sc_time tREFIx;
std::map<Bank, tlm::tlm_generic_payload> refreshPayloads;
unsigned int maxpostpone = 0;
unsigned int maxpullin = 0;

2
DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp
View File

@@ -46,7 +46,7 @@ RefreshManagerBankwise::RefreshManagerBankwise(sc_module_name,
timing(controller.config.memSpec.refreshTimings[Bank(0)])
{
auto m = controllerCore.config.getRefMode();
tREFIx = timing.tREFI / m;
tREFIx = timing.tREFI / m;
if (controllerCore.config.ControllerCoreEnableRefPostpone)
maxpostpone = controllerCore.config.ControllerCoreMaxPostponedARCmd * m;
if (controllerCore.config.ControllerCoreEnableRefPullIn)

2
DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.h
View File

@@ -59,7 +59,7 @@ public:
private:
ControllerCore &controllerCore;
RefreshTiming &timing;
sc_time tREFIx;
sc_time tREFIx;
std::map<Bank, tlm::tlm_generic_payload> refreshPayloads;
std::map<Bank, sc_time> nextPlannedRefreshs;
unsigned int maxpostpone = 0;