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Added elastic trace description to README

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This commit is contained in:
Matthias Jung
2018-02-03 21:56:44 +01:00
parent 3df37617f4
commit 5a4398f36e
3 changed files with 48 additions and 3 deletions
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7
DRAMSys/gem5/configs/dualElasticTraceReplay.ini
View File

@@ -20,6 +20,7 @@ exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
kernel_extras=
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -84,10 +85,12 @@ numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_gating_on_idle=false
power_model=Null
profile=0
progressMsgInterval=0
progress_interval=0
pwr_gating_latency=300
simpoint_start_insts=
sizeLoadBuffer=16
sizeROB=40
@@ -369,10 +372,12 @@ numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_gating_on_idle=false
power_model=Null
profile=0
progressMsgInterval=0
progress_interval=0
pwr_gating_latency=300
simpoint_start_insts=
sizeLoadBuffer=16
sizeROB=40
@@ -656,6 +661,7 @@ p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
point_of_unification=true
power_model=Null
response_latency=2
snoop_filter=system.membus1.snoop_filter
@@ -685,6 +691,7 @@ p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
point_of_unification=true
power_model=Null
response_latency=2
snoop_filter=system.membus2.snoop_filter

4
DRAMSys/gem5/configs/singleElasticTraceReplay.ini
View File

@@ -20,6 +20,7 @@ exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
kernel_extras=
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -84,10 +85,12 @@ numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_gating_on_idle=false
power_model=Null
profile=0
progressMsgInterval=0
progress_interval=0
pwr_gating_latency=300
simpoint_start_insts=
sizeLoadBuffer=16
sizeROB=40
@@ -371,6 +374,7 @@ p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
point_of_unification=true
power_model=Null
response_latency=2
snoop_filter=system.membus.snoop_filter

40
README.md
View File

@@ -1107,8 +1107,35 @@ For further sophisticated address mappings or scenarios checkout the file DRAMSy
### DRAMSys with gem5 Elastic Traces
Some predefined configs are stored in dram.vp.system/DRAMSys/gem5/configs and the related python files are stored here: dram.vp.system/DRAMSys/gem5/examples
For understanding elastic traces and their generation, study the gem5 wiki
(http://gem5.org/TraceCPU) and the paper [13]. Some predefined configs are
stored in dram.vp.system/DRAMSys/gem5/configs and the related python files are
stored here: dram.vp.system/DRAMSys/gem5/examples
This is an example for running an elastic trace:
``` bash
./DRAMSys_gem5 /path/to/dram.vp.system/DRAMSys/library/resources/simulations/ddr3-example.xml ../../DRAMSys/gem5/configs/singleElasticTraceReplay.ini
```
Note that the address offset is usually zero for elastic traces.
If two elastic traces should be used the main.cpp must be modified:
``` c++
//#define CHOICE1
#define CHOICE2
//#define CHOICE3
```
Run the simulation with the following example:
```
./DRAMSys_gem5 /path/to/dram.vp.system/DRAMSys/library/resources/simulations/ddr3-example.xml ../../DRAMSys/gem5/configs/dualElasticTraceReplay.ini
```
For more spophisticated setups, even with l2 caches the proper ini file should be created.
If you need help please contact Matthias Jung.
## References
@@ -1150,5 +1177,12 @@ Thermal Investigations of ICs and Systems (THERMINIC'10), Barcelona, Spain,
[11] http://esl.epfl.ch/3D-ICE
[12] System Simulation with gem5 and SystemC: The Keystone for Full Interoperability
C. Menard, M. Jung, J. Castrillon, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.
[12] System Simulation with gem5 and SystemC: The Keystone for Full
Interoperability C. Menard, M. Jung, J. Castrillon, N. Wehn. IEEE International
Conference on Embedded Computer Systems Architectures Modeling and Simulation
(SAMOS), July, 2017, Samos Island, Greece.
[13] Exploring System Performance using Elastic Traces: Fast, Accurate and
Portable Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson, Matthias Jung
and Norbert Wehn, IEEE International Conference on Embedded Computer Systems
Architectures Modeling and Simulation (SAMOS), 2016, Samos Island, Greece.