Fix DDR3 regression

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Using the new tCK entry in the memspecs, there was a small power deviation in the database

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Derek Christ

2023-12-18 10:57:18 +01:00

parent 0ec6ea79ad

commit 539a525f3d

1 changed files with 2 additions and 2 deletions

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tests/tests_regression/DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb LFS

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