From 539a525f3d11568ccb7e0fe1dec9e0c4fddee1a1 Mon Sep 17 00:00:00 2001
From: Derek Christ <derek.christ@iese.fraunhofer.de>
Date: Mon, 18 Dec 2023 10:57:18 +0100
Subject: [PATCH] Fix DDR3 regression

Using the new tCK entry in the memspecs, there was a small power deviation in the database
---
 .../DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb         | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/tests_regression/DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb b/tests/tests_regression/DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb
index 10721241..e0ee5426 100644
--- a/tests/tests_regression/DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb
+++ b/tests/tests_regression/DDR3/expected/DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:b0d98d25f5d969ca88de71ed8a302ff5603ef74397659fa25559567c681340da
-size 143360
+oid sha256:2eadd8204bd90b18e7f5a12a71382f9d0cfbeaf33066961a7cb89f388d51b53c
+size 135168