@@ -190,7 +190,9 @@ HEADERS += \
|
||||
src/error/eccbaseclass.h \
|
||||
src/error/ecchamming.h \
|
||||
src/controller/scheduler/Fr_Fcfs_read_priority.h \
|
||||
src/controller/scheduler/Fr_Fcfs_grouper.h
|
||||
src/controller/scheduler/Fr_Fcfs_grouper.h \
|
||||
src/simulation/IArbiter.h \
|
||||
src/simulation/SimpleArbiter.h
|
||||
|
||||
thermalsim = $$(THERMALSIM)
|
||||
isEmpty(thermalsim) {
|
||||
|
||||
@@ -82,6 +82,26 @@ Bank DramExtension::getBank(const tlm_generic_payload &payload)
|
||||
return DramExtension::getBank(&payload);
|
||||
}
|
||||
|
||||
Channel DramExtension::getChannel(const tlm_generic_payload *payload)
|
||||
{
|
||||
return DramExtension::getExtension(payload).getChannel();
|
||||
}
|
||||
|
||||
Channel DramExtension::getChannel(const tlm_generic_payload &payload)
|
||||
{
|
||||
return DramExtension::getChannel(&payload);
|
||||
}
|
||||
|
||||
Thread DramExtension::getThread(const tlm_generic_payload *payload)
|
||||
{
|
||||
return DramExtension::getExtension(payload).getThread();
|
||||
}
|
||||
|
||||
Thread DramExtension::getThread(const tlm_generic_payload &payload)
|
||||
{
|
||||
return DramExtension::getThread(&payload);
|
||||
}
|
||||
|
||||
Row DramExtension::getRow(const tlm_generic_payload *payload)
|
||||
{
|
||||
return DramExtension::getExtension(payload).getRow();
|
||||
|
||||
@@ -177,6 +177,10 @@ public:
|
||||
// Used for convience, caller could also use getExtension(..) to access these field
|
||||
static Bank getBank(const tlm::tlm_generic_payload *payload);
|
||||
static Bank getBank(const tlm::tlm_generic_payload &payload);
|
||||
static Channel getChannel(const tlm::tlm_generic_payload *payload);
|
||||
static Channel getChannel(const tlm::tlm_generic_payload &payload);
|
||||
static Thread getThread(const tlm::tlm_generic_payload *payload);
|
||||
static Thread getThread(const tlm::tlm_generic_payload &payload);
|
||||
static Row getRow(const tlm::tlm_generic_payload *payload);
|
||||
static Row getRow(const tlm::tlm_generic_payload &payload);
|
||||
|
||||
|
||||
129
DRAMSys/library/src/simulation/IArbiter.h
Normal file
129
DRAMSys/library/src/simulation/IArbiter.h
Normal file
@@ -0,0 +1,129 @@
|
||||
/*
|
||||
* Copyright (c) 2018, University of Kaiserslautern
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
|
||||
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors:
|
||||
* Felipe S. Prado
|
||||
* Matthias Jung
|
||||
*/
|
||||
|
||||
#ifndef IARBITER_H_
|
||||
#define IARBITER_H_
|
||||
|
||||
#include <tlm.h>
|
||||
#include <systemc.h>
|
||||
#include <iostream>
|
||||
#include <vector>
|
||||
#include <queue>
|
||||
#include <tlm_utils/multi_passthrough_target_socket.h>
|
||||
#include <tlm_utils/multi_passthrough_initiator_socket.h>
|
||||
#include "../controller/core/configuration/ConfigurationLoader.h"
|
||||
|
||||
using namespace std;
|
||||
using namespace tlm;
|
||||
|
||||
struct IArbiter: public sc_module {
|
||||
public:
|
||||
tlm_utils::multi_passthrough_target_socket<IArbiter> tSocket;
|
||||
tlm_utils::multi_passthrough_initiator_socket<IArbiter> iSocket;
|
||||
|
||||
SC_CTOR(IArbiter) {
|
||||
// One or more devices can accesss all the memory units through the arbiter.
|
||||
// Devices' initiator sockets are bound to arbiter's target sockets.
|
||||
// As soon the arbiter receives a request in any of its target sockets it should treat and forward it to the proper memory channel.
|
||||
tSocket.register_nb_transport_fw(this, &IArbiter::nb_transport_fw);
|
||||
|
||||
// The arbiter communicates with one or more memory unity through one or more sockets (one or more memory channels).
|
||||
// Each of the arbiter's initiator sockets is bound to a memory controller's target socket.
|
||||
// Anytime an transaction comes from a memory unity to the arbiter the "bw" callback is called.
|
||||
iSocket.register_nb_transport_bw(this, &IArbiter::nb_transport_bw);
|
||||
|
||||
tSocket.register_transport_dbg(this, &IArbiter::transport_dbg);
|
||||
}
|
||||
|
||||
virtual void setTlmRecorder(TlmRecorder* recorder) = 0;
|
||||
virtual bool isOutputBufferFull(unsigned int initiatorSocket) = 0;
|
||||
virtual void incrementNumberOfOutputBufferTransactions(unsigned int initiatorSocket) = 0;
|
||||
|
||||
protected:
|
||||
// Initiated by initiator side
|
||||
// This function is called when an arbiter's target socket receives a transaction from a device
|
||||
virtual tlm_sync_enum nb_transport_fw(int id, tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay) = 0;
|
||||
|
||||
// Initiated by dram side
|
||||
// This function is called when an arbiter's initiator socket receives a transaction from a memory controller
|
||||
virtual tlm_sync_enum nb_transport_bw(int channelId, tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay) = 0;
|
||||
|
||||
virtual unsigned int transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans) = 0;
|
||||
|
||||
void printDebugMessage(std::string message)
|
||||
{
|
||||
DebugManager::getInstance().printDebugMessage(this->name(), message);
|
||||
}
|
||||
|
||||
void appendDramExtension(int socketId, tlm_generic_payload& payload)
|
||||
{
|
||||
// Append Generation Extension
|
||||
GenerationExtension* genExtension = new GenerationExtension(clkAlign(sc_time_stamp(),Configuration::getInstance().ControllerClk));
|
||||
payload.set_auto_extension(genExtension);
|
||||
|
||||
unsigned int burstlength = payload.get_streaming_width();
|
||||
DecodedAddress decodedAddress = xmlAddressDecoder::getInstance().decodeAddress(payload.get_address());
|
||||
// Check the valid range of decodedAddress
|
||||
if (addressIsValid(decodedAddress)) {
|
||||
DramExtension* extension = new DramExtension(Thread(socketId+1), Channel(decodedAddress.channel), Bank(decodedAddress.bank), BankGroup(decodedAddress.bankgroup), Row(decodedAddress.row), Column(decodedAddress.column),burstlength);
|
||||
payload.set_auto_extension(extension);
|
||||
} else {
|
||||
SC_REPORT_FATAL("Arbiter", "Decoded Address are not inside the valid range");
|
||||
}
|
||||
}
|
||||
|
||||
bool addressIsValid(DecodedAddress& decodedAddress)
|
||||
{
|
||||
if (decodedAddress.channel >= xmlAddressDecoder::getInstance().amount["channel"]) {
|
||||
return false;
|
||||
}
|
||||
if (decodedAddress.bank >= xmlAddressDecoder::getInstance().amount["bank"]) {
|
||||
return false;
|
||||
}
|
||||
if (decodedAddress.bankgroup > xmlAddressDecoder::getInstance().amount["bankgroup"]) {
|
||||
return false;
|
||||
}
|
||||
if (decodedAddress.column >= xmlAddressDecoder::getInstance().amount["column"]) {
|
||||
return false;
|
||||
}
|
||||
if (decodedAddress.row >= xmlAddressDecoder::getInstance().amount["row"]) {
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
};
|
||||
|
||||
#endif /* IARBITER_H_ */
|
||||
140
DRAMSys/library/src/simulation/SimpleArbiter.h
Normal file
140
DRAMSys/library/src/simulation/SimpleArbiter.h
Normal file
@@ -0,0 +1,140 @@
|
||||
/*
|
||||
* Copyright (c) 2018, University of Kaiserslautern
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
|
||||
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors:
|
||||
* Felipe S. Prado
|
||||
* Matthias Jung
|
||||
*/
|
||||
|
||||
#ifndef SIMPLEARBITER_H
|
||||
#define SIMPLEARBITER_H
|
||||
|
||||
#include "IArbiter.h"
|
||||
#include "../common/xmlAddressdecoder.h"
|
||||
#include "../common/dramExtension.h"
|
||||
#include "../controller/core/TimingCalculation.h"
|
||||
|
||||
using namespace std;
|
||||
using namespace tlm;
|
||||
|
||||
// Annotated References [X,Y] --> Please refer to TLM AT Cheat Sheet on README
|
||||
|
||||
struct SimpleArbiter: public IArbiter{
|
||||
public:
|
||||
SimpleArbiter(sc_module_name name) : IArbiter(name) {
|
||||
}
|
||||
|
||||
void setTlmRecorder(TlmRecorder* recorder)
|
||||
{
|
||||
tlmRecorder = recorder;
|
||||
}
|
||||
|
||||
virtual bool isOutputBufferFull(unsigned int /*initiatorSocket*/)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
virtual void incrementNumberOfOutputBufferTransactions(unsigned int /*initiatorSocket*/)
|
||||
{
|
||||
}
|
||||
|
||||
protected:
|
||||
TlmRecorder* tlmRecorder;
|
||||
// Initiated by initiator side
|
||||
// This function is called when an arbiter's target socket receives a transaction from a device
|
||||
virtual tlm_sync_enum nb_transport_fw(int id, tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay)
|
||||
{
|
||||
if (phase == BEGIN_REQ)
|
||||
{
|
||||
payload.acquire();
|
||||
// adjust address offset, e.g. for gem5 simulation
|
||||
payload.set_address(payload.get_address() - Configuration::getInstance().AddressOffset);
|
||||
|
||||
// In the begin request phase the socket ID is appended to the payload.
|
||||
// It will extracted from the payload and used later.
|
||||
appendDramExtension(id, payload);
|
||||
|
||||
tlmRecorder->recordArbiterPhase(payload, phase, sc_time_stamp()+fwDelay);
|
||||
tlmRecorder->recordArbiterPhase(payload, END_REQ,sc_time_stamp()+fwDelay);
|
||||
tlmRecorder->recordPhase(payload, phase, sc_time_stamp()+fwDelay);
|
||||
|
||||
// Forward Path [1.0]
|
||||
iSocket[getISocketIndex(payload)]->nb_transport_fw(payload, phase, fwDelay);
|
||||
}
|
||||
else if(phase == END_RESP)
|
||||
{
|
||||
payload.release();
|
||||
tlmRecorder->recordArbiterPhase(payload, phase, sc_time_stamp()+fwDelay);
|
||||
}
|
||||
else
|
||||
{
|
||||
SC_REPORT_FATAL("Arbiter", "Illegal phase received by initiator");
|
||||
}
|
||||
|
||||
// 4-Phase Handshake [1.1]
|
||||
// 4-Phase Handshake [1.7]
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
// Initiated by dram side
|
||||
// This function is called when an arbiter's initiator socket receives a transaction from a memory controller
|
||||
virtual tlm_sync_enum nb_transport_bw(int /*channelId*/, tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay)
|
||||
{
|
||||
tlmRecorder->recordPhase(payload, phase, bwDelay + sc_time_stamp());
|
||||
|
||||
tSocket[DramExtension::getThread(payload).ID()-1]->nb_transport_bw(payload, TPhase, bwDelay);
|
||||
|
||||
if(phase == BEGIN_RESP)
|
||||
{
|
||||
// Early Completion [3.1]
|
||||
tlmRecorder->recordPhase(payload, END_RESP, bwDelay + sc_time_stamp());
|
||||
tlmRecorder->recordArbiterPhase(payload, BEGIN_RESP, sc_time_stamp()+bwDelay);
|
||||
return TLM_COMPLETED;
|
||||
}
|
||||
// 4-Phase Handshake [1.3]
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
virtual unsigned int transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans)
|
||||
{
|
||||
// adjust address offset:
|
||||
trans.set_address(trans.get_address() - Configuration::getInstance().AddressOffset);
|
||||
|
||||
return iSocket[getISocketIndex(trans)]->transport_dbg(trans);
|
||||
}
|
||||
|
||||
virtual unsigned int getISocketIndex(tlm_generic_payload& payload)
|
||||
{
|
||||
return DramExtension::getBank(payload).ID();
|
||||
}
|
||||
};
|
||||
|
||||
#endif // SIMPLEARBITER_H
|
||||
@@ -724,6 +724,15 @@ For more information check the documentation in [DRAMSylva folder](DRAMSys/libra
|
||||
|
||||
#### DRAMsys Diagrams
|
||||
|
||||
- **TLM Approximately Timed (AT)**
|
||||
|
||||
The figure below shows a cheat sheet with the possibilities that the TLM AT protocol
|
||||
offers. The annotated references [X,Y] are placed into the source code for a better
|
||||
orientation.
|
||||
|
||||

|
||||
|
||||
|
||||
- **Payload Extension information**
|
||||
|
||||
GenerationExtension is added in TracePlayer and DramExtension is added in Arbiter.
|
||||
|
||||
Reference in New Issue
Block a user