Merge branch 'work/dramsysconfig' into 'develop'

Modifications for gem5 integration.

See merge request ems/astdm/modeling.dram/dram.sys!361
This commit is contained in:
Lukas Steiner
2022-08-05 08:32:09 +00:00
44 changed files with 137 additions and 58 deletions

View File

@@ -42,8 +42,12 @@ project(DRAMSysLibrary)
set(CMAKE_CXX_STANDARD 17 CACHE STRING "C++ Version")
set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
option(DRAMSYS_WITH_DRAMPOWER "Build with DRAMPower support enabled." ON)
# Add DRAMPower:
if (DRAMSYS_WITH_DRAMPOWER)
add_subdirectory(src/common/third_party/DRAMPower)
endif()
# Add Configuration
add_subdirectory(src/common/configuration)
@@ -240,7 +244,7 @@ endif()
# Build:
target_include_directories(DRAMSysLibrary
PUBLIC src/common/third_party/DRAMPower/src/
PRIVATE src/common/third_party/DRAMPower/src/
PUBLIC $ENV{SYSTEMC_HOME}/include/
)
@@ -252,6 +256,13 @@ endif()
target_link_libraries(DRAMSysLibrary
PUBLIC ${SYSTEMC_LIBRARY}
PRIVATE DRAMPower
PUBLIC DRAMSysConfiguration
)
if (DRAMSYS_WITH_DRAMPOWER)
target_compile_definitions(DRAMSysLibrary PRIVATE DRAMPOWER)
target_link_libraries(DRAMSysLibrary
PRIVATE DRAMPower
)
endif()

View File

@@ -39,12 +39,13 @@
* Derek Christ
*/
#include <fstream>
#include "TlmRecorder.h"
#include "DebugManager.h"
#include "../controller/Command.h"
#include "../configuration/Configuration.h"
#include "../controller/Command.h"
#include "DebugManager.h"
#include <fstream>
#include <sqlite3.h>
using namespace sc_core;
using namespace tlm;
@@ -238,7 +239,20 @@ void TlmRecorder::terminateRemainingTransactions()
removeTransactionFromSystem(*transaction->first);
}
else
recordPhase(*(transaction->first), END_RESP, sc_time_stamp());
{
std::string beginPhase = transaction->second.recordedPhases.back().name;
if (beginPhase == "RESP")
recordPhase(*(transaction->first), END_RESP, sc_time_stamp());
else
{
// Do not terminate transaction as it is not ready to be completed.
currentTransactionsInSystem.erase(transaction);
// Decrement totalNumTransactions as this transaction will not be recorded in the database.
totalNumTransactions--;
}
}
}
}

View File

@@ -42,16 +42,18 @@
#define TLMRECORDER_H
#include <string>
#include <systemc>
#include <thread>
#include <tlm>
#include <unordered_map>
#include <vector>
#include <thread>
#include <systemc>
#include <tlm>
#include "sqlite3.h"
#include "../configuration/Configuration.h"
#include "dramExtensions.h"
#include "utils.h"
#include "../configuration/Configuration.h"
class sqlite3;
class sqlite3_stmt;
class TlmRecorder
{

View File

@@ -42,7 +42,7 @@ if (DRAMSYS_CONFIGURATION_TESTS)
endif()
add_library(DRAMSysConfiguration STATIC
Configuration.cpp
DRAMSysConfiguration.cpp
AddressMapping.cpp
McConfig.cpp
SimConfig.cpp

View File

@@ -33,7 +33,7 @@
* Derek Christ
*/
#include "Configuration.h"
#include "DRAMSysConfiguration.h"
#include <exception>
#include <fstream>

View File

@@ -33,8 +33,8 @@
* Derek Christ
*/
#ifndef DRAMSYSCONFIGURATION_CONFIGURATION_H
#define DRAMSYSCONFIGURATION_CONFIGURATION_H
#ifndef DRAMSYSCONFIGURATION_DRAMSYSCONFIGURATION_H
#define DRAMSYSCONFIGURATION_DRAMSYSCONFIGURATION_H
#include "AddressMapping.h"
#include "McConfig.h"
@@ -85,4 +85,4 @@ Configuration from_path(const std::string &path, const std::string &resourceDire
} // namespace DRAMSysConfiguration
#endif // DRAMSYSCONFIGURATION_CONFIGURATION_H
#endif // DRAMSYSCONFIGURATION_DRAMSYSCONFIGURATION_H

View File

@@ -34,7 +34,7 @@
*/
#include "McConfig.h"
#include <iostream>
namespace DRAMSysConfiguration
{

View File

@@ -36,7 +36,7 @@
#include <nlohmann/json.hpp>
#include <fstream>
#include <iostream>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
int main(int argc, char **argv)
{

View File

@@ -33,7 +33,7 @@
* Derek Christ
*/
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <fstream>
#include <iostream>

View File

@@ -34,7 +34,7 @@
*/
#include "util.h"
#include "Configuration.h"
#include "DRAMSysConfiguration.h"
#include <fstream>
#include <iostream>

View File

@@ -43,7 +43,7 @@
#define CONFIGURATION_H
#include <string>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <systemc>
#include "memspec/MemSpec.h"
#include "TemperatureSimConfig.h"

View File

@@ -41,7 +41,7 @@
#include <string>
#include <vector>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <systemc>
#include <utility>
#include "../common/DebugManager.h"

View File

@@ -41,7 +41,7 @@
#include <vector>
#include <string>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <systemc>
#include <tlm>
#include "../../common/utils.h"

View File

@@ -40,7 +40,7 @@
#include "MemSpec.h"
#include <systemc>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
class MemSpecDDR3 final : public MemSpec
{

View File

@@ -40,7 +40,10 @@
#include "Command.h"
using namespace tlm;
#ifdef DRAMPOWER
using namespace DRAMPower;
#endif
Command::Command(Command::Type type) : type(type) {}
@@ -145,6 +148,7 @@ tlm_phase Command::toPhase() const
return phaseOfCommand[type];
}
#ifdef DRAMPOWER
MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
{
// TODO: add correct phases when DRAMPower supports DDR5 same bank refresh
@@ -177,6 +181,7 @@ MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
};
return phaseOfCommand[phase - BEGIN_NOP];
}
#endif
bool phaseNeedsEnd(tlm_phase phase)
{

View File

@@ -43,7 +43,10 @@
#include <systemc>
#include <tlm>
#ifdef DRAMPOWER
#include "../common/third_party/DRAMPower/src/MemCommand.h"
#endif
// DO NOT CHANGE THE ORDER!
@@ -150,7 +153,10 @@ public:
}
};
#ifdef DRAMPOWER
DRAMPower::MemCommand::cmds phaseToDRAMPowerCommand(tlm::tlm_phase);
#endif
bool phaseNeedsEnd(tlm::tlm_phase);
tlm::tlm_phase getEndPhase(tlm::tlm_phase);

View File

@@ -533,5 +533,5 @@ void Controller::sendToDram(Command command, tlm_generic_payload& payload, sc_ti
bool Controller::isFullCycle(const sc_core::sc_time& time) const
{
sc_time aligedAtHalfCycle = std::floor((time * 2 / memSpec.tCK + 0.5)) / 2 * memSpec.tCK;
return aligedAtHalfCycle % memSpec.tCK == SC_ZERO_TIME;
return sc_time::from_value(aligedAtHalfCycle.value() % memSpec.tCK.value()) == SC_ZERO_TIME;
}

View File

@@ -802,5 +802,5 @@ void CheckerHBM3::insert(Command command, const tlm_generic_payload &payload)
bool CheckerHBM3::isFullCycle(const sc_core::sc_time& time) const
{
sc_time aligedAtHalfCycle = std::floor((time * 2 / memSpec->tCK + 0.5)) / 2 * memSpec->tCK;
return aligedAtHalfCycle % memSpec->tCK == SC_ZERO_TIME;
return sc_time::from_value(aligedAtHalfCycle.value() % memSpec->tCK.value()) == SC_ZERO_TIME;
}

View File

@@ -39,6 +39,10 @@
#include "../simulation/AddressDecoder.h"
#include "../common/dramExtensions.h"
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#endif
#include <random>
#include <chrono>
#include <bitset>
@@ -501,6 +505,7 @@ double errorModel::getTemperature()
if (this->myChannel != -1)
{
#ifdef DRAMPOWER
if (thermalSim && powerAnalysis)
{
// TODO
@@ -512,6 +517,9 @@ double errorModel::getTemperature()
} else {
temperature = temperatureController.getTemperature(this->myChannel, 0);
}
#else
temperature = temperatureController.getTemperature(this->myChannel, 0);
#endif
}
return temperature;

View File

@@ -41,9 +41,10 @@
#include <systemc>
#include "../configuration/Configuration.h"
#include "../simulation/AddressDecoder.h"
#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../simulation/TemperatureController.h"
class libDRAMPower;
class errorModel : public sc_core::sc_module
{
public:

View File

@@ -41,7 +41,7 @@
#include <vector>
#include <utility>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include "../configuration/Configuration.h"
struct DecodedAddress

View File

@@ -41,7 +41,7 @@
#include "AddressDecoder.h"
#include "../configuration/Configuration.h"
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
using namespace sc_core;
using namespace tlm;
@@ -130,7 +130,7 @@ void ArbiterReorder::end_of_elaboration()
tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
tlm_phase &phase, sc_time &fwDelay)
{
sc_time clockOffset = (sc_time_stamp() + fwDelay) % tCK;
sc_time clockOffset = sc_time::from_value((sc_time_stamp() + fwDelay).value() % tCK.value());
sc_time notDelay = (clockOffset == SC_ZERO_TIME) ? fwDelay : (fwDelay + tCK - clockOffset);
if (phase == BEGIN_REQ)

View File

@@ -49,7 +49,7 @@
#include "../controller/ControllerIF.h"
#include "TemperatureController.h"
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <string>
#include <systemc>
#include <list>

View File

@@ -40,7 +40,7 @@
#include "DRAMSys.h"
#include "../common/TlmRecorder.h"
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
class DRAMSysRecordable : public DRAMSys
{

View File

@@ -55,12 +55,19 @@
#include "../../common/DebugManager.h"
#include "../../common/dramExtensions.h"
#include "../../common/utils.h"
#include "../../common/third_party/DRAMPower/src/MemCommand.h"
#include "../../controller/Command.h"
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/MemCommand.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#endif
using namespace sc_core;
using namespace tlm;
#ifdef DRAMPOWER
using namespace DRAMPower;
#endif
Dram::Dram(const sc_module_name& name, const Configuration& config)
: sc_module(name), memSpec(*config.memSpec), tSocket("socket"), storeMode(config.storeMode),
@@ -99,6 +106,7 @@ Dram::~Dram()
void Dram::reportPower()
{
#ifdef DRAMPOWER
DRAMPower->calcEnergy();
// Print the final total energy and the average power for
@@ -115,6 +123,7 @@ void Dram::reportPower()
<< DRAMPower->getPower().average_power
* memSpec.devicesPerRank
<< std::string(" mW") << std::endl;
#endif
}
tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload &payload,
@@ -126,7 +135,10 @@ tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload &payload,
{
int bank = static_cast<int>(DramExtension::getExtension(payload).getBank().ID());
int64_t cycle = std::lround((sc_time_stamp() + delay) / memSpec.tCK);
#ifdef DRAMPOWER
DRAMPower->doCommand(phaseToDRAMPowerCommand(phase), bank, cycle);
#endif
}
if (storeMode == Configuration::StoreMode::Store)

View File

@@ -47,7 +47,8 @@
#include <tlm_utils/simple_target_socket.h>
#include "../../configuration/Configuration.h"
#include "../../configuration/memspec/MemSpec.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
class libDRAMPower;
class Dram : public sc_core::sc_module
{
@@ -63,7 +64,9 @@ protected:
unsigned char *memory;
const bool useMalloc;
#ifdef DRAMPOWER
std::unique_ptr<libDRAMPower> DRAMPower;
#endif
virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &payload,
tlm::tlm_phase &phase, sc_core::sc_time &delay);

View File

@@ -37,11 +37,14 @@
#include <memory>
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecDDR3.h"
using namespace sc_core;
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
using namespace DRAMPower;
#endif
using namespace sc_core;
DramDDR3::DramDDR3(const sc_module_name& name, const Configuration& config,
TemperatureController& temperatureController)
@@ -56,6 +59,7 @@ DramDDR3::DramDDR3(const sc_module_name& name, const Configuration& config,
if (memSpecDDR3 == nullptr)
SC_REPORT_FATAL("DramDDR3", "Wrong MemSpec chosen");
#ifdef DRAMPOWER
MemArchitectureSpec memArchSpec;
memArchSpec.burstLength = memSpecDDR3->defaultBurstLength;
memArchSpec.dataRate = memSpecDDR3->dataRate;
@@ -143,5 +147,6 @@ DramDDR3::DramDDR3(const sc_module_name& name, const Configuration& config,
powerSpec.memArchSpec = memArchSpec;
DRAMPower = std::make_unique<libDRAMPower>(powerSpec, false);
#endif
}
}

View File

@@ -37,11 +37,14 @@
#include <memory>
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecDDR4.h"
using namespace sc_core;
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
using namespace DRAMPower;
#endif
using namespace sc_core;
DramDDR4::DramDDR4(const sc_module_name& name, const Configuration& config,
TemperatureController& temperatureController)
@@ -56,6 +59,7 @@ DramDDR4::DramDDR4(const sc_module_name& name, const Configuration& config,
if (memSpecDDR4 == nullptr)
SC_REPORT_FATAL("DramDDR4", "Wrong MemSpec chosen");
#ifdef DRAMPOWER
MemArchitectureSpec memArchSpec;
memArchSpec.burstLength = memSpecDDR4->defaultBurstLength;
memArchSpec.dataRate = memSpecDDR4->dataRate;
@@ -143,5 +147,6 @@ DramDDR4::DramDDR4(const sc_module_name& name, const Configuration& config,
powerSpec.memArchSpec = memArchSpec;
DRAMPower = std::make_unique<libDRAMPower>(powerSpec, false);
#endif
}
}

View File

@@ -35,11 +35,9 @@
#include "DramDDR5.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecDDR5.h"
using namespace sc_core;
using namespace DRAMPower;
DramDDR5::DramDDR5(const sc_module_name& name, const Configuration& config,
TemperatureController& temperatureController)

View File

@@ -35,7 +35,6 @@
#include "DramGDDR5.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecGDDR5.h"
using namespace sc_core;

View File

@@ -35,7 +35,6 @@
#include "DramGDDR5X.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecGDDR5X.h"
using namespace sc_core;

View File

@@ -35,7 +35,6 @@
#include "DramGDDR6.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecGDDR6.h"
using namespace sc_core;

View File

@@ -35,7 +35,6 @@
#include "DramHBM2.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecHBM2.h"
using namespace sc_core;

View File

@@ -35,7 +35,6 @@
#include "DramHBM3.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecHBM3.h"
using namespace sc_core;

View File

@@ -35,7 +35,6 @@
#include "DramLPDDR4.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecLPDDR4.h"
using namespace sc_core;

View File

@@ -37,7 +37,6 @@
#include "Dram.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecLPDDR5.h"
using namespace sc_core;

View File

@@ -68,19 +68,23 @@ DramRecordable<BaseDram>::DramRecordable(const sc_module_name& name, const Confi
: BaseDram(name, config, temperatureController), tlmRecorder(tlmRecorder),
powerWindowSize(config.memSpec->tCK * config.windowSize)
{
#ifdef DRAMPOWER
// Create a thread that is triggered every $powerWindowSize
// to generate a Power over Time plot in the Trace analyzer:
if (config.powerAnalysis && config.enableWindowing)
SC_THREAD(powerWindow);
#endif
}
template<class BaseDram>
void DramRecordable<BaseDram>::reportPower()
{
BaseDram::reportPower();
#ifdef DRAMPOWER
tlmRecorder.recordPower(sc_time_stamp().to_seconds(),
this->DRAMPower->getPower().window_average_power
* this->memSpec.devicesPerRank);
#endif
}
template<class BaseDram>
@@ -123,7 +127,7 @@ void DramRecordable<BaseDram>::recordPhase(tlm_generic_payload &trans, const tlm
}
#ifdef DRAMPOWER
// This Thread is only triggered when Power Simulation is enabled.
// It estimates the current average power which will be stored in the trace database for visualization purposes.
template<class BaseDram>
@@ -158,6 +162,7 @@ void DramRecordable<BaseDram>::powerWindow()
}
}
#endif
template class DramRecordable<DramDDR3>;
template class DramRecordable<DramDDR4>;

View File

@@ -40,9 +40,12 @@
#include <tlm>
#include "../../common/TlmRecorder.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../TemperatureController.h"
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#endif
template<class BaseDram>
class DramRecordable final : public BaseDram
{
@@ -71,9 +74,11 @@ private:
return std::fabs(a - b) < epsilon;
}
#ifdef DRAMPOWER
// This Thread is only triggered when Power Simulation is enabled.
// It estimates the current average power which will be stored in the trace database for visualization purposes.
void powerWindow();
#endif
};
#endif // DRAMRECORDABLE_H

View File

@@ -35,11 +35,9 @@
#include "DramSTTMRAM.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecSTTMRAM.h"
using namespace sc_core;
using namespace DRAMPower;
DramSTTMRAM::DramSTTMRAM(const sc_module_name& name, const Configuration& config,
TemperatureController& temperatureController)

View File

@@ -39,12 +39,16 @@
#include "DramWideIO.h"
#include "../../configuration/Configuration.h"
#include "../../error/errormodel.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecWideIO.h"
#ifdef DRAMPOWER
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
using namespace DRAMPower;
#endif
using namespace sc_core;
using namespace tlm;
using namespace DRAMPower;
DramWideIO::DramWideIO(const sc_module_name& name, const Configuration& config,
TemperatureController& temperatureController)
@@ -52,6 +56,7 @@ DramWideIO::DramWideIO(const sc_module_name& name, const Configuration& config,
{
if (powerAnalysis)
{
#ifdef DRAMPOWER
const auto* memSpecWideIO = dynamic_cast<const MemSpecWideIO *>(config.memSpec.get());
if (memSpecWideIO == nullptr)
SC_REPORT_FATAL("DramWideIO", "Wrong MemSpec chosen");
@@ -144,6 +149,7 @@ DramWideIO::DramWideIO(const sc_module_name& name, const Configuration& config,
DRAMPower = std::make_unique<libDRAMPower>(powerSpec, false);
// For each bank in a channel a error Model is created:
if (storeMode == Configuration::StoreMode::ErrorModel)
{
@@ -154,6 +160,7 @@ DramWideIO::DramWideIO(const sc_module_name& name, const Configuration& config,
temperatureController, DRAMPower.get()));
}
}
#endif
}
else
{
@@ -174,12 +181,14 @@ tlm_sync_enum DramWideIO::nb_transport_fw(tlm_generic_payload &payload,
{
assert(phase >= 5 && phase <= 19);
#ifdef DRAMPOWER
if (powerAnalysis)
{
int bank = static_cast<int>(DramExtension::getExtension(payload).getBank().ID());
int64_t cycle = std::lround((sc_time_stamp() + delay) / memSpec.tCK);
DRAMPower->doCommand(phaseToDRAMPowerCommand(phase), bank, cycle);
}
#endif
if (storeMode == Configuration::StoreMode::Store)
{

View File

@@ -35,7 +35,6 @@
#include "DramWideIO2.h"
#include "../../configuration/Configuration.h"
#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
#include "../../configuration/memspec/MemSpecWideIO2.h"
using namespace sc_core;

View File

@@ -37,7 +37,7 @@
#ifndef TRACESETUP_H
#define TRACESETUP_H
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <vector>
#include <string>
#include <memory>

View File

@@ -44,7 +44,7 @@
#include <vector>
#include <list>
#include <chrono>
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <memory>
#include <systemc>

View File

@@ -38,7 +38,7 @@
#include "ui_simulationdialog.h"
#include <Configuration.h>
#include <DRAMSysConfiguration.h>
#include <QFileInfo>
#include <QPointer>
#include <QProcess>