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Integrate DRAMUtils and new DRAMPower

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This commit is contained in:
marcomoerz
2024-07-04 10:54:04 +02:00
committed by Derek Christ
parent 0bd943e588
commit 4120e9c35b
240 changed files with 10895 additions and 3138 deletions
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4
extensions/apps/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.cpp
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@@ -47,7 +47,7 @@ void TimeDependenciesInfoDDR5::mInitializeValues()
burstLength = mMemspecJson["memarchitecturespec"].toObject()["burstLength"].toInt();
dataRate = mMemspecJson["memarchitecturespec"].toObject()["dataRate"].toInt();
refMode = mMemspecJson["memarchitecturespec"].toObject()["refMode"].toInt();
RefMode = mMemspecJson["memarchitecturespec"].toObject()["RefMode"].toInt();
cmdMode = mMemspecJson["memarchitecturespec"].toObject()["cmdMode"].toInt();
bitWidth = mMemspecJson["memarchitecturespec"].toObject()["width"].toInt();
@@ -100,7 +100,7 @@ void TimeDependenciesInfoDDR5::mInitializeValues()
tRC = tRAS + tRP;
if (refMode == 1)
if (RefMode == 1)
{
tRFC_slr = tCK * mMemspecJson["memtimingspec"].toObject()["RFC1_slr"].toInt();
tRFC_dlr = tCK * mMemspecJson["memtimingspec"].toObject()["RFC1_dlr"].toInt();

2
extensions/apps/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.h
View File

@@ -33,7 +33,7 @@ protected:
uint burstLength;
uint dataRate;
uint refMode;
uint RefMode;
uint tRCD;
uint tPPD;

8
extensions/apps/traceAnalyzer/scripts/tests.py
View File

@@ -10,7 +10,7 @@ class DramConfig(object):
memoryType = ""
scheduler = ""
bankwiseLogic = 0
refMode = 1
RefMode = 1
clk = 0
unitOfTime = ""
dataRate = 0
@@ -53,7 +53,7 @@ class DramConfig(object):
self.unitOfTime = clkWithUnit[1].lower()
self.bankwiseLogic = 0
self.refMode = 0
self.RefMode = 0
self.scheduler = mcconfig.getValue("Scheduler")
self.numberOfBanks = memspec.getIntValue("memarchitecturespec","nbrOfBanks")
@@ -112,10 +112,10 @@ class DramConfig(object):
self.tXS = self.clk * memspec.getIntValue("memtimingspec","XS")
self.tXSDLL = self.clk * memspec.getIntValue("memtimingspec","XSDLL")
self.tAL = self.clk * memspec.getIntValue("memtimingspec","AL")
if (self.refMode == "4"):
if (self.RefMode == "4"):
self.tRFC = self.clk * memspec.getIntValue("memtimingspec","RFC4")
self.tREFI = self.clk * (memspec.getIntValue("memtimingspec","REFI") / 4)
elif (self.refMode == "2"):
elif (self.RefMode == "2"):
self.tRFC = self.clk * memspec.getIntValue("memtimingspec","RFC2")
self.tREFI = self.clk * (memspec.getIntValue("memtimingspec","REFI") / 2)
else: