Integrate DRAMUtils and new DRAMPower

This commit is contained in:
marcomoerz
2024-07-04 10:54:04 +02:00
committed by Derek Christ
parent 0bd943e588
commit 4120e9c35b
240 changed files with 10895 additions and 3138 deletions

View File

@@ -9,59 +9,63 @@
"nbrOfRows": 65536,
"width": 16,
"nbrOfDevices": 1,
"nbrOfChannels": 1
"nbrOfChannels": 1,
"nbrOfBankGroups": 1,
"maxBurstLength": 16
},
"memoryId": "JEDEC_8Gb_LPDDR4-3200_16bit",
"memoryType": "LPDDR4",
"mempowerspec": {
"idd0": 3.5,
"idd02": 45.0,
"idd0ql": 0.75,
"idd2n": 2.0,
"idd2n2": 27.0,
"idd2nQ": 0.75,
"idd2ns": 2.0,
"idd2ns2": 23.0,
"idd2nsq": 0.75,
"idd2p": 1.2,
"idd2p2": 3.0,
"idd2pQ": 0.75,
"idd2ps": 1.2,
"idd2ps2": 3.0,
"idd2psq": 0.75,
"idd3n": 2.25,
"idd3n2": 30.0,
"idd3nQ": 0.75,
"idd3ns": 2.25,
"idd3ns2": 30.0,
"idd3nsq": 0.75,
"idd3p": 1.2,
"idd3p2": 9.0,
"idd3pQ": 0.75,
"idd3ps": 1.2,
"idd3ps2": 9.0,
"idd3psq": 0.75,
"idd4r": 2.25,
"idd4r2": 275.0,
"idd4rq": 150.0,
"idd4w": 2.25,
"idd4w2": 210.0,
"idd4wq": 55.0,
"idd5": 10.0,
"idd52": 90.0,
"idd5ab": 2.5,
"idd5ab2": 30.0,
"idd5abq": 0.75,
"idd5b": 2.5,
"idd5b2": 30.0,
"idd5bq": 0.75,
"idd5q": 0.75,
"idd6": 0.3,
"idd62": 0.5,
"idd6q": 0.1,
"vdd": 1.8,
"idd01": 3.5e-3,
"idd02": 45.0e-3,
"idd0ql": 0.75e-3,
"idd2n1": 2.0e-3,
"idd2n2": 27.0e-3,
"idd2nQ": 0.75e-3,
"idd2ns1": 2.0e-3,
"idd2ns2": 23.0e-3,
"idd2nsq": 0.75e-3,
"idd2p1": 1.2e-3,
"idd2p2": 3.0e-3,
"idd2pQ": 0.75e-3,
"idd2ps1": 1.2e-3,
"idd2ps2": 3.0e-3,
"idd2psq": 0.75e-3,
"idd3n1": 2.25e-3,
"idd3n2": 30.0e-3,
"idd3nQ": 0.75e-3,
"idd3ns1": 2.25e-3,
"idd3ns2": 30.0e-3,
"idd3nsq": 0.75e-3,
"idd3p1": 1.2e-3,
"idd3p2": 9.0e-3,
"idd3pQ": 0.75e-3,
"idd3ps1": 1.2e-3,
"idd3ps2": 9.0e-3,
"idd3psq": 0.75e-3,
"idd4r1": 2.25e-3,
"idd4r2": 275.0e-3,
"idd4rq": 150.0e-3,
"idd4w1": 2.25e-3,
"idd4w2": 210.0e-3,
"idd4wq": 55.0e-3,
"idd51": 10.0e-3,
"idd52": 90.0e-3,
"idd5ab1": 2.5e-3,
"idd5ab2": 30.0e-3,
"idd5abq": 0.75e-3,
"idd5pb1": 2.5e-3,
"idd5pb2": 30.0e-3,
"idd5pbq": 0.75e-3,
"idd5q": 0.75e-3,
"idd61": 0.3e-3,
"idd62": 0.5e-3,
"idd6q": 0.1e-3,
"vdd1": 1.8,
"vdd2": 1.1,
"vddq": 1.1
"vddq": 1.1,
"iBeta_vdd1": 3.5e-3,
"iBeta_vdd2": 45.0e-3
},
"memtimingspec": {
"CCD": 8,
@@ -76,15 +80,15 @@
"PPD": 4,
"RCD": 29,
"REFI": 6246,
"REFIPB": 780,
"RFCAB": 448,
"RFCPB": 224,
"REFIpb": 780,
"RFCab": 448,
"RFCpb": 224,
"RL": 28,
"RAS": 68,
"RPAB": 34,
"RPPB": 29,
"RCAB": 102,
"RCPB": 97,
"RPab": 34,
"RPpb": 29,
"RCab": 102,
"RCpb": 97,
"RPST": 0,
"RRD": 16,
"RTP": 12,
@@ -96,7 +100,36 @@
"XP": 12,
"XSR": 460,
"RTRS": 1,
"tCK": 625
"tCK": 625e-12
},
"memimpedancespec": {
"ck_termination": true,
"ck_R_eq": 1e6,
"ck_dyn_E": 1e-12,
"ca_termination": true,
"ca_R_eq": 1e6,
"ca_dyn_E": 1e-12,
"rdq_termination": true,
"rdq_R_eq": 1e6,
"rdq_dyn_E": 1e-12,
"wdq_termination": true,
"wdq_R_eq": 1e6,
"wdq_dyn_E": 1e-12,
"wdqs_termination": true,
"wdqs_R_eq": 1e6,
"wdqs_dyn_E": 1e-12,
"rdqs_termination": true,
"rdqs_R_eq": 1e6,
"rdqs_dyn_E": 1e-12
},
"bankwisespec": {
"factRho": 1,
"factSigma": 1,
"pasrMode": 0,
"hasPASR": false
}
}
}