Merge pull request #5 from fzeder/master

Removed Warnings and updated Readmefile

.gitignore

@@ -15,3 +15,5 @@
 dram/build-*/
 ._.DS_Store
 .DS_Store
+*.swp
+cscope*

README.md

@@ -1,12 +1,97 @@
 de.uni-kl.ems.dram.vp.system
 ============================
 
-Generic DRAM controller
+Generic DRAM controller simulator and debug tools related to it.
 
-#Setup with QTCreator
+# Basic Setup
 
-needs update!
+In a terminal window execute the commands that follow (the '$' symbolizes the
+terminal prompt).
+
+Go to your home directory.
+
+```
+$ cd
+```
+
+Create a directory for your projects.
+
+```
+$ mkdir projects
+```
+
+Clone the repository.
+
+It is possible that you will work with a **fork** of the official codebase. A
+fork is a copy of a repository. In that case, after pushing changes into your
+copy you should create a **pull request** in order to your supervisor check
+and possibly bring your changes to the official codebase.
+
+In case of doubts about which repository you should clone ask your supervisor.
+
+```
+$ git clone https://<user>@git.rhrk.uni-kl.de/<user>/dram.vp.system.git
+```
+
+Go to the projetct directory.
+
+```
+$ cd dram.vp.system
+```
+
+Execute the script below.
+
+```
+$ ./install_prerequisites.sh
+```
+
+
+## With QTCreator
+Execute the *QTCreator*.
+
+```
+$ qtcreator &
+```
+
+Use the menu bar and open the DRAMSys project.
+
+**File -> Open Project -> dram.vp.sys/dram/dramSys/dramSys.pro**
+
+When you open the project for the first time a configuration window pops-up.
+Then click in **Configure Project** and after that **Build** the project.
+
+Repeat the procedure above and build the trace analyser project.
+
+**File -> Open Project -> dram.vp.sys/analyser/analyser/traceAnalizer.pro**
+
+
+## Without QTCreator
+
+In case you prefer a command line interface to the QTCreator GUI you can also
+use **qmake** to generate a Makefile and then compile the project.
+
+```
+$ cd dram
+$ mkdir build
+$ cd build
+$ qmake ../dramSys/dramSys.pro
+$ make
+```
 
  
+# DRAMSys Resources
 
+The simulator's configuration is done via some files. You can find such configuration files in the directory below and its sub-directories.
+
+```
+$ cd /projects/dram.vp.system/dram/resources
+```
+
+A short description of the content each directory follows.
+
+* resources
+  * configs - XML files used for configurate specific details of the simulation.
+  * scripts - useful tools.
+  * simulations - global configs for simulations: debug mode, power analysis and database recording. Some specific configuration files are referenced in the global configuration file.
+  * traces - trace files for simulations. They contain accesses to memory in certain known scenarios.
 

dram/src/common/Utils.cpp

@@ -41,7 +41,7 @@ std::string phaseNameToString(tlm::tlm_phase phase)
 
 unsigned int queryUIntParameter(XMLElement* node, string name)
 {
-    int result;
+    int result = 0;
     XMLElement* element;
     for (element = node->FirstChildElement("parameter"); element != NULL;
             element = element->NextSiblingElement("parameter"))
@@ -49,7 +49,7 @@ unsigned int queryUIntParameter(XMLElement* node, string name)
         if (element->Attribute("id") == name)
         {
             sc_assert(!strcmp(element->Attribute("type"), "uint"));
-            XMLError error = element->QueryIntAttribute("value", &result);
+            XMLError __attribute__((unused)) error = element->QueryIntAttribute("value", &result);
             sc_assert(!error);
             return result;
         }
@@ -75,7 +75,7 @@ bool parameterExists(tinyxml2::XMLElement* node, std::string name)
 
 double queryDoubleParameter(XMLElement* node, string name)
 {
-    double result;
+    double result = 0;
     XMLElement* element;
     for (element = node->FirstChildElement("parameter"); element != NULL;
             element = element->NextSiblingElement("parameter"))
@@ -83,7 +83,7 @@ double queryDoubleParameter(XMLElement* node, string name)
         if (element->Attribute("id") == name)
         {
             sc_assert(!strcmp(element->Attribute("type"), "double"));
-            XMLError error = element->QueryDoubleAttribute("value", &result);
+            XMLError __attribute__((unused)) error = element->QueryDoubleAttribute("value", &result);
             sc_assert(!error);
             return result;
         }
@@ -95,7 +95,7 @@ double queryDoubleParameter(XMLElement* node, string name)
 
 bool queryBoolParameter(XMLElement* node, string name)
 {
-    bool result;
+    bool result = false;
     XMLElement* element;// = node->FirstChildElement("parameter");
     for (element = node->FirstChildElement("parameter"); element != NULL;
             element = element->NextSiblingElement("parameter"))
@@ -103,7 +103,7 @@ bool queryBoolParameter(XMLElement* node, string name)
         if (element->Attribute("id") == name)
         {
             sc_assert(!strcmp(element->Attribute("type"), "bool"));
-            XMLError error = element->QueryBoolAttribute("value", &result);
+            XMLError __attribute__((unused)) error = element->QueryBoolAttribute("value", &result);
             sc_assert(!error);
             return result;
         }
@@ -151,7 +151,7 @@ string errorToString(XMLError error)
     case XML_ERROR_PARSING: return "ERROR_PARSING";
     case XML_CAN_NOT_CONVERT_TEXT: return "CAN_NOT_CONVERT_TEXT";
     case XML_NO_TEXT_NODE: return "NO_TEXT_NODE";
-    default: "";
+    default: return "";
     }
 }
 

dram/src/controller/core/refresh/RefreshManager.cpp

@@ -32,7 +32,7 @@ bool RefreshManager::hasCollision(const ScheduledCommand& command)
     return command.getStart() < controllerCore.state.getLastCommand(Command::AutoRefresh).getEnd() || command.getEnd() > nextPlannedRefresh;
 }
 
-void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload, sc_time time)
+void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload __attribute__((unused)), sc_time time)
 {
     sc_assert(!isInvalidated(payload, time));
 
@@ -78,7 +78,7 @@ void RefreshManager::reInitialize(Bank /*bank*/, sc_time time)
     planNextRefresh();
 }
 
-bool RefreshManager::isInvalidated(tlm::tlm_generic_payload& payload, sc_time time)
+bool RefreshManager::isInvalidated(tlm::tlm_generic_payload& payload __attribute__((unused)), sc_time time)
 {
     return nextPlannedRefresh > time;
 }

dram/src/controller/core/scheduling/checker/WriteChecker.cpp

@@ -87,7 +87,7 @@ sc_time WriteChecker::writeToWrite(ScheduledCommand& firstWrite, ScheduledComman
 	return max(tCCD, getWriteAccessTime());
 }
 
-sc_time WriteChecker::readToWrite(ScheduledCommand& read, ScheduledCommand& write)
+sc_time WriteChecker::readToWrite(ScheduledCommand& read __attribute__((unused)), ScheduledCommand& write __attribute__((unused)))
 {
 	sc_assert(read.getCommand() == Command::Read || read.getCommand() == Command::ReadA);
 	sc_assert(write.getCommand() == Command::Write || write.getCommand() == Command::WriteA);

dram/src/simulation/Dram.h

@@ -93,7 +93,7 @@ struct Dram: sc_module
         TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp() + delay);
 
         // This is only needed for power simulation:
-        unsigned long long cycle = sc_time_stamp().value()/Configuration::getInstance().memSpec.clk.value();
+        IFPOW(unsigned long long cycle = sc_time_stamp().value()/Configuration::getInstance().memSpec.clk.value());
         unsigned int bank = DramExtension::getExtension(payload).getBank().ID();
 
         if (phase == BEGIN_PRE)

dram/src/simulation/Simulation.cpp

@@ -21,7 +21,7 @@
 
 using namespace std;
 
-Simulation::Simulation(sc_module_name /*name*/, string pathToResources, string traceName, DramSetup setup,
+Simulation::Simulation(sc_module_name __attribute__((unused)) name, string pathToResources, string traceName, DramSetup setup,
                        std::vector<Device> devices) :
     traceName(traceName), dramSetup(setup)
 
@@ -35,7 +35,7 @@ Simulation::Simulation(sc_module_name /*name*/, string pathToResources, string t
     ConfigurationLoader::loadMemSpec(Configuration::getInstance(), setup.memspec);//pathToResources + string("configs/memspecs/") + setup.memspec);
     ConfigurationLoader::loadSimConfig(Configuration::getInstance(), setup.simconfig);
 
-    setupTlmRecorder(traceName, pathToResources, setup, devices);
+    setupTlmRecorder(traceName, pathToResources, devices);
     instantiateModules(pathToResources, devices);
     bindSockets();
     setupDebugManager(traceName);
@@ -51,7 +51,7 @@ void Simulation::setupDebugManager(const string& traceName)
         dbg.openDebugFile(traceName + ".txt");
 }
 
-void Simulation::setupTlmRecorder(const string &traceName, const string &pathToResources, const DramSetup &setup, const std::vector<Device> &devices)
+void Simulation::setupTlmRecorder(const string &traceName, const string &pathToResources, const std::vector<Device> &devices)
 {
     if(Configuration::getInstance().DatabaseRecording)
     {

dram/src/simulation/Simulation.h

@@ -46,6 +46,7 @@ class Simulation: public sc_module, public TracePlayerListener
 {
 public:
     SC_HAS_PROCESS(Simulation);
+    //Simulation(sc_module_name name, string pathToResources, string traceName, std::vector<Device> devices);
     Simulation(sc_module_name name, string pathToResources, string traceName, DramSetup setup,
             std::vector<Device> devices);
     ~Simulation();
@@ -75,7 +76,7 @@ private:
     clock_t simulationStartTime;
     void report(std::string message);
     void setupDebugManager(const string& traceName);
-    void setupTlmRecorder(const string &traceName, const string &pathToResources, const DramSetup &setup, const std::vector<Device> &devices);
+    void setupTlmRecorder(const string &traceName, const string &pathToResources, const std::vector<Device> &devices);
     void instantiateModules(const string &pathToResources, const std::vector<Device> &devices);
     void bindSockets();
 };