derek/DRAMSys
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Powerdowns bankwise have own command in protocoll now. one command for all banks on bank 0.

Browse Source
This commit is contained in:
Janik Schlemminger
2014-07-30 23:37:56 +02:00
parent eb98c22188
commit 2f9cd66a73
7 changed files with 135 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
analyzer/analyzer/businessObjects/phases/phase.cpp
View File

@@ -97,7 +97,7 @@ Qt::BrushStyle Phase::getBrushStyle() const
bool Phase::isSelected(traceTime time, double yVal, const TraceDrawingProperties& drawingproperties) const
{
if (span.contains(time) && fabs(yVal-getYVal(drawingproperties))<=hexagonHeigth)
if (span.contains(time) && (!this->isBankwise() || fabs(yVal-getYVal(drawingproperties))<=hexagonHeigth))
return true;
if (spanOnDataBus && spanOnDataBus->contains(time) && fabs(yVal-drawingproperties.yValDataBus)<=hexagonHeigth)
return true;

41
analyzer/analyzer/businessObjects/phases/phase.h
View File

@@ -164,42 +164,71 @@ protected:
virtual std::vector<traceTime> getTimesOnCommandBus() const {return {span.Begin()};}
virtual QColor getColor(const TraceDrawingProperties &drawingProperties) const override {Q_UNUSED(drawingProperties) return getPhaseColor();}
virtual QColor getPhaseColor() const override {return ColorGenerator::getColor(10);}
virtual bool isBankwise() const {return false;}
};
class PDNA : public Phase
class PDNAB : public Phase
{
public:
using Phase::Phase;
protected:
virtual QString Name() const override {return "PDNA";}
virtual QString Name() const override {return "PDNAB";}
virtual Qt::BrushStyle getBrushStyle() const override {return Qt::Dense6Pattern;}
virtual QColor getColor(const TraceDrawingProperties &drawingProperties) const override {Q_UNUSED(drawingProperties) return getPhaseColor();}
virtual QColor getPhaseColor() const override {return QColor(Qt::black);}
virtual Phase::PhaseSymbol getPhaseSymbol() const override {return PhaseSymbol::Rect;}
};
class PDNP : public Phase
class PDNA : public PDNAB
{
public:
using PDNAB::PDNAB;
protected:
virtual QString Name() const override {return "PDNA";}
virtual bool isBankwise() const {return false;}
};
class PDNPB : public Phase
{
public:
using Phase::Phase;
protected:
virtual QString Name() const override {return "PDNP";}
virtual QString Name() const override {return "PDNPB";}
virtual Qt::BrushStyle getBrushStyle() const override{return Qt::Dense4Pattern;}
virtual QColor getColor(const TraceDrawingProperties &drawingProperties) const override {Q_UNUSED(drawingProperties) return getPhaseColor();}
virtual QColor getPhaseColor() const override {return QColor(Qt::black);}
virtual Phase::PhaseSymbol getPhaseSymbol() const override {return PhaseSymbol::Rect;}
};
class SREF : public Phase
class PDNP : public PDNPB
{
public:
using PDNPB::PDNPB;
protected:
virtual QString Name() const override {return "PDNP";}
virtual bool isBankwise() const {return false;}
};
class SREFB : public Phase
{
public:
using Phase::Phase;
protected:
virtual QString Name() const final {return "SREF";}
virtual QString Name() const {return "SREFB";}
virtual Qt::BrushStyle getBrushStyle() const {return Qt::Dense1Pattern;}
virtual QColor getColor(const TraceDrawingProperties &drawingProperties) const override {Q_UNUSED(drawingProperties) return getPhaseColor();}
virtual QColor getPhaseColor() const override {return QColor(Qt::black);}
virtual Phase::PhaseSymbol getPhaseSymbol() const override {return PhaseSymbol::Rect;}
};
class SREF : public SREFB
{
public:
using SREFB::SREFB;
protected:
virtual QString Name() const override {return "SREF";}
virtual bool isBankwise() const {return false;}
};
#endif // BANKPHASE_H

11
analyzer/analyzer/businessObjects/phases/phasefactory.cpp
View File

@@ -35,13 +35,18 @@ shared_ptr<Phase> PhaseFactory::CreatePhase(ID id, const QString& dbPhaseName,co
return shared_ptr<Phase>(new WR(id, span,trans,{Timespan(span.Begin(),span.Begin()+clk)},std::shared_ptr<Timespan>(new Timespan(trans->SpanOnDataStrobe()))));
else if(dbPhaseName == "WRA")
return shared_ptr<Phase>(new WRA(id, span,trans,{Timespan(span.Begin(),span.Begin()+clk)},std::shared_ptr<Timespan>(new Timespan(trans->SpanOnDataStrobe()))));
else if(dbPhaseName == "SREF")
return shared_ptr<Phase>(new SREF(id, span, trans,{Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "PDNA")
return shared_ptr<Phase>(new PDNA(id, span,trans, {Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "PDNAB")
return shared_ptr<Phase>(new PDNAB(id, span,trans, {Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "PDNP")
return shared_ptr<Phase>(new PDNP(id, span,trans, {Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "PDNPB")
return shared_ptr<Phase>(new PDNPB(id, span,trans, {Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "SREF")
return shared_ptr<Phase>(new SREF(id, span, trans,{Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else if(dbPhaseName == "SREFB")
return shared_ptr<Phase>(new SREFB(id, span, trans,{Timespan(span.Begin(),span.Begin()+clk),Timespan(span.End()-clk,span.End())},std::shared_ptr<Timespan>()));
else
throw std::runtime_error("DB phasename " + dbPhaseName.toStdString() + " unkown to phasefactory");
}

2
dram/resources/configs/memconfigs/fifo.xml
View File

@@ -1,6 +1,6 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="bankwiseLogic" type="bool" value="1" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />

3
dram/src/common/TlmRecorder.cpp
View File

@@ -196,6 +196,9 @@ void TlmRecorder::setUpTransactionTerminatingPhases()
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNP));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNA));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_SREF));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNPB));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_PDNAB));
transactionTerminatingPhases.push_back(static_cast<const tlm::tlm_phase>(END_SREFB));
}
void TlmRecorder::prepareSqlStatements()

70
dram/src/controller/Controller.h
View File

@@ -179,27 +179,63 @@ void Controller<BUSWIDTH>::send(const ScheduledCommand &command, tlm_generic_pay
controllerCorePEQ.notify(payload, BEGIN_PRE, command.getStart() - sc_time_stamp());
break;
case Command::PrechargeAll:
controllerCorePEQ.notify(payload, BEGIN_PRE_ALL, command.getStart() - sc_time_stamp());
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, BEGIN_PRE_ALL, command.getStart() - sc_time_stamp());
break;
case Command::PDNA:
controllerCorePEQ.notify(payload, BEGIN_PDNA, command.getStart() - sc_time_stamp());
break;
case Command::PDNP:
controllerCorePEQ.notify(payload, BEGIN_PDNP, command.getStart() - sc_time_stamp());
break;
case Command::SREF:
controllerCorePEQ.notify(payload, BEGIN_SREF, command.getStart() - sc_time_stamp());
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, BEGIN_PDNA, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, BEGIN_PDNAB, command.getStart() - sc_time_stamp());
break;
case Command::PDNAX:
controllerCorePEQ.notify(payload, END_PDNA, command.getEnd() - sc_time_stamp());
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, END_PDNA, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, END_PDNAB, command.getStart() - sc_time_stamp());
break;
case Command::PDNP:
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, BEGIN_PDNP, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, BEGIN_PDNPB, command.getStart() - sc_time_stamp());
break;
case Command::PDNPX:
controllerCorePEQ.notify(payload, END_PDNP, command.getEnd() - sc_time_stamp());
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, END_PDNP, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, END_PDNPB, command.getStart() - sc_time_stamp());
break;
case Command::SREF:
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, BEGIN_SREF, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, BEGIN_SREFB, command.getStart() - sc_time_stamp());
break;
case Command::SREFX:
controllerCorePEQ.notify(payload, END_SREF, command.getEnd() - sc_time_stamp());
if(!Configuration::getInstance().BankwiseLogic)
{
if(command.getBank() == Bank(0))
controllerCorePEQ.notify(payload, END_SREF, command.getStart() - sc_time_stamp());
}
else
controllerCorePEQ.notify(payload, END_SREFB, command.getStart() - sc_time_stamp());
break;
default:
SC_REPORT_FATAL(0, "unsupported command was sent by controller");
break;
@@ -248,10 +284,14 @@ void Controller<BUSWIDTH>::controllerCorePEQCallback(tlm_generic_payload &payloa
printDebugMessage("Entering REFB on bank " + to_string(bank.ID()));
else if (phase == BEGIN_REFA)
printDebugMessage("Entering REFA");
else if (containsPhase(phase, { BEGIN_PDNA, BEGIN_PDNP, BEGIN_SREF }))
else if (containsPhase(phase, { BEGIN_PDNAB, BEGIN_PDNPB, BEGIN_SREFB }))
printDebugMessage("Entering PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID()));
else if (containsPhase(phase, { END_PDNA, END_PDNP, END_SREF }))
else if (containsPhase(phase, { END_PDNAB, END_PDNPB, END_SREFB }))
printDebugMessage("Leaving PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID()));
else if (containsPhase(phase, { BEGIN_PDNA, BEGIN_PDNP, BEGIN_SREF }))
printDebugMessage("Entering PowerDown " + phaseNameToString(phase) + " on all banks");
else if (containsPhase(phase, { END_PDNA, END_PDNP, END_SREF }))
printDebugMessage("Leaving PowerDown " + phaseNameToString(phase) + " on all banks" );
else if (containsPhase(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACT, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA }))
{
}
@@ -404,7 +444,7 @@ void Controller<BUSWIDTH>::dramPEQCallback(tlm_generic_payload &payload, const t
sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME);
scheduleNextPayload();
}
else if (phase == END_REFA || phase == END_REFB)//TODO send all to sleep for REFA??
else if (phase == END_REFA || phase == END_REFB)//TODO send all to sleep for REFA cause we only send for bank 0 now???
{
printDebugMessage("Finished auto refresh on bank " + to_string(bank.ID()));
if(numberOfPayloadsInSystem[bank] == 0)

64
dram/src/simulation/Dram.h
View File

@@ -108,45 +108,37 @@ struct Dram: sc_module
}
//Powerdown phases have to be started and ended by the controller, because they do not have a fixed length
else if (phase == BEGIN_PDNP)
{
if(Configuration::getInstance().BankwiseLogic == false)
{
if(bank == 0)
{
//DRAMPower->doCommand(MemCommand::PDN_S_PRE, bank, cycle);
}
}
}
else if (phase == END_PDNP)
{
if(Configuration::getInstance().BankwiseLogic == false)
{
if(bank == 0)
{
//DRAMPower->doCommand(MemCommand::PUP_PRE, bank, cycle);
}
}
}
else if (phase == BEGIN_PDNA)
{
if(Configuration::getInstance().BankwiseLogic == false)
{
if(bank == 0)
{
//DRAMPower->doCommand(MemCommand::PDN_S_ACT, bank, cycle);
}
}
}
else if (phase == END_PDNA)
{
if(Configuration::getInstance().BankwiseLogic ==false)
{
if(bank == 0)
{
//DRAMPower->doCommand(MemCommand::PUP_ACT, bank, cycle);
}
}
}
else if (phase == BEGIN_PDNAB)
{
//DRAMPower->doCommand(MemCommand::PDN_S_ACT, bank, cycle);
}
else if (phase == END_PDNAB)
{
//DRAMPower->doCommand(MemCommand::PUP_ACT, bank, cycle);
}
else if (phase == BEGIN_PDNP)
{
//DRAMPower->doCommand(MemCommand::PDN_S_PRE, bank, cycle);
}
else if (phase == END_PDNP)
{
//DRAMPower->doCommand(MemCommand::PUP_PRE, bank, cycle);
}
else if (phase == BEGIN_PDNPB)
{
//DRAMPower->doCommand(MemCommand::PDN_S_PRE, bank, cycle);
}
else if (phase == END_PDNPB)
{
//DRAMPower->doCommand(MemCommand::PUP_PRE, bank, cycle);
}
else if (phase == BEGIN_SREF)
{
@@ -156,6 +148,14 @@ struct Dram: sc_module
{
//DRAMPower->doCommand(MemCommand::SREX, bank, cycle);
}
else if (phase == BEGIN_SREFB)
{
//DRAMPower->doCommand(MemCommand::SREN, bank, cycle);
}
else if (phase == END_SREFB)
{
//DRAMPower->doCommand(MemCommand::SREX, bank, cycle);
}
else
{
SC_REPORT_FATAL("DRAM", "DRAM PEQ was called with unknown phase");