Merge pull request #153 from EIT-Wehn/library

Library

DRAMSys/DRAMSys.pro

@@ -1,7 +1,8 @@
 TEMPLATE = subdirs
 
 thermalsim = $$(THERMALSIM)
-isEmpty(thermalsim) {
+isEmpty(thermalsim)
+{
     thermalsim = false
 }
 
@@ -11,10 +12,13 @@ $$eval(thermalsim) {
     message(Thermal Simulation Feature Disabled)
 }
 
+SUBDIRS += simulator/library.pro
 SUBDIRS += simulator/simulator.pro
 SUBDIRS += analyzer/traceAnalyzer.pro
 
+# Build Sub Projects in the order given above
+CONFIG += ordered
+
 # Additional Files:
 # tests folder (DRAMSys/tests)
 include(tests/tests.pri)
-

DRAMSys/analyzer/traceAnalyzer.pro

@@ -11,26 +11,27 @@ CONFIG   += no_keywords
 
 CONFIG += python
 
+
 unix:!macx {
-        QMAKE_CXXFLAGS += -std=c++11
-        CONFIG += qwt
-        QMAKE_CXXFLAGS += -Xlinker -export-dynamic
-        QMAKE_RPATHDIR += $${libqwt_home}
-        message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
+    # Python library and header files
+    python_home = $$(PYTHON_HOME)
+    isEmpty(python_home) {
+        python_home = /opt/python/lib
+    }
+    message(Python home is $${python_home})
+
+    python_headers = $$(PYTHON_HEADERS)
+    isEmpty(python_headers) {
+        python_headers = /opt/python/include/python3.5m
+    }
+    message(Getting python headers from $${python_headers})
+
+    QMAKE_CXXFLAGS += -std=c++11
+    CONFIG += qwt
+    QMAKE_CXXFLAGS += -Xlinker -export-dynamic
+    QMAKE_RPATHDIR += $${libqwt_home}
+    message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
 	
-	# Python library and header files
-	python_home = $$(PYTHON_HOME)
-	isEmpty(python_home) {
-		python_home = /opt/python/lib
-	}
-	message(Python home is $${python_home})
-
-	python_headers = $$(PYTHON_HEADERS)
-	isEmpty(python_headers) {
-		python_headers = /opt/python/include/python3.5m
-	}
-	message(Getting python headers from $${python_headers})
-
     CONFIG(python){
         LIBS += -L$${python_home} -lpython3.5m
         INCLUDEPATH += $${python_headers}
@@ -38,15 +39,20 @@ unix:!macx {
 }
 
 macx: {
-        CONFIG += c++11
-        QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++
-        QMAKE_LFLAGS += -F$$(LIBQWT_HOME)
-        LIBS += -F$$(LIBQWT_HOME) -framework qwt
-        INCLUDEPATH += $$(LIBQWT_HEADERS)
-        DEPENDPATH += $$replace(LIBQWT_HOME, lib, )
-        INCLUDEPATH += $$(PYTHON_HEADERS)
-        LIBS += -L$$(PYTHON_HOME) -lpython3.6
-        CONFIG-=app_bundle
+    message(Building on a MAC)
+
+    CONFIG += c++11
+    QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++
+
+    QMAKE_LFLAGS += -F$$(LIBQWT_HOME)
+    LIBS += -F$$(LIBQWT_HOME) -framework qwt
+    INCLUDEPATH += $$(LIBQWT_HEADERS)
+    DEPENDPATH += $$replace(LIBQWT_HOME, lib, )
+
+    INCLUDEPATH += /usr/local/Cellar/python3/3.6.0/Frameworks/Python.framework/Versions/3.6/Headers/
+    LIBS += -L/usr/local/Cellar/python3/3.6.0/Frameworks/Python.framework/Versions/3.6/lib/ -lpython3.6
+
+    CONFIG-=app_bundle
 }
 
 # QWT library and header files
@@ -158,6 +164,5 @@ FORMS    += \
     evaluationtool.ui
 
 # Additional Files:
-# scripts (DRAMSys/analyzer/scripts)
 include(scripts/scripts.pri)
 

DRAMSys/analyzer/traceanalyzer.cpp

@@ -93,9 +93,14 @@ TraceAnalyzer::~TraceAnalyzer()
 
 void TraceAnalyzer::on_actionOpen_triggered()
 {
-    QStringList paths = QFileDialog::getOpenFileNames(this,tr("Open Tracefile"),"",tr("Tracefile(*.tdb)"));
+    QStringList paths = QFileDialog::getOpenFileNames(this,
+                                                      tr("Open Tracefile"),
+                                                      "../simulator/",
+                                                      tr("Tracefile (*.tdb)"));
     if(paths.isEmpty())
+    {
         return;
+    }
 
     for(const QString &path: paths)
     {

DRAMSys/pct/buildDRAMSys.sh

@@ -0,0 +1,9 @@
+#!/bin/sh
+
+JOBS=$(nproc --all)
+
+rm -rf lib
+mkdir lib
+cd lib
+DRAMSYS_PCT=true qmake ../../simulator/library.pro
+DRAMSYS_PCT=true make -j$JOBS

DRAMSys/pct/createPlatform.tcl

@@ -0,0 +1,82 @@
+#!/usr/bin/tclsh
+#
+# Copyright (c) 2017, University of Kaiserslautern
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+#    this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+#    contributors may be used to endorse or promote products derived from
+#    this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors:
+#    Matthias Jung
+
+# Setup PCT:
+::pct::open_library $env(COWAREHOME)/pc/TLM2_PROTOCOLS/ConvergenSC/TLM2_PROTOCOLS.xml
+::pct::clear_systemc_defines
+::pct::clear_systemc_include_path
+
+# Import Dummy Module:
+::pct::set_import_protocol_generation_flag true
+::pct::set_update_existing_encaps_flag true
+::pct::set_dynamic_port_arrays_flag true
+::pct::set_import_scml_properties_flag true
+::pct::load_all_modules "--set-category" "dummy.h"
+::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
+
+# Add DRAMSys Library // ../[glob -type d ../../build*]/simulator/
+::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSys drampower"
+::pct::set_simulation_build_project_setting Debug {Library Search Paths} [concat ../lib/ /usr/lib64/ ../../simulator/src/common/third_party/DRAMPower/src/]
+::pct::set_simulation_build_project_setting Debug {Defined Symbols} SC_INCLUDE_DYNAMIC_PROCESSES=1
+
+# Disable Fast Linking and Caching and Elaboration
+::pct::set_simulation_build_project_setting Debug {Cache Objects} false
+::pct::set_simulation_build_project_setting Debug {Fast Linking} false
+::scsh::build-options -skip-elab on
+### TODO: count number of cores:
+::pct::set_simulation_build_project_setting Debug {Make Jobs} 16 
+
+# Configure DDR3 Example:
+::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../simulator/resources/
+::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../simulator/resources/simulations/ddr3-example.xml
+
+# Build Rest of the Example system:
+::pct::open_library "GFRBM"
+::pct::create_instance GFRBM:GFRBM_TLM2 /HARDWARE i_GFRBM_TLM2 GFRBM_TLM2 GFRBM_TLM2()
+::pct::create_connection C /HARDWARE /HARDWARE/i_GFRBM_TLM2/INIT_SOCKET /HARDWARE/i_DRAMSys/tSocket
+::pct::open_library "GenericIPlib"
+::pct::create_instance GenericIPlib:ClockGenerator /HARDWARE i_ClockGenerator GIPL_CLK {GIPL_CLK(period, period_unit, duty_cycle, start_time, start_time_unit, posedge_first)}
+::pct::create_connection C_1 /HARDWARE /HARDWARE/i_ClockGenerator/CLK /HARDWARE/i_GFRBM_TLM2/CLK
+
+# Configure GFRBM:
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Scml Properties} InputFile ../../simulator/resources/traces/pct.stl
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_IN_IRQ 0
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_OUT_IRQ 0
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Extra properties} /all_encaps/LogFile foo.log
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Extra properties} /all_encaps/DebugLevel 6
+
+# Design:
+::pct::set_background_color_rgb /HARDWARE/i_DRAMSys 113 200 55 255
+

DRAMSys/pct/dummy.h

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2017, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Matthias Jung
+ */
+
+#ifndef DRAMSYS_H_
+#define DRAMSYS_H_
+
+#include <string>
+#include <systemc>
+#include <tlm>
+
+#include <tlm_utils/multi_passthrough_target_socket.h>
+
+
+/**
+ * This is just a dummy module. Platform Architect is not able to parse the
+ * real module...
+ */
+
+class DRAMSys: public sc_module
+{
+public:
+    tlm_utils::multi_passthrough_target_socket<DRAMSys> tSocket;
+
+    sc_event terminateSimulation;
+
+    SC_HAS_PROCESS(DRAMSys);
+    DRAMSys(sc_module_name name,
+            string simulationToRun,
+            string pathToResources);
+};
+
+#endif /* SIMULATIONMANAGER_H_ */
+

DRAMSys/simulator/library.pro

@@ -0,0 +1,208 @@
+TARGET = DRAMSys
+
+TEMPLATE = lib
+CONFIG += staticlib
+CONFIG += console
+CONFIG -= app_bundle
+CONFIG -= qt
+
+system(cd ../../DRAMSys/simulator/src/common/third_party/DRAMPower; make src/libdrampower.a;)
+
+systemc_home = $$(SYSTEMC_HOME)
+isEmpty(systemc_home) {
+    systemc_home = /opt/systemc
+}
+
+# Check if PCT's SystemC should be used?
+dramsys_pct = $$(DRAMSYS_PCT)
+isEmpty(dramsys_pct) {
+    dramsys_pct = false
+}
+
+$$eval(dramsys_pct) {
+    # PCT:
+    message(PCT Simulation Feature Enabled)
+    systemc_home = /software/Synopsys_CoWare/K-2015.12-SP1/SLS/linux/common
+    INCLUDEPATH += $${systemc_home}/include/tlm
+
+    DEFINES += DRAMSYS_PCT
+}
+
+message(SystemC home is $${systemc_home})
+
+systemc_target_arch = $$(SYSTEMC_TARGET_ARCH)
+isEmpty(systemc_target_arch) {
+    systemc_target_arch = linux64
+}
+message(SystemC target architecture is $${systemc_target_arch})
+
+INCLUDEPATH += $${systemc_home}/include
+
+INCLUDEPATH += src/common/third_party/DRAMPower/src
+INCLUDEPATH += src/common/third_party/DRAMPower/src/libdrampower
+
+DEFINES += TIXML_USE_STL
+DEFINES += SC_INCLUDE_DYNAMIC_PROCESSES
+
+unix:!macx {
+        QMAKE_CXXFLAGS += -std=c++11 -O0 -g
+}
+
+macx: {
+        CONFIG += c++11
+        QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++ -O0 -g
+}
+
+QMAKE_CXXFLAGS += -isystem $${systemc_home}/include
+
+SOURCES += \
+    src/common/third_party/tinyxml2/tinyxml2.cpp \
+    src/common/xmlAddressdecoder.cpp \
+    src/common/Utils.cpp \
+    src/common/TlmRecorder.cpp \
+    src/common/dramExtension.cpp \
+    src/common/DebugManager.cpp \
+    src/controller/core/configuration/Configuration.cpp \
+    src/controller/core/powerdown/PowerDownManagerTimeout.cpp \
+    src/controller/core/powerdown/PowerDownManagerBankwise.cpp \
+    src/controller/core/powerdown/PowerDownManager.cpp \
+    src/controller/scheduler/ThreadLoad.cpp \
+    src/controller/scheduler/PARBS.cpp \
+    src/controller/scheduler/Fr_Fcfs.cpp \
+    src/controller/scheduler/Fifo.cpp \
+    src/controller/core/refresh/RefreshManagerBankwise.cpp \
+    src/controller/core/refresh/RefreshManager.cpp \
+    src/controller/core/scheduling/checker/WriteChecker.cpp \
+    src/controller/core/scheduling/checker/RefreshChecker.cpp \
+    src/controller/core/scheduling/checker/ReadChecker.cpp \
+    src/controller/core/scheduling/checker/PrechargeChecker.cpp \
+    src/controller/core/scheduling/checker/PrechargeAllChecker.cpp \
+    src/controller/core/scheduling/checker/PowerDownChecker.cpp \
+    src/controller/core/scheduling/checker/ActivateChecker.cpp \
+    src/controller/core/scheduling/ScheduledCommand.cpp \
+    src/controller/core/TimingCalculation.cpp \
+    src/controller/core/Slots.cpp \
+    src/controller/core/ControllerCore.cpp \
+    src/simulation/MemoryManager.cpp \
+    src/simulation/TemperatureController.cpp \
+    src/controller/scheduler/readwritegrouper.cpp \
+    src/controller/core/configuration/ConfigurationLoader.cpp \
+    src/controller/core/powerdown/NoPowerDown.cpp \
+    src/controller/Command.cpp \
+    src/controller/ControllerState.cpp \
+    src/controller/RowBufferStates.cpp \
+    src/controller/scheduler/IScheduler.cpp \
+    src/controller/scheduler/FifoStrict.cpp \
+    src/error/errormodel.cpp \
+    src/controller/Controller.cpp \
+    src/simulation/TracePlayer.cpp \
+    src/simulation/StlPlayer.cpp \
+    src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp \
+    src/simulation/TraceSetup.cpp \
+    src/simulation/DRAMSys.cpp \
+    src/simulation/Setup.cpp
+
+HEADERS += \
+    src/common/third_party/tinyxml2/tinyxml2.h \
+    src/common/xmlAddressdecoder.h \
+    src/common/Utils.h \
+    src/common/TlmRecorder.h \
+    src/common/tlm2_base_protocol_checker.h \
+    src/common/protocol.h \
+    src/common/dramExtension.h \
+    src/common/DebugManager.h \
+    src/controller/core/configuration/Configuration.h \
+    src/controller/core/powerdown/PowerDownManagerTimeout.h \
+    src/controller/core/powerdown/PowerDownManagerBankwise.h \
+    src/controller/core/powerdown/PowerDownManager.h \
+    src/controller/scheduler/ThreadLoad.h \
+    src/controller/scheduler/PARBS.h \
+    src/controller/scheduler/Fr_Fcfs.h \
+    src/controller/scheduler/Fifo.h \
+    src/controller/Controller.h \
+    src/controller/core/refresh/RefreshManagerBankwise.h \
+    src/controller/core/refresh/RefreshManager.h \
+    src/controller/core/refresh/IRefreshManager.h \
+    src/controller/core/scheduling/checker/WriteChecker.h \
+    src/controller/core/scheduling/checker/RefreshChecker.h \
+    src/controller/core/scheduling/checker/ReadChecker.h \
+    src/controller/core/scheduling/checker/PrechargeChecker.h \
+    src/controller/core/scheduling/checker/PrechargeAllChecker.h \
+    src/controller/core/scheduling/checker/PowerDownChecker.h \
+    src/controller/core/scheduling/checker/ICommandChecker.h \
+    src/controller/core/scheduling/checker/ActivateChecker.h \
+    src/controller/core/scheduling/Trigger.h \
+    src/controller/core/scheduling/ScheduledCommand.h \
+    src/controller/core/TimingCalculation.h \
+    src/controller/core/Slots.h \
+    src/controller/core/ControllerCore.h \
+    src/simulation/TracePlayer.h \
+    src/simulation/MemoryManager.h \
+    src/simulation/Dram.h \
+    src/simulation/Arbiter.h \
+    src/common/libDRAMPower.h \
+    src/controller/scheduler/readwritegrouper.h \
+    src/simulation/ReorderBuffer.h \
+    src/controller/core/configuration/MemSpec.h \
+    src/controller/core/configuration/thermalSimConfig.h \
+    src/simulation/StlPlayer.h \
+    src/simulation/TracePlayerListener.h \
+    src/simulation/TraceGenerator.h \
+    src/simulation/TemperatureController.h \
+    src/controller/core/powerdown/NoPowerDown.h \
+    src/controller/Command.h \
+    src/controller/RowBufferStates.h \
+    src/controller/ControllerState.h \
+    src/controller/core/powerdown/IPowerDownManager.h \
+    src/controller/scheduler/IScheduler.h \
+    src/controller/scheduler/FifoStrict.h \
+    src/controller/IController.h \
+    src/controller/core/configuration/ConfigurationLoader.h \
+    src/error/errormodel.h \
+    src/simulation/ExampleInitiator.h \
+    src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h \
+    src/simulation/TraceSetup.h \
+    src/simulation/DRAMSys.h \
+    src/simulation/Setup.h
+
+thermalsim = $$(THERMALSIM)
+isEmpty(thermalsim) {
+    thermalsim = false
+}
+
+$$eval(thermalsim) {
+    message(Thermal Simulation Feature Enabled)
+
+    libthreed_ice_home = $$(LIBTHREED_ICE_HOME)
+    isEmpty(libthreed_ice_home) {
+    	libthreed_ice_home = /opt/3D-ICE/
+    }
+    message(LIBTHREED_ICE_HOME path is $${libthreed_ice_home})
+
+    libsuperlu_home = $$(LIBSUPERLU_HOME)
+    isEmpty(libsuperlu_home) {
+    	libsuperlu_home = /opt/SuperLU_4.3/
+    }
+    message(LIBSUPERLU_HOME path is $${libthreed_ice_home})
+
+    LIBS += -L$${libthreed_ice_home}/lib -lthreed-ice-2.2.4
+    LIBS += -L$${libsuperlu_home}/lib -lsuperlu_4.3
+    LIBS += -lblas
+    message(Libraries: $${LIBS})
+
+    INCLUDEPATH += $${libthreed_ice_home}/include
+    INCLUDEPATH += $${libsuperlu_home}/SRC
+    INCLUDEPATH += $${systemc_home}/include
+    message(Include paths: $${INCLUDEPATH})
+
+    QMAKE_CXXFLAGS += -DTHERMALSIM
+    message(Compiler flags: $${QMAKE_CXXFLAGS})
+
+} else {
+    message(Thermal Simulation Feature Disabled)
+}
+
+# Additional Files:
+# resources folder (DRAMSys/simulator/resources)
+include(resources/resources.pri)
+

DRAMSys/simulator/resources/configs/mcconfigs/_old/fr_fcfs_bankwise.xml

@@ -1,15 +0,0 @@
-<memspec>
-  <mcconfig>
-    <parameter id="bankwiseLogic" type="bool" value="1" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="0" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
-    <parameter id="scheduler" type="string" value="FR_FCFS" />
-    <parameter id="capsize" type="uint" value="5" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="3" />
-    
-    <parameter id="databaseRecordingEnabled" type="bool" value="1" />
-  </mcconfig>
-</memspec>

DRAMSys/simulator/resources/configs/mcconfigs/_old/fr_fcfs_unaware.xml

@@ -1,15 +0,0 @@
-<memspec>
-  <mcconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="0" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
-    <parameter id="scheduler" type="string" value="FR_FCFS" />
-    <parameter id="capsize" type="uint" value="5" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="3" />
-  
-    <parameter id="databaseRecordingEnabled" type="bool" value="1" />
-  </mcconfig>
-</memspec>

DRAMSys/simulator/resources/configs/mcconfigs/_old/grouper.xml

@@ -1,14 +0,0 @@
-<memspec>
-  <mcconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="1" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
-    <parameter id="scheduler" type="string" value="Grouper" />
-    <parameter id="capsize" type="uint" value="5" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="100" />
-    <parameter id="databaseRecordingEnabled" type="bool" value="1" />
-  </mcconfig>
-</memspec>

DRAMSys/simulator/resources/configs/mcconfigs/_old/par_bs.xml

@@ -1,14 +0,0 @@
-<memspec>
-  <mcconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="1" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
-    <parameter id="scheduler" type="string" value="PAR_BS" />
-    <parameter id="capsize" type="uint" value="8" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="3" />
-    <parameter id="databaseRecordingEnabled" type="bool" value="0" />
-  </mcconfig>
-</memspec>

DRAMSys/simulator/resources/configs/mcconfigs/_old/par_bs_unaware.xml

@@ -1,14 +0,0 @@
-<memspec>
-  <mcconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="0" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
-    <parameter id="scheduler" type="string" value="PAR_BS" />
-    <parameter id="capsize" type="uint" value="8" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="3" />  
-    <parameter id="databaseRecordingEnabled" type="bool" value="1" />
-  </mcconfig>
-</memspec>

DRAMSys/simulator/resources/configs/mcconfigs/fifo.xml

@@ -4,11 +4,17 @@
     <MaxNrOfTransactions value="8" />
     <Scheduler value="FIFO" />
     <Capsize value="5" />
+    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
     <PowerDownMode value="NoPowerDown" />
     <PowerDownTimeout value="100" />
     <!-- Error Modelling -->
     <ErrorChipSeed value="42" />
     <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <!--3 Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel)-->
+    <!-- Modes:
+        - NoStorage,
+        - Store (store data without errormodel),
+        - ErrorModel (store data with errormodel)
+    -->
     <StoreMode value="NoStorage" />
+    <ControllerCoreDisableRefresh value="0"/>
 </mcconfig>

DRAMSys/simulator/resources/configs/mcconfigs/fifoStrict.xml

@@ -4,12 +4,17 @@
     <MaxNrOfTransactions value="8" />
     <Scheduler value="FIFO_STRICT" />
     <Capsize value="5" />
-    <PowerDownMode value="Staggered" /> <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <PowerDownMode value="NoPowerDown" />
     <PowerDownTimeout value="100" />
     <!-- Error Modelling -->
     <ErrorChipSeed value="42" />
     <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
+    <!-- Modes:
+        - NoStorage,
+        - Store (store data without errormodel),
+        - ErrorModel (store data with errormodel)
+    -->
     <StoreMode value="NoStorage" />
+    <ControllerCoreDisableRefresh value="0"/>
 </mcconfig>
-

DRAMSys/simulator/resources/configs/mcconfigs/fr_fcfs.xml

@@ -4,19 +4,18 @@
     <MaxNrOfTransactions value="8" />
     <Scheduler value="FR_FCFS" />
     <Capsize value="5" />
+    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
     <PowerDownMode value="NoPowerDown" />
     <PowerDownTimeout value="100" />
     <!-- Error Model: -->
     <ErrorChipSeed value="42" />
     <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
-    <StoreMode value="NoStorage" />
-    <!--
-    <ReadWriteGrouping value="false" />
-    <ModelStorage value="false" />
-    <ModelErrorInjection value="false" />
-    <ReorderBuffer value="false" />
-    <DatabaseRecording value="true" />
+    <!-- Modes:
+        - NoStorage,
+        - Store (store data without errormodel),
+        - ErrorModel (store data with errormodel)
     -->
+    <StoreMode value="NoStorage" />
+    <ControllerCoreDisableRefresh value="0"/>
 </mcconfig>
 

DRAMSys/simulator/resources/configs/mcconfigs/par_bs.xml

@@ -4,12 +4,17 @@
     <MaxNrOfTransactions value="8" />
     <Scheduler value="PAR_BS" />
     <Capsize value="5" />
-    <PowerDownMode value="NoPowerDown" /> <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <PowerDownMode value="NoPowerDown" />
     <PowerDownTimeout value="100" />
     <!-- Error Modelling -->
     <ErrorChipSeed value="42" />
     <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
+    <!-- Modes:
+        - NoStorage,
+        - Store (store data without errormodel),
+        - ErrorModel (store data with errormodel)
+    -->
     <StoreMode value="NoStorage" />
+    <ControllerCoreDisableRefresh value="0"/>
 </mcconfig>
-

DRAMSys/simulator/resources/configs/simulator/ddr3-single-device.xml

@@ -0,0 +1,13 @@
+<simconfig>
+    <SimulationName value="wideio" />
+    <Debug value="0" />
+    <DatabaseRecording value="1" />
+    <PowerAnalysis value="1" />
+    <EnableWindowing value = "1" />
+    <WindowSize value="1000" />
+    <ThermalSimulation value="0"/>
+    <SimulationProgressBar value="1"/>
+    <NumberOfMemChannels value="1"/>
+    <NumberOfDevicesOnDIMM value = "8" />
+    <CheckTLM2Protocol value = "0" />
+</simconfig>

DRAMSys/simulator/resources/configs/simulator/ddr3.xml

@@ -0,0 +1,13 @@
+<simconfig>
+    <SimulationName value="ddr3" />
+    <Debug value="0" />
+    <DatabaseRecording value="1" />
+    <PowerAnalysis value="1" />
+    <EnableWindowing value = "1" />
+    <WindowSize value="1000" />
+    <ThermalSimulation value="0"/>
+    <SimulationProgressBar value="1"/>
+    <NumberOfMemChannels value="1"/>
+    <NumberOfDevicesOnDIMM value = "8" />
+    <CheckTLM2Protocol value = "0" />
+</simconfig>

DRAMSys/simulator/resources/configs/simulator/wideio.xml

@@ -0,0 +1,14 @@
+<simconfig>
+    <SimulationName value="wideio" />
+    <Debug value="0" />
+    <DatabaseRecording value="1" />
+    <PowerAnalysis value="1" />
+    <EnableWindowing value = "1" />
+    <WindowSize value="1000" />
+    <ThermalSimulation value="0"/>
+    <SimulationProgressBar value="1"/>
+    <NumberOfMemChannels value="1"/>
+    <NumberOfDevicesOnDIMM value = "1" />
+    <CheckTLM2Protocol value = "0" />
+</simconfig>
+

DRAMSys/simulator/resources/configs/simulator/wideio_thermal.xml

@@ -0,0 +1,14 @@
+<simconfig>
+    <SimulationName value="wideio" />
+    <Debug value="0" />
+    <DatabaseRecording value="1" />
+    <PowerAnalysis value="1" />
+    <EnableWindowing value = "1" />
+    <WindowSize value="1000" />
+    <ThermalSimulation value="1"/>
+    <SimulationProgressBar value="1"/>
+    <NumberOfMemChannels value="1"/>
+    <NumberOfDevicesOnDIMM value = "1" />
+    <CheckTLM2Protocol value = "0" />
+</simconfig>
+

DRAMSys/simulator/resources/configs/thermalsim/config.xml

@@ -0,0 +1,14 @@
+<!-- Temperature Simulator Configuration (used for all simulation setups) -->
+<thermalsimconfig>
+    <TemperatureScale value="Celsius" />
+    <StaticTemperatureDefaultValue value="89" />
+    <ThermalSimPeriod value="100" />
+    <ThermalSimUnit value="us" />
+    <PowerInfoFile value="powerInfo.xml"/>
+    <IceServerIp value="127.0.0.1" />
+    <IceServerPort value="11880" />
+    <SimPeriodAdjustFactor value="10" />
+    <NPowStableCyclesToIncreasePeriod value="5" />
+    <GenerateTemperatureMap value="1" />
+    <GeneratePowerMap value="1" />
+</thermalsimconfig>

DRAMSys/simulator/resources/resources.pri

@@ -1,12 +1,11 @@
 # Relative paths to "DRAMSys/simulator" because this file is included in
 # "DRAMSys/simulator/simulator.pro"
 
-# simulation files
-OTHER_FILES += resources/simulations/sim-batch.xml    
+# Simulation Files
 OTHER_FILES += resources/simulations/ddr3-example.xml
 OTHER_FILES += resources/simulations/ddr3-single-device.xml
 
-# scripts
+# Scripts
 OTHER_FILES += resources/scripts/address_scrambler.pl
 OTHER_FILES += resources/scripts/createTraceDB.sql
 OTHER_FILES += resources/scripts/stride_detection.pl
@@ -15,7 +14,7 @@ OTHER_FILES += resources/scripts/video_rendering/temperatur.job.pl
 OTHER_FILES += resources/scripts/video_rendering/temperatur.pl
 OTHER_FILES += resources/scripts/video_rendering/Makefile
 
-# trace files
+# Trace Files
 OTHER_FILES += resources/traces/chstone-aes_32.stl
 OTHER_FILES += resources/traces/test2.stl
 OTHER_FILES += resources/traces/voco2.stl
@@ -53,22 +52,16 @@ OTHER_FILES += resources/traces/ddr3_example.stl
 OTHER_FILES += resources/traces/ddr3_single_dev_example.stl
 OTHER_FILES += resources/traces/ddr3_SAMSUNG_M471B5674QH0_DIMM_example.stl
 
-# mcconfigs
+# Mempry Controller Configs
 OTHER_FILES += resources/configs/mcconfigs/fifoStrict.xml
 OTHER_FILES += resources/configs/mcconfigs/fifo.xml
-OTHER_FILES += resources/configs/mcconfigs/_old/par_bs_unaware.xml
-OTHER_FILES += resources/configs/mcconfigs/_old/fr_fcfs_unaware.xml
-OTHER_FILES += resources/configs/mcconfigs/_old/grouper.xml
-OTHER_FILES += resources/configs/mcconfigs/_old/par_bs.xml
-OTHER_FILES += resources/configs/mcconfigs/_old/fr_fcfs_bankwise.xml
 OTHER_FILES += resources/configs/mcconfigs/fr_fcfs.xml
 OTHER_FILES += resources/configs/mcconfigs/par_bs.xml
 
-# memspecs
+# Memspecs
 OTHER_FILES += resources/configs/memspecs/memspec.dtd
 OTHER_FILES += resources/configs/memspecs/MatzesWideIO.xml
 OTHER_FILES += resources/configs/memspecs/DDR4.xml
-OTHER_FILES += resources/configs/memspecs/WideIO.xml
 OTHER_FILES += resources/configs/memspecs/MatzesWideIO-short.xml
 OTHER_FILES += resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml
 OTHER_FILES += resources/configs/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml
@@ -131,3 +124,12 @@ OTHER_FILES += resources/configs/thermalsim/mem.flp
 OTHER_FILES += resources/configs/thermalsim/powerInfo.xml
 OTHER_FILES += resources/configs/thermalsim/stack.stk
 
+DISTFILES += \
+    $$PWD/configs/thermalsim/config.xml \
+    $$PWD/configs/simulator/wideio.xml \
+    $$PWD/configs/simulator/ddr3.xml \
+    $$PWD/configs/memspecs/wideio.xml \
+    $$PWD/configs/simulator/ddr3-single-device.xml \
+    $$PWD/simulations/wideio-example.xml \
+    $$PWD/configs/simulator/wideio_thermal.xml
+

DRAMSys/simulator/resources/simulations/ddr3-example.xml

@@ -1,63 +1,23 @@
 <simulation>
-    <!-- General Simulator Configuration (used for all simulation setups) -->
-    <simconfig>
-        <Debug value="0" />
-        <DatabaseRecording value="1" />
-        <PowerAnalysis value="1" />
-        <EnableWindowing value = "1" />
-        <WindowSize value="100" />
-        <NumberOfTracePlayers value="1"/>
-        <NumberOfMemChannels value="1"/>
-        <ControllerCoreDisableRefresh value="0"/>
-        <ThermalSimulation value="0"/>
-        <SimulationProgressBar value="1"/>
-        <NumberOfDevicesOnDIMM value = "8" />
-    </simconfig>
-
-    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
-    <thermalsimconfig>
-        <TemperatureScale value="Celsius" />
-        <StaticTemperatureDefaultValue value="89" />
-        <ThermalSimPeriod value="100" />
-        <ThermalSimUnit value="us" />
-        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
-        <IceServerIp value="127.0.0.1" />
-        <IceServerPort value="11880" />
-        <SimPeriodAdjustFactor value="10" />
-        <NPowStableCyclesToIncreasePeriod value="5" />
-        <GenerateTemperatureMap value="1" />
-        <GeneratePowerMap value="1" />
-    </thermalsimconfig>
-
-
-    <!-- Memory Device Specification: Which Device is on our simulated DDR3 DIMM -->
-    <memspecs>
-        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
-    </memspecs>
-
+    <!-- Configuration for the DRAMSys Simulator -->
+    <simconfig src="ddr3.xml" />
+    <!-- Temperature Simulator Configuration -->
+    <thermalconfig src="config.xml" />
+    <!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
+    <memspec src="MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
     <!-- Addressmapping Configuration of the Memory Controller -->
-    <addressmappings>
-        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml"></addressmapping>
-    </addressmappings>
-
-
-    <!-- Memory Controller Configuration -->
-    <mcconfigs>
-        <!-- Without Scheduler FIFO -->
-        <mcconfig src="../../DRAMSys/simulator/resources/configs/mcconfigs/fifoStrict.xml"/>
-        <!-- With FR-FCFS Scheduler -->
-        <!--<mcconfig src="../../DRAMSys/simulator/resources/configs/mcconfigs/fr_fcfs.xml"/>-->
-    </mcconfigs>
-
-    <tracesetups>
-        <tracesetup id="fifo">
-            <!--
-            This device mimics an image processing application
-            running on an FPGA with 200 Mhz.
-            -->
-            <device clkMhz="200">ddr3_example.stl</device>
-        </tracesetup>
-    </tracesetups>
-
+    <addressmapping src="am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml"></addressmapping>
+    <!-- Memory Controller Configuration: -->
+    <mcconfig src="fifoStrict.xml"/>
+    <!--
+    The following trace setup is only used in standalone mode.
+    In library mode e.g. in Platform Architect the trace setup is ignored.
+    -->
+    <tracesetup>
+        <!--
+        This device mimics an image processing application
+        running on an FPGA with 200 Mhz.
+        -->
+        <device clkMhz="200">ddr3_example.stl</device>
+    </tracesetup>
 </simulation>
-

DRAMSys/simulator/resources/simulations/ddr3-single-device.xml

@@ -1,58 +1,23 @@
 <simulation>
-    <!-- General Simulator Configuration (used for all simulation setups) -->
-    <simconfig>
-        <Debug value="0" />
-        <DatabaseRecording value="1" />
-        <PowerAnalysis value="1" />
-        <EnableWindowing value = "1" />
-        <WindowSize value="100" />
-        <NumberOfTracePlayers value="1"/>
-        <NumberOfMemChannels value="1"/>
-        <ControllerCoreDisableRefresh value="0"/>
-        <ThermalSimulation value="0"/>
-        <SimulationProgressBar value="1"/>
-        <NumberOfDevicesOnDIMM value = "1" />
-    </simconfig>
-
-    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
-    <thermalsimconfig>
-        <TemperatureScale value="Celsius" />
-        <StaticTemperatureDefaultValue value="89" />
-        <ThermalSimPeriod value="100" />
-        <ThermalSimUnit value="us" />
-        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
-        <IceServerIp value="127.0.0.1" />
-        <IceServerPort value="11880" />
-        <SimPeriodAdjustFactor value="10" />
-        <NPowStableCyclesToIncreasePeriod value="5" />
-        <GenerateTemperatureMap value="1" />
-        <GeneratePowerMap value="1" />
-    </thermalsimconfig>
-
-
-    <!-- Memory Device Specification: Which Device is on our simulated DDR3 DIMM -->
-    <memspecs>
-        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
-    </memspecs>
-
+    <!-- Configuration for the DRAMSys Simulator -->
+    <simconfig src="ddr3-single-device.xml" />
+    <!-- Temperature Simulator Configuration -->
+    <thermalconfig src="config.xml" />
+    <!-- Memory Device Specification: Which Device is simulated -->
+    <memspec src="MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
     <!-- Addressmapping Configuration of the Memory Controller -->
-    <addressmappings>
-        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml"></addressmapping>
-    </addressmappings>
-
-
-    <!-- Memory Controller Configuration -->
-    <mcconfigs>
-        <!-- Without Scheduler FIFO -->
-        <mcconfig src="../../DRAMSys/simulator/resources/configs/mcconfigs/fifoStrict.xml"/>
-    </mcconfigs>
-
-    <tracesetups>
-        <tracesetup id="ddr3_single_dev_1Gbx8_p1KB_brc">
-            <!-- The bus master device runs @ 200 MHz -->
-            <device clkMhz="200">ddr3_single_dev_example.stl</device>
-        </tracesetup>
-    </tracesetups>
-
+    <addressmapping src="am_ddr3_1Gbx8_p1KB_brc.xml"></addressmapping>
+    <!-- Memory Controller Configuration: -->
+    <mcconfig src="fifoStrict.xml"/>
+    <!--
+    The following trace setup is only used in standalone mode.
+    In library mode e.g. in Platform Architect the trace setup is ignored.
+    -->
+    <tracesetup>
+        <!--
+        This device mimics an image processing application
+        running on an FPGA with 200 Mhz.
+        -->
+        <device clkMhz="200">ddr3_single_dev_example.stl</device>
+    </tracesetup>
 </simulation>
-

DRAMSys/simulator/resources/simulations/sim-batch.xml

@@ -1,52 +0,0 @@
-<simulation>
-    <!-- General Simulator Configuration (used for all simulation setups) -->
-    <simconfig>
-        <Debug value="0" />
-        <DatabaseRecording value="0" />
-        <PowerAnalysis value="0" />
-        <EnableWindowing value = "0" />
-        <WindowSize value="1000" />
-        <NumberOfTracePlayers value="1"/>
-        <NumberOfMemChannels value="4"/>
-        <ControllerCoreDisableRefresh value="0"/>
-        <ThermalSimulation value="0"/>
-        <SimulationProgressBar value="0"/>
-        <NumberOfDevicesOnDIMM value = "1" />
-        <CheckTLM2Protocol value = "0" />
-    </simconfig>
-
-    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
-    <thermalsimconfig>
-        <TemperatureScale value="Celsius" />
-        <StaticTemperatureDefaultValue value="89" />
-        <ThermalSimPeriod value="100" />
-        <ThermalSimUnit value="us" />
-        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
-        <IceServerIp value="127.0.0.1" />
-        <IceServerPort value="11880" />
-        <SimPeriodAdjustFactor value="10" />
-        <NPowStableCyclesToIncreasePeriod value="5" />
-        <GenerateTemperatureMap value="1" />
-        <GeneratePowerMap value="1" />
-    </thermalsimconfig>
-
-    <memspecs>
-        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
-    </memspecs>
-
-    <addressmappings>
-        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
-    </addressmappings>
-
-    <mcconfigs>
-        <mcconfig src="../../DRAMSys/simulator/resources/configs/mcconfigs/fifoStrict.xml"/>
-    </mcconfigs>
-
-    <tracesetups>
-        <tracesetup id="fifo">
-            <device clkMhz="200">chstone-adpcm_32.stl</device>
-        </tracesetup>
-    </tracesetups>
-
-</simulation>
-

DRAMSys/simulator/resources/simulations/wideio-example.xml

@@ -0,0 +1,22 @@
+<simulation>
+    <!-- Configuration for the DRAMSys Simulator -->
+    <simconfig src="wideio.xml" />
+    <!-- Temperature Simulator Configuration -->
+    <thermalconfig src="config.xml" />
+    <!-- Memory Device Specification: Which Device is used for Wide I/O -->
+    <memspec src="WideIO.xml"></memspec>
+    <!-- Addressmapping Configuration of the Memory Controller -->
+    <addressmapping src="am_wideio.xml"></addressmapping>
+    <!-- Memory Controller Configuration -->
+    <mcconfig src="fifoStrict.xml"/>
+    <!--
+    The following trace setup is only used in standalone mode.
+    In library mode e.g. in Platform Architect the trace setup is ignored.
+    -->
+    <tracesetup>
+        <!--
+        This device mimics an processor running at 1 GHz.
+        -->
+        <device clkMhz="1000">chstone-adpcm_32.stl</device>
+    </tracesetup>
+</simulation>

DRAMSys/simulator/simulator.pro

@@ -1,12 +1,10 @@
-TARGET = dramSys
+TARGET = DRAMSys
 
 TEMPLATE = app
 CONFIG += console
 CONFIG -= app_bundle
 CONFIG -= qt
 
-system(cd ../../DRAMSys/simulator/src/common/third_party/DRAMPower; make src/libdrampower.a;)
-
 systemc_home = $$(SYSTEMC_HOME)
 isEmpty(systemc_home) {
     systemc_home = /opt/systemc
@@ -17,35 +15,11 @@ systemc_target_arch = $$(SYSTEMC_TARGET_ARCH)
 isEmpty(systemc_target_arch) {
     systemc_target_arch = linux64
 }
+
 message(SystemC target architecture is $${systemc_target_arch})
 
-QMAKE_RPATHDIR += $${systemc_home}/lib-$${systemc_target_arch}
-message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
-
-libboost_home = $$(LIBBOOST_HOME)
-isEmpty(libboost_home) {
-    libboost_home = /opt/boost/lib
-}
-message(LIBBOOST home is $${libboost_home})
-
-LIBS += -L$${systemc_home}/lib-$${systemc_target_arch} -lsystemc
-LIBS += -L$${libboost_home} -lboost_filesystem -lboost_system
-
-
-LIBS += -lsqlite3
-LIBS += -lpthread
-LIBS += -L../../DRAMSys/simulator/src/common/third_party/DRAMPower/src/ -ldrampower
-
-libboost_headers = $$(LIBBOOST_HEADERS)
-isEmpty(libboost_headers) {
-    libboost_headers = /opt/boost/include
-}
-message(Getting LIBOOST headers from $${libboost_headers})
-
-INCLUDEPATH += $${systemc_home}/include
-INCLUDEPATH += $${libboost_headers}
-INCLUDEPATH += src/common/third_party/DRAMPower/src
-INCLUDEPATH += src/common/third_party/DRAMPower/src/libdrampower
+#QMAKE_RPATHDIR += $${systemc_home}/lib-$${systemc_target_arch}
+#message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
 
 DEFINES += TIXML_USE_STL
 DEFINES += SC_INCLUDE_DYNAMIC_PROCESSES
@@ -59,156 +33,14 @@ macx: {
         QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++ -O0 -g
 }
 
-QMAKE_CXXFLAGS += -isystem $${systemc_home}/include
-QMAKE_CXXFLAGS += -isystem $${libboost_headers}
+INCLUDEPATH += src/simulation/
+INCLUDEPATH += $${systemc_home}/include
+INCLUDEPATH += src/common/third_party/DRAMPower/src
+INCLUDEPATH += src/common/third_party/DRAMPower/src/libdrampower
 
-SOURCES += \
-    src/common/third_party/tinyxml2/tinyxml2.cpp \
-    src/common/xmlAddressdecoder.cpp \
-    src/common/Utils.cpp \
-    src/common/TlmRecorder.cpp \
-    src/common/dramExtension.cpp \
-    src/common/DebugManager.cpp \
-    src/controller/core/configuration/Configuration.cpp \
-    src/controller/core/powerdown/PowerDownManagerTimeout.cpp \
-    src/controller/core/powerdown/PowerDownManagerBankwise.cpp \
-    src/controller/core/powerdown/PowerDownManager.cpp \
-    src/controller/scheduler/ThreadLoad.cpp \
-    src/controller/scheduler/PARBS.cpp \
-    src/controller/scheduler/Fr_Fcfs.cpp \
-    src/controller/scheduler/Fifo.cpp \
-    src/controller/core/refresh/RefreshManagerBankwise.cpp \
-    src/controller/core/refresh/RefreshManager.cpp \
-    src/controller/core/scheduling/checker/WriteChecker.cpp \
-    src/controller/core/scheduling/checker/RefreshChecker.cpp \
-    src/controller/core/scheduling/checker/ReadChecker.cpp \
-    src/controller/core/scheduling/checker/PrechargeChecker.cpp \
-    src/controller/core/scheduling/checker/PrechargeAllChecker.cpp \
-    src/controller/core/scheduling/checker/PowerDownChecker.cpp \
-    src/controller/core/scheduling/checker/ActivateChecker.cpp \
-    src/controller/core/scheduling/ScheduledCommand.cpp \
-    src/controller/core/TimingCalculation.cpp \
-    src/controller/core/Slots.cpp \
-    src/controller/core/ControllerCore.cpp \
-    src/simulation/SimulationManager.cpp \
-    src/simulation/Simulation.cpp \
-    src/simulation/MemoryManager.cpp \
-    src/simulation/main.cpp \
-    src/simulation/TemperatureController.cpp \
-    src/controller/scheduler/readwritegrouper.cpp \
-    src/controller/core/configuration/ConfigurationLoader.cpp \
-    src/controller/core/powerdown/NoPowerDown.cpp \
-    src/controller/Command.cpp \
-    src/controller/ControllerState.cpp \
-    src/controller/RowBufferStates.cpp \
-    src/controller/scheduler/IScheduler.cpp \
-    src/controller/scheduler/FifoStrict.cpp \
-    src/error/errormodel.cpp \
-    src/controller/Controller.cpp \
-    src/simulation/TracePlayer.cpp \
-    src/simulation/StlPlayer.cpp \
-    src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp
-
-HEADERS += \
-    src/common/third_party/tinyxml2/tinyxml2.h \
-    src/common/xmlAddressdecoder.h \
-    src/common/Utils.h \
-    src/common/TlmRecorder.h \
-    src/common/tlm2_base_protocol_checker.h \
-    src/common/protocol.h \
-    src/common/dramExtension.h \
-    src/common/DebugManager.h \
-    src/controller/core/configuration/Configuration.h \
-    src/controller/core/powerdown/PowerDownManagerTimeout.h \
-    src/controller/core/powerdown/PowerDownManagerBankwise.h \
-    src/controller/core/powerdown/PowerDownManager.h \
-    src/controller/scheduler/ThreadLoad.h \
-    src/controller/scheduler/PARBS.h \
-    src/controller/scheduler/Fr_Fcfs.h \
-    src/controller/scheduler/Fifo.h \
-    src/controller/Controller.h \
-    src/controller/core/refresh/RefreshManagerBankwise.h \
-    src/controller/core/refresh/RefreshManager.h \
-    src/controller/core/refresh/IRefreshManager.h \
-    src/controller/core/scheduling/checker/WriteChecker.h \
-    src/controller/core/scheduling/checker/RefreshChecker.h \
-    src/controller/core/scheduling/checker/ReadChecker.h \
-    src/controller/core/scheduling/checker/PrechargeChecker.h \
-    src/controller/core/scheduling/checker/PrechargeAllChecker.h \
-    src/controller/core/scheduling/checker/PowerDownChecker.h \
-    src/controller/core/scheduling/checker/ICommandChecker.h \
-    src/controller/core/scheduling/checker/ActivateChecker.h \
-    src/controller/core/scheduling/Trigger.h \
-    src/controller/core/scheduling/ScheduledCommand.h \
-    src/controller/core/TimingCalculation.h \
-    src/controller/core/Slots.h \
-    src/controller/core/ControllerCore.h \
-    src/simulation/TracePlayer.h \
-    src/simulation/SimulationManager.h \
-    src/simulation/Simulation.h \
-    src/simulation/MemoryManager.h \
-    src/simulation/Dram.h \
-    src/simulation/Arbiter.h \
-    src/common/libDRAMPower.h \
-    src/controller/scheduler/readwritegrouper.h \
-    src/simulation/ReorderBuffer.h \
-    src/controller/core/configuration/MemSpec.h \
-    src/controller/core/configuration/thermalSimConfig.h \
-    src/simulation/StlPlayer.h \
-    src/simulation/TracePlayerListener.h \
-    src/simulation/TraceGenerator.h \
-    src/simulation/TemperatureController.h \
-    src/controller/core/powerdown/NoPowerDown.h \
-    src/controller/Command.h \
-    src/controller/RowBufferStates.h \
-    src/controller/ControllerState.h \
-    src/controller/core/powerdown/IPowerDownManager.h \
-    src/controller/scheduler/IScheduler.h \
-    src/controller/scheduler/FifoStrict.h \
-    src/controller/IController.h \
-    src/controller/core/configuration/ConfigurationLoader.h \
-    src/error/errormodel.h \
-    src/simulation/ExampleInitiator.h \
-    src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h
-
-thermalsim = $$(THERMALSIM)
-isEmpty(thermalsim) {
-    thermalsim = false
-}
-
-$$eval(thermalsim) {
-    message(Thermal Simulation Feature Enabled)
-
-    libthreed_ice_home = $$(LIBTHREED_ICE_HOME)
-    isEmpty(libthreed_ice_home) {
-    	libthreed_ice_home = /opt/3D-ICE/
-    }
-    message(LIBTHREED_ICE_HOME path is $${libthreed_ice_home})
-
-    libsuperlu_home = $$(LIBSUPERLU_HOME)
-    isEmpty(libsuperlu_home) {
-    	libsuperlu_home = /opt/SuperLU_4.3/
-    }
-    message(LIBSUPERLU_HOME path is $${libthreed_ice_home})
-
-    LIBS += -L$${libthreed_ice_home}/lib -lthreed-ice-2.2.4
-    LIBS += -L$${libsuperlu_home}/lib -lsuperlu_4.3
-    LIBS += -lblas
-    message(Libraries: $${LIBS})
-
-    INCLUDEPATH += $${libthreed_ice_home}/include
-    INCLUDEPATH += $${libsuperlu_home}/SRC
-    INCLUDEPATH += $${systemc_home}/include
-    message(Include paths: $${INCLUDEPATH})
-
-    QMAKE_CXXFLAGS += -DTHERMALSIM
-    message(Compiler flags: $${QMAKE_CXXFLAGS})
-
-} else {
-    message(Thermal Simulation Feature Disabled)
-}
-
-# Additional Files:
-# resources folder (DRAMSys/simulator/resources)
-include(resources/resources.pri)
+LIBS += -lsqlite3
+LIBS += -L$${systemc_home}/lib-$${systemc_target_arch} -lsystemc
+LIBS += libDRAMSys.a
+LIBS += ../../DRAMSys/simulator/src/common/third_party/DRAMPower/src/libdrampower.a
 
+SOURCES += src/simulation/main.cpp

DRAMSys/simulator/src/common/DebugManager.h

@@ -41,15 +41,14 @@
 #include <string>
 #include <set>
 
+#include "Utils.h"
+
 class DebugManager
 {
 public:
     ~DebugManager();
-    static inline DebugManager& getInstance()
-    {
-        static DebugManager manager;
-        return manager;
-    }
+
+    DEF_SINGLETON(DebugManager);
 
     bool writeToConsole;
     bool writeToFile;

DRAMSys/simulator/src/common/TlmRecorder.cpp

@@ -38,7 +38,6 @@
 
 #include <iostream>
 #include <algorithm>
-#include <boost/filesystem.hpp>
 
 #include "TlmRecorder.h"
 #include "protocol.h"
@@ -219,9 +218,15 @@ void TlmRecorder::Transaction::setPhaseEnd(string name, sc_time end)
 
 void TlmRecorder::openDB(std::string name)
 {
-    boost::filesystem::wpath file(name);
-    if(boost::filesystem::exists(file))
-        boost::filesystem::remove(file);
+    ifstream f(name.c_str());
+    if(f.good())
+    {
+        if(remove(name.c_str()) != 0)
+        {
+           SC_REPORT_FATAL("TlmRecorder", "Error deleting file" );
+        }
+    }
+
     if (sqlite3_open(name.c_str(), &db) != SQLITE_OK)
     {
         SC_REPORT_FATAL("Error in TraceRecorder", "Error cannot open database");

DRAMSys/simulator/src/common/Utils.cpp

@@ -44,7 +44,6 @@
 using namespace std;
 using namespace tinyxml2;
 
-
 bool TimeInterval::timeIsInInterval(sc_time time)
 {
     return (start < time && time < end);

DRAMSys/simulator/src/common/Utils.h

@@ -43,11 +43,19 @@
 #include <string>
 #include <ostream>
 #include <tlm.h>
-#include <boost/preprocessor.hpp>
 #include <iomanip>
 #include "dramExtension.h"
 #include "third_party/tinyxml2/tinyxml2.h"
 
+
+#define DEF_SINGLETON( NAME )  \
+public:                        \
+   static NAME& getInstance()  \
+   {                           \
+      static NAME _instance;   \
+      return _instance;        \
+   }
+
 //TODO : move to timing specific header
 sc_time getDistance(sc_time a, sc_time b);
 
@@ -118,45 +126,5 @@ double queryDoubleParameter(tinyxml2::XMLElement* node, std::string name);
 
 void setUpDummy(tlm::tlm_generic_payload& payload, Bank& bank);
 
-#define DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS_TOSTRING_CASE(r, data, elem)  \
-    case data::elem : return BOOST_PP_STRINGIZE(elem);
-
-#define DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS_TOENUM_IF(r, data, elem)      \
-    if (BOOST_PP_SEQ_TAIL(data) == BOOST_PP_STRINGIZE(elem))                    \
-        return BOOST_PP_SEQ_HEAD(data)::elem; else
-
-#define DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS(enumName, enumerators)        \
-    enum class enumName {                                                       \
-        BOOST_PP_SEQ_ENUM(enumerators)                                          \
-    };                                                                          \
-                                                                                \
-    inline const char *EnumToString(enumName v)                                 \
-    {                                                                           \
-        switch (v) {                                                            \
-            BOOST_PP_SEQ_FOR_EACH(                                              \
-                DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS_TOSTRING_CASE,        \
-                enumName,                                                       \
-                enumerators                                                     \
-            )                                                                   \
-            default: return "[Unknown " BOOST_PP_STRINGIZE(name) "]";           \
-        }                                                                       \
-    }                                                                           \
-                                                                                \
-    inline enumName StringToEnum(std::string s)                                 \
-    {                                                                           \
-        BOOST_PP_SEQ_FOR_EACH(                                                  \
-            DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS_TOENUM_IF,                \
-            (enumName)(s),                                                      \
-            enumerators                                                         \
-        )                                                                       \
-        {                                                                       \
-            SC_REPORT_FATAL("Configuration",                                    \
-                ("Invalid string \"" + s + "\" for conversion into enum \""     \
-                + BOOST_PP_STRINGIZE(enumName) + "\"").c_str()                  \
-            );                                                                  \
-                                                                                \
-        }                                                                       \
-    }
-
 #endif /* UTILS_COMMON_H_ */
 

DRAMSys/simulator/src/common/xmlAddressdecoder.cpp

@@ -44,32 +44,41 @@
 using namespace std;
 using namespace tinyxml2;
 
-tinyxml2::XMLElement* xmlAddressDecoder::addressmapping = NULL;
+xmlAddressDecoder::xmlAddressDecoder()
+{
+    addressmapping = NULL;
+}
 
 xmlAddressDecoder::xmlAddressDecoder(string addressConfigURI)
 {
-    tinyxml2::XMLDocument doc;
-
-    loadXML(addressConfigURI, doc);
-    xmlAddressDecoder(doc.FirstChildElement("dramconfig")->FirstChildElement("addressmap"));
-
+    setConfiguration(addressConfigURI);
 }
 
 xmlAddressDecoder::xmlAddressDecoder(XMLElement* addressmap)
 {
-    tinyxml2::XMLDocument doc;
-    string xmlNodeName(addressmap->Name());
-    if( xmlNodeName != "addressmapping")
-        reportFatal("AddressDecorder", "addressmap node expected");
+    setConfiguration(addressmap);
+}
 
-    if(addressmap->Attribute("src"))
+void xmlAddressDecoder::setConfiguration(std::string addressConfigURI)
+{
+    tinyxml2::XMLDocument doc;
+    loadXML(addressConfigURI, doc);
+    setConfiguration(doc.RootElement());
+}
+
+void xmlAddressDecoder::setConfiguration(tinyxml2::XMLElement* addressMap)
+{
+    tinyxml2::XMLDocument doc;
+    string xmlNodeName(addressMap->Name());
+
+    if( xmlNodeName != "addressmapping")
     {
-        string src(addressmap->Attribute("src"));
-        loadXML(src, doc);
-        addressmap = (doc.FirstChildElement("addressmapping"));
+        reportFatal("AddressDecorder", "addressmap node expected");
     }
 
-    for(XMLElement* child = addressmap->FirstChildElement(); child != NULL; child = child->NextSiblingElement())
+    for(XMLElement* child = addressMap->FirstChildElement();
+        child != NULL;
+        child = child->NextSiblingElement())
     {
         int from;
         int to;
@@ -80,10 +89,10 @@ xmlAddressDecoder::xmlAddressDecoder(XMLElement* addressmap)
         shifts[child->Name()] = from;
         masks[child->Name()] = pow(2.0, to + 1.0) - pow(2.0, from + 0.0);
         amount[child->Name()] = pow(2.0, to - from + 1.0);
-        //std::cout << child->Name() << " XXXX " << pow(2.0, to - from + 1.0) <<std::endl;
     }
 }
 
+
 DecodedAddress xmlAddressDecoder::decodeAddress(sc_dt::uint64 addr)
 {
     DecodedAddress result;
@@ -112,8 +121,8 @@ sc_dt::uint64 xmlAddressDecoder::encodeAddress(DecodedAddress n)
 
 void xmlAddressDecoder::print()
 {
-    cout << "Used addressmapping:"  << endl;
-    cout<<"===================="<<endl;
+    cout << "Used addressmapping:" << endl;
+    cout << headline << endl;
     for(auto& pair : masks)
     {
         cout<<pair.first<<"\t:\t" << bitset<32>(pair.second)<<endl;

DRAMSys/simulator/src/common/xmlAddressdecoder.h

@@ -45,11 +45,21 @@
 #include <math.h>
 #include <map>
 
+#include "Utils.h"
 #include "third_party/tinyxml2/tinyxml2.h"
 
 struct DecodedAddress
 {
-    DecodedAddress():channel(0),rank(0),bankgroup(0),row(0),bank(0),column(0),bytes(0){}
+    DecodedAddress() : channel(0),
+                       rank(0),
+                       bankgroup(0),
+                       row(0),
+                       bank(0),
+                       column(0),
+                       bytes(0)
+    {
+    }
+
     unsigned int channel;
     unsigned int rank;
     unsigned int bankgroup;
@@ -62,35 +72,27 @@ struct DecodedAddress
 class xmlAddressDecoder
 {
 
-  public:
-
-    static tinyxml2::XMLElement* addressmapping;
-    static inline xmlAddressDecoder& getInstance()
-    {
-        static xmlAddressDecoder decoder(xmlAddressDecoder::addressmapping);
-        return decoder;
-    }
-
-    static inline void Initialize(tinyxml2::XMLElement* mapping)
-    {
-        addressmapping = mapping;
-        xmlAddressDecoder::getInstance();
-        addressmapping = NULL;
-    }
-
-    DecodedAddress decodeAddress(sc_dt::uint64 addr);
-    sc_dt::uint64 encodeAddress(DecodedAddress n);
-
-
-    void print();
   private:
+
+    xmlAddressDecoder();
     xmlAddressDecoder(std::string URI);
     xmlAddressDecoder(tinyxml2::XMLElement* addressMap);
 
     std::map<std::string, sc_dt::uint64> masks;
     std::map<std::string, unsigned int> shifts;
 
+    tinyxml2::XMLElement* addressmapping;
+
   public:
+    DEF_SINGLETON(xmlAddressDecoder);
+
+    DecodedAddress decodeAddress(sc_dt::uint64 addr);
+    sc_dt::uint64 encodeAddress(DecodedAddress n);
+
+    void setConfiguration(std::string url);
+    void setConfiguration(tinyxml2::XMLElement* addressMap);
+    void print();
+
     std::map<std::string, unsigned int> amount;
 };
 

DRAMSys/simulator/src/controller/Controller.cpp

@@ -495,6 +495,11 @@ bool Controller::containsPhase(tlm_phase phase, std::vector<tlm_phase> phases)
     return false;
 }
 
+void Controller::end_of_simulation()
+{
+    terminateSimulation();
+}
+
 void Controller::terminateSimulation()
 {
     if(Configuration::getInstance().BankwiseLogic)
@@ -508,6 +513,8 @@ void Controller::terminateSimulation()
     {
         controllerCore->powerDownManager->wakeUp(0, clkAlign(sc_time_stamp()));
     }
+
+    endTime   = sc_time_stamp();
 }
 
 void Controller::startBandwidthIdleCollector()

DRAMSys/simulator/src/controller/Controller.h

@@ -153,6 +153,9 @@ private:
     void startBandwidthIdleCollector();
     void endBandwidthIdleCollector();
 
+    // SystemC related:
+    virtual void end_of_simulation() override;
+
 };
 
 #endif /* CONTROLLERWRAPPER_H_ */

DRAMSys/simulator/src/controller/core/configuration/Configuration.cpp

@@ -40,7 +40,6 @@
 
 #include "Configuration.h"
 #include "ConfigurationLoader.h"
-#include "boost/lexical_cast.hpp"
 #include "../../../common/xmlAddressdecoder.h"
 
 using namespace std;
@@ -52,24 +51,39 @@ Configuration::Configuration()
 {
 }
 
-int string2bool(string s)
+bool string2bool(string s)
 {
-    try {
-        bool x = boost::lexical_cast<bool>( s );
-        return x;
-    } catch( boost::bad_lexical_cast const& ) {
+    if(s.compare("0") == 0)
+    {
+        return false;
+    }
+    else if(s.compare("1") == 0)
+    {
+        return true;
+    }
+    else
+    {
         SC_REPORT_FATAL("Configuration", ("Could not convert to bool: " + s).c_str());
-        throw;
+        return false;
     }
 }
 
 int string2int(string s)
 {
-    try {
-        int x = boost::lexical_cast<int>( s );
-        return x;
-    } catch( boost::bad_lexical_cast const& ) {
-        SC_REPORT_FATAL("Configuration", ("Could not convert to int: " + s).c_str());
+    return std::stoi(s);
+}
+
+StorageMode string2StoreMode(string s)
+{
+    if(s == "NoStorage")
+        return StorageMode::NoStorage;
+    else if(s == "Store")
+        return StorageMode::Store;
+    else if (s == "ErrorModel")
+        return StorageMode::ErrorModel;
+    else
+    {
+        SC_REPORT_FATAL("Configuration", ("Unknown StorageMode: " + s).c_str());
         throw;
     }
 }
@@ -133,6 +147,8 @@ void Configuration::setParameter(std::string name, std::string value)
         ReorderBuffer = string2bool(value);
 
     //SimConfig------------------------------------------------
+    else if(name == "SimulationName")
+        SimulationName = value;
     else if(name == "DatabaseRecording")
         DatabaseRecording = string2bool(value);
     else if(name == "PowerAnalysis")
@@ -147,8 +163,6 @@ void Configuration::setParameter(std::string name, std::string value)
             WindowSize = string2int(value);
     else if(name == "Debug")
         Debug = string2bool(value);
-    else if (name == "NumberOfTracePlayers")
-        NumberOfTracePlayers = string2int(value);
     else if (name == "NumberOfMemChannels") {
         NumberOfMemChannels = string2int(value);
     unsigned int maxNumberofMemChannels = xmlAddressDecoder::getInstance().amount["channel"];
@@ -179,7 +193,7 @@ void Configuration::setParameter(std::string name, std::string value)
     else if(name == "ErrorCSVFile")
         ErrorCSVFile = value;
     else if(name == "StoreMode")
-        StoreMode = StringToEnum(value);
+        StoreMode = string2StoreMode(value);
     // Temperature Simulation related
     else if (name == "TemperatureScale") {
         if (value != "Celsius" && value != "Fahrenheit" && value != "Kelvin") {
@@ -215,6 +229,17 @@ void Configuration::setParameter(std::string name, std::string value)
     }
 }
 
+void Configuration::setPathToResources(std::string path)
+{
+    pathToResources = path;
+    temperatureSim.setPathToResources(path);
+}
+
+std::string Configuration::getPathToResources()
+{
+    return pathToResources;
+}
+
 void Configuration::setParameters(std::map<std::string, std::string> parameterMap)
 {
     for(auto item : parameterMap)

DRAMSys/simulator/src/controller/core/configuration/Configuration.h

@@ -45,23 +45,19 @@
 #include "thermalSimConfig.h"
 #include "../../../common/Utils.h"
 
-enum class StorageMode;
-DEFINE_ENUM_CLASS_WITH_STRING_CONVERSIONS(StorageMode, (NoStorage)(Store)(ErrorModel))
+enum class StorageMode{NoStorage, Store, ErrorModel};
 
 enum class EPowerDownMode{NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF};
 
-struct Configuration
+struct  Configuration
 {
     static std::string memspecUri;
     static std::string mcconfigUri;
+    std::string pathToResources;
 
-    static inline Configuration& getInstance()
-    {
-        static Configuration configuration;
-        return configuration;
-    }
+    DEF_SINGLETON(Configuration);
 
-    //MCConfig
+    // MCConfig:
     bool BankwiseLogic = false;
     bool OpenPagePolicy = true;
     unsigned int MaxNrOfTransactions = 8;
@@ -72,13 +68,13 @@ struct Configuration
     bool ReadWriteGrouping = false;
     bool ReorderBuffer = false;
 
-    //SimConfig
+    // SimConfig
+    std::string SimulationName = "default";
     bool DatabaseRecording = true;
     bool PowerAnalysis = false;
     bool EnableWindowing = false;
     unsigned int WindowSize = 1000;
     bool Debug = false;
-    unsigned int NumberOfTracePlayers = 1;
     unsigned int NumberOfMemChannels = 1;
     bool ControllerCoreDisableRefresh = false;
     bool ThermalSimulation = false;
@@ -86,7 +82,7 @@ struct Configuration
     unsigned int NumberOfDevicesOnDIMM = 1;
     bool CheckTLM2Protocol = false;
 
-    //MemSpec(from DRAM-Power XML)
+    // MemSpec (from DRAM-Power XML)
     MemSpec memSpec;
 
     void setParameter(std::string name, std::string value);
@@ -103,6 +99,8 @@ struct Configuration
     std::uint64_t getSimMemSizeInBytes();
     unsigned int getDataBusWidth();
     unsigned int getBytesPerBurst();
+    void setPathToResources(std::string path);
+    std::string getPathToResources();
 
 private:
     Configuration();

DRAMSys/simulator/src/controller/core/configuration/ConfigurationLoader.cpp

@@ -100,6 +100,7 @@ void ConfigurationLoader::loadConfigFromUri(Configuration &config, std::string u
 void ConfigurationLoader::loadMemSpec(Configuration& config, string memspecUri)
 {
     tinyxml2::XMLDocument doc;
+    config.memspecUri = memspecUri;
     loadXML(memspecUri, doc);
     XMLElement* memspec = doc.FirstChildElement("memspec");
     loadMemSpec(config, memspec);
@@ -107,13 +108,6 @@ void ConfigurationLoader::loadMemSpec(Configuration& config, string memspecUri)
 
 void ConfigurationLoader::loadMemSpec(Configuration& config, XMLElement* memspec)
 {
-    XMLDocument doc;
-
-    string src(memspec->Attribute("src"));
-    config.memspecUri = src;
-    loadXML(src, doc);
-    memspec = doc.FirstChildElement("memspec");
-
     config.memSpec.MemoryId = queryStringParameter(memspec, "memoryId");
     config.memSpec.MemoryType = queryStringParameter(memspec, "memoryType");
 
@@ -138,7 +132,7 @@ void ConfigurationLoader::loadMemSpec(Configuration& config, XMLElement* memspec
 void ConfigurationLoader::loadMCConfig(Configuration& config, string mcconfigUri)
 {
     tinyxml2::XMLDocument doc;
-
+    config.mcconfigUri = mcconfigUri;
     loadXML(mcconfigUri, doc);
     XMLElement* mcconfig = doc.FirstChildElement("mcconfig");
     loadConfig(config, mcconfig);
@@ -153,13 +147,12 @@ void ConfigurationLoader::loadMCConfig(Configuration& config, XMLElement* mcconf
         config.mcconfigUri = src;
         loadXML(src, doc);
         loadMCConfig(config, doc.FirstChildElement("mcconfig"));
-    } else
-      loadConfig(config, mcconfig);
-
-    // check compatible between Store Mode and PowerDown Mode
-    if (config.StoreMode == StorageMode::ErrorModel && config.PowerDownMode != EPowerDownMode::NoPowerDown) {
-      SC_REPORT_FATAL("ConfigurationLoader", "Does not yet support error model and power down modes activated at the same time");
     }
+    else
+    {
+        loadConfig(config, mcconfig);
+    }
+
 
 }
 

DRAMSys/simulator/src/controller/core/configuration/ConfigurationLoader.h

@@ -45,7 +45,8 @@
 class ConfigurationLoader
 {
 public:
-    static void loadMCConfig(Configuration& config, std::string mcconfigUri);
+
+    static void loadMCConfig(Configuration& config, std::string amconfigUri);
     static void loadMCConfig(Configuration& config, tinyxml2::XMLElement* mcconfig);
 
     static void loadSimConfig(Configuration& config, std::string simconfigUri);

DRAMSys/simulator/src/controller/core/configuration/thermalSimConfig.h

@@ -49,6 +49,12 @@ struct TemperatureSimConfig {
 
     // Temperature Scale
     std::string TemperatureScale;
+    std::string pathToResources;
+
+    void setPathToResources(std::string path)
+    {
+        pathToResources = path;
+    }
 
     // Static Temperature Simulation parameters
     int StaticTemperatureDefaultValue;
@@ -72,6 +78,10 @@ struct TemperatureSimConfig {
     {
         printDebugMessage("Power Info File: " + powerInfoFile);
 
+        powerInfoFile = pathToResources
+                      + "/configs/thermalsim/"
+                      + powerInfoFile;
+
         // Load the XML file into memory and parse it
         tinyxml2::XMLDocument xml;
         loadXML(powerInfoFile, xml);

DRAMSys/simulator/src/simulation/Arbiter.h

@@ -76,10 +76,6 @@ public:
         tSocket.register_nb_transport_fw(this, &Arbiter::nb_transport_fw);
 
         tSocket.register_transport_dbg(this, &Arbiter::transport_dbg);
-
-        for (size_t i = 0; i < Configuration::getInstance().NumberOfTracePlayers; ++i) {
-            receivedResponses.push_back(queue<tlm_generic_payload*>());
-        }
     }
 
     void setTlmRecorders(std::vector<TlmRecorder*> recorders)
@@ -97,7 +93,7 @@ private:
     vector<queue<tlm_generic_payload*>> pendingRequests;
     //used to account for the response_accept_delay in the initiators (traceplayer,core etc.)
     // This is a queue of responses comming from the memory side. The phase of these transactions is BEGIN_RESP.
-    vector<queue<tlm_generic_payload*>> receivedResponses;
+    std::map<unsigned int, queue<tlm_generic_payload*>> receivedResponses;
 
     std::vector<TlmRecorder*> tlmRecorders;
 
@@ -109,7 +105,6 @@ private:
     tlm_sync_enum nb_transport_bw(int channelId, tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay)
     {
         // Check channel ID
-        assert((unsigned int)channelId < iSocket.size());
         if ((unsigned int)channelId != DramExtension::getExtension(payload).getChannel().ID()) {
             SC_REPORT_FATAL("Arbiter", "Payload extension was corrupted");
         }
@@ -127,8 +122,8 @@ private:
     // This function is called when an arbiter's target socket receives a transaction from a device
     tlm_sync_enum nb_transport_fw(int id, tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay)
     {
-        assert ((unsigned int)id < tSocket.size());
-        if (phase == BEGIN_REQ) {
+        if (phase == BEGIN_REQ)
+        {
             // Map the payload with socket id.
             routeMap[&payload] = id;
             // In the begin request phase the socket ID is appended to the payload.
@@ -158,7 +153,6 @@ private:
         unsigned int channelId = DramExtension::getExtension(payload).getChannel().ID();
 
         // Check the valid range of initiatorSocket ID and channel Id
-        assert(initiatorSocket < Configuration::getInstance().NumberOfTracePlayers);
         assert(channelId < Configuration::getInstance().NumberOfMemChannels);
 
         // Phases initiated by the intiator side from arbiter's point of view (devices performing memory requests to the arbiter)
@@ -210,10 +204,15 @@ private:
             if ((int)initiatorSocket != routeMap[&payload]) {
                 SC_REPORT_FATAL("Arbiter", "Payload extension was corrupted");
             }
-            // The arbiter receives a transaction in BEGIN_RESP phase (that came from the memory side) and forwards it to the requester device
+            // The arbiter receives a transaction in BEGIN_RESP phase
+            // (that came from the memory side) and forwards it to the requester
+            // device
             if (receivedResponses[initiatorSocket].empty())
+            {
                 sendToInitiator(initiatorSocket, payload, phase, SC_ZERO_TIME);
-            // Enqueue the transaction in BEGIN_RESP phase until the initiator device acknowledge it (phase changes to END_RESP).
+            }
+            // Enqueue the transaction in BEGIN_RESP phase until the initiator
+            // device acknowledge it (phase changes to END_RESP).
             receivedResponses[initiatorSocket].push(&payload);
         } else {
             SC_REPORT_FATAL(0, "Payload event queue in arbiter was triggered with unknown phase");

DRAMSys/simulator/src/simulation/DRAMSys.cpp

@@ -0,0 +1,273 @@
+/*
+ * Copyright (c) 2015, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Janik Schlemminger
+ *    Matthias Jung
+ *    Eder F. Zulian
+ *    Felipe S. Prado
+ */
+
+#include <stdlib.h>
+#include <iostream>
+#include <fstream>
+#include <vector>
+
+#include "DRAMSys.h"
+#include "Setup.h"
+#include "../common/TlmRecorder.h"
+#include "../common/DebugManager.h"
+#include "../common/xmlAddressdecoder.h"
+#include "../controller/core/ControllerCore.h"
+#include "../controller/core/configuration/ConfigurationLoader.h"
+#include "../common/Utils.h"
+#include "../simulation/TemperatureController.h"
+#include "../controller/Controller.h"
+
+using namespace std;
+
+DRAMSys::DRAMSys(sc_module_name __attribute__((unused)) name,
+                 string simulationToRun,
+                 string pathToResources) : tSocket("DRAMSys_tSocket")
+{
+    logo();
+
+    // Read Configuration Setup:
+    string memspec;
+    string mcconfig;
+    string amconfig;
+    string simconfig;
+    string thermalconfig;
+
+    Setup setup(simulationToRun,
+                memspec,
+                mcconfig,
+                amconfig,
+                simconfig,
+                thermalconfig);
+
+    Configuration::getInstance().setPathToResources(pathToResources);
+
+    // The xmlAddressDecoder MUST be initialized before calling the
+    // ConfigurationLoader because some information from the xmlAddressDecoder
+    // is needed to assure the coherence of the configuration.
+    xmlAddressDecoder::getInstance().setConfiguration(pathToResources
+                                                       + "configs/amconfigs/"
+                                                       + amconfig);
+    xmlAddressDecoder::getInstance().print();
+
+    // Setup the memory controller with the propriate xml file
+    ConfigurationLoader::loadMCConfig(Configuration::getInstance(),
+                                      pathToResources
+                                      + "configs/mcconfigs/"
+                                      + mcconfig);
+
+    ConfigurationLoader::loadMemSpec(Configuration::getInstance(),
+                                     pathToResources
+                                     + "configs/memspecs/"
+                                     + memspec);
+
+    ConfigurationLoader::loadSimConfig(Configuration::getInstance(),
+                                       pathToResources
+                                       + "configs/simulator/"
+                                       + simconfig);
+
+    ConfigurationLoader::loadTemperatureSimConfig(Configuration::getInstance(),
+                                                  pathToResources
+                                                  + "configs/thermalsim/"
+                                                  + thermalconfig);
+
+    // Instantiate all internal DRAMSys modules:
+    instantiateModules(Configuration::getInstance().SimulationName,
+                       pathToResources);
+    // Connect all internal DRAMSys modules:
+    bindSockets();
+
+    // Setup the debug manager:
+    setupDebugManager(Configuration::getInstance().SimulationName);
+}
+
+void DRAMSys::logo()
+{
+    #define REDTXT(s) string(("\033[0;31m"+string((s))+"\033[0m"))
+    #define BOLDBLUETXT(s) string(("\033[1;34m"+string((s))+"\033[0m"))
+    cout << endl;
+    cout << REDTXT("  |||") << endl;
+    cout << REDTXT(" +---+   Microelectronic Systems") << endl;
+    cout << REDTXT("=|   |=  Design Research Group") << endl;
+    cout << REDTXT("=|   |=  ") << BOLDBLUETXT("University of Kaiserslautern")
+         << endl;
+    cout << REDTXT(" +---+   ") << endl;
+    cout << REDTXT("  |||    ") << "DRAMSys v3.0" << endl;
+    cout << endl;
+    #undef REDTXT
+    #undef BOLDBLUETXT
+}
+
+void DRAMSys::setupDebugManager(const string& traceName)
+{
+    auto& dbg = DebugManager::getInstance();
+    dbg.writeToConsole = true;
+    dbg.writeToFile = true;
+    if(dbg.writeToFile)
+        dbg.openDebugFile(traceName + ".txt");
+}
+
+void DRAMSys::setupTlmRecorders(const string &traceName,
+                                const string &pathToResources)
+{
+    // Create TLM Recorders, one per channel.
+    for (size_t i = 0;
+         i < Configuration::getInstance().NumberOfMemChannels;
+         i++)
+    {
+        std::string sqlScriptURI = pathToResources
+                                 + string("scripts/createTraceDB.sql");
+
+        std::string dbName = traceName
+                           + string("_channel")
+                           + std::to_string(i)
+                           + ".tdb";
+
+        std::string recorderName = "tlmRecorder" + std::to_string(i);
+
+        TlmRecorder *tlmRecorder =
+                new TlmRecorder(recorderName.c_str(),
+                                sqlScriptURI.c_str(),
+                                dbName.c_str(),
+                                Configuration::getInstance().DatabaseRecording);
+        tlmRecorder->recordMCconfig(Configuration::getInstance().mcconfigUri);
+        tlmRecorder->recordMemspec(Configuration::getInstance().memspecUri);
+
+        std::string traceNames = Configuration::getInstance().SimulationName;
+        tlmRecorder->recordTracenames(traceNames);
+
+        tlmRecorders.push_back(tlmRecorder);
+    }
+}
+
+void DRAMSys::instantiateModules(const string &traceName,
+                                 const string &pathToResources)
+{
+    // The first call to getInstance() creates the Temperature Controller.
+    // The same instance will be accessed by all other modules.
+    TemperatureController::getInstance();
+
+    // Create and properly initialize TLM recorders.
+    // They need to be ready before creating some modules.
+    setupTlmRecorders(traceName, pathToResources);
+
+    arbiter = new Arbiter("arbiter");
+    arbiter->setTlmRecorders(tlmRecorders);
+
+    for (size_t i = 0;
+         i < Configuration::getInstance().NumberOfMemChannels;
+         i++)
+    {
+        std::string str = "controller" + std::to_string(i);
+        Controller *controller = new Controller(str.c_str(), tlmRecorders[i]);
+        controllers.push_back(controller);
+
+        str = "dram" + std::to_string(i);
+        Dram *dram = new Dram(str.c_str());
+        dram->setTlmRecorder(tlmRecorders[i]);
+        dram->setDramController(controllers[i]);
+        drams.push_back(dram);
+
+        if(Configuration::getInstance().CheckTLM2Protocol)
+        {
+            str = "TLMCheckerController"+ std::to_string(i);
+            tlm_utils::tlm2_base_protocol_checker<> * controllerTlmChecker =
+                    new tlm_utils::tlm2_base_protocol_checker<>(str.c_str());
+            controllersTlmCheckers.push_back(controllerTlmChecker);
+        }
+    }
+}
+
+void DRAMSys::bindSockets()
+{
+    tSocket.bind(arbiter->tSocket);
+
+        if(Configuration::getInstance().CheckTLM2Protocol)
+        {
+            for (size_t i = 0;
+                 i < Configuration::getInstance().NumberOfMemChannels;
+                 i++)
+            {
+                arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket);
+                controllersTlmCheckers[i]->initiator_socket.bind(
+                            controllers[i]->tSocket);
+                controllers[i]->iSocket.bind(drams[i]->tSocket);
+            }
+        }
+        else
+        {
+            for (size_t i = 0;
+                 i < Configuration::getInstance().NumberOfMemChannels;
+                 i++)
+            {
+                arbiter->iSocket.bind(controllers[i]->tSocket);
+                controllers[i]->iSocket.bind(drams[i]->tSocket);
+            }
+        }
+}
+
+DRAMSys::~DRAMSys()
+{
+
+    delete arbiter;
+
+    for (auto controller : controllers)
+    {
+        delete controller;
+    }
+
+    for (auto dram : drams)
+    {
+        delete dram;
+    }
+
+    for (auto rec : tlmRecorders)
+    {
+        delete rec;
+    }
+
+    for (auto tlmChecker : controllersTlmCheckers)
+    {
+        delete tlmChecker;
+    }
+}
+
+void DRAMSys::report(string message)
+{
+    DebugManager::getInstance().printDebugMessage(this->name(), message);
+    cout << message << endl;
+}

DRAMSys/simulator/src/simulation/DRAMSys.h

@@ -36,8 +36,8 @@
  *    Felipe S. Prado
  */
 
-#ifndef SIMULATION_H_
-#define SIMULATION_H_
+#ifndef DRAMSYS_H_
+#define DRAMSYS_H_
 
 #include <string>
 #include <systemc.h>
@@ -46,70 +46,59 @@
 #include "Arbiter.h"
 #include "TraceGenerator.h"
 #include "ReorderBuffer.h"
+#include <tlm_utils/multi_passthrough_target_socket.h>
+#include <tlm_utils/multi_passthrough_initiator_socket.h>
 #include "../controller/Controller.h"
 #include "../common/third_party/tinyxml2/tinyxml2.h"
 #include "../common/tlm2_base_protocol_checker.h"
 
-
-struct DramSetup
-{
-    DramSetup():memspec(NULL),mcconfig(NULL),simconfig(NULL),addressmapping(NULL), thermalsimconfig(NULL) {}
-    DramSetup(tinyxml2::XMLElement* memspec, tinyxml2::XMLElement* mcconfig, tinyxml2::XMLElement* simconfig, tinyxml2::XMLElement* addressmapping, tinyxml2::XMLElement *tsc)
-        : memspec(memspec), mcconfig(mcconfig), simconfig(simconfig), addressmapping(addressmapping), thermalsimconfig(tsc) {}
-    tinyxml2::XMLElement* memspec;
-    tinyxml2::XMLElement* mcconfig;
-    tinyxml2::XMLElement* simconfig;
-    tinyxml2::XMLElement* addressmapping;
-    tinyxml2::XMLElement* thermalsimconfig;
-};
-
-struct Device
-{
-    Device():trace("empty.stl"), burstLength(0){}
-    Device(std::string trace, unsigned int clkMhz, unsigned int burstLength = 8) : trace(trace), clkMhz (clkMhz), burstLength(burstLength)
-    {
-    }
-    std::string trace;
-    unsigned int clkMhz;
-    unsigned int burstLength;
-};
-
-class Simulation: public sc_module
+class DRAMSys: public sc_module
 {
 public:
-    tlm_utils::multi_passthrough_target_socket<Simulation> tSocket;
+    tlm_utils::multi_passthrough_target_socket<DRAMSys> tSocket;
 
     sc_event terminateSimulation;
 
-    SC_HAS_PROCESS(Simulation);
-    Simulation(sc_module_name name, string pathToResources, string traceName, DramSetup setup,
-            std::vector<Device> devices);
-    ~Simulation();
+    SC_HAS_PROCESS(DRAMSys);
+    DRAMSys(sc_module_name name,
+            string simulationToRun,
+            string pathToResources);
 
-    void stop();
+    ~DRAMSys();
+
+    void logo();
 
 
 private:
+
     std::string traceName;
-    DramSetup dramSetup;
+    //DramSetup setup;
 
     //TLM 2.0 Protocol Checkers
-    std::vector<tlm_utils::tlm2_base_protocol_checker<>*> controllersTlmCheckers;
+    std::vector<tlm_utils::tlm2_base_protocol_checker<>*>
+        controllersTlmCheckers;
 
     // All transactions pass through the same arbiter
     Arbiter *arbiter;
+
     // Each DRAM unit has a controller
     std::vector<Controller*> controllers;
+
     // TODO: Each DRAM has a reorder buffer (check this!)
     ReorderBuffer *reorder;
+
     // DRAM units
     std::vector<Dram*> drams;
-    // Transaction Recorders (one per channel). They generate the output databases.
+
+    // Transaction Recorders (one per channel).
+    // They generate the output databases.
     std::vector<TlmRecorder*> tlmRecorders;
 
     void report(std::string message);
-    void setupTlmRecorders(const string &traceName, const string &pathToResources, const std::vector<Device> &devices);
-    void instantiateModules(const string &traceName, const string &pathToResources, const std::vector<Device> &devices);
+    void setupTlmRecorders(const string &traceName,
+                           const string &pathToResources);
+    void instantiateModules(const string &traceName,
+                            const string &pathToResources);
     void bindSockets();
     void setupDebugManager(const string &traceName);
 };

DRAMSys/simulator/src/simulation/Dram.h

@@ -41,8 +41,8 @@
 #define DRAM_H_
 
 #include <sys/mman.h>
-#include <tlm.h>
-#include <systemc.h>
+#include <tlm>
+#include <systemc>
 #include <tlm_utils/peq_with_cb_and_phase.h>
 #include <tlm_utils/simple_target_socket.h>
 #include <vector>
@@ -194,8 +194,6 @@ struct Dram : sc_module
         firstAccess = SC_ZERO_TIME;
         lastAccess = SC_ZERO_TIME;
 
-        printDebugMessage(string("StorageMode: ") + EnumToString(StoreMode));
-
         // For each bank in a channel a error Model is created:
         if(StoreMode == StorageMode::ErrorModel)
         {
@@ -212,39 +210,85 @@ struct Dram : sc_module
         }
     }
 
+    virtual void end_of_simulation()
+    {
+    }
+
     ~Dram()
     {
-        if (powerAnalysis == true) {
-            // Obtain the residual energy which was not covered by previous windows
+        if (powerAnalysis == true)
+        {
+            // Obtain the residual energy which was not covered by
+            // previous windows
             DRAMPower->calcEnergy();
 
-            tlmRecorder->recordPower(sc_time_stamp().to_seconds(), DRAMPower->getPower().window_average_power * Configuration::getInstance().NumberOfDevicesOnDIMM);
+            tlmRecorder->recordPower(sc_time_stamp().to_seconds(),
+                 DRAMPower->getPower().window_average_power
+                 * Configuration::getInstance().NumberOfDevicesOnDIMM);
 
-            // Print the final total energy and the average power for the simulation
-            cout << name() << string("\tTotal Energy: \t")  << fixed <<std::setprecision( 2 )<< DRAMPower->getEnergy().total_energy * Configuration::getInstance().NumberOfDevicesOnDIMM << string(" pJ") << endl;
-            cout << name() << string("\tAverage Power: \t") << fixed <<std::setprecision( 2 )<< DRAMPower->getPower().average_power * Configuration::getInstance().NumberOfDevicesOnDIMM<< string(" mW") << endl;
+            // Print the final total energy and the average power for
+            // the simulation:
+            cout << name() << string("  Total Energy:   ")
+                 << fixed <<std::setprecision( 2 )
+                 << DRAMPower->getEnergy().total_energy
+                  * Configuration::getInstance().NumberOfDevicesOnDIMM
+                 << string(" pJ")
+                 << endl;
+
+            cout << name() << string("  Average Power:  ")
+                 << fixed <<std::setprecision( 2 )
+                 << DRAMPower->getPower().average_power
+                  * Configuration::getInstance().NumberOfDevicesOnDIMM
+                 << string(" mW") << endl;
         }
 
         // Bandwidth:
 
-        sc_time activeTime = numberOfTransactionsServed * Configuration::getInstance().memSpec.BurstLength / Configuration::getInstance().memSpec.DataRate * Configuration::getInstance().memSpec.clk;
+        sc_time activeTime = numberOfTransactionsServed
+                           * Configuration::getInstance().memSpec.BurstLength
+                           / Configuration::getInstance().memSpec.DataRate
+                           * Configuration::getInstance().memSpec.clk;
+
         sc_time idleTime    = dramController->getIdleTime();
         sc_time endTime     = dramController->getEndTime();
         sc_time startTime   = dramController->getStartTime();
+
         double bandwidth = (activeTime/(endTime-startTime)*100);
         double bandwidth_IDLE = ((activeTime)/(endTime-startTime-idleTime)*100);
-        //                      |       clk in Mhz e.g. 800 [MHz]                            |  *  |        DataRate e.g. 2                     |  *  |                 BusWidth e.g. 8           | * |         Number of devices on a DIMM e.g. 8       | / | 1024 |
-        double maxBandwidth = ( (1000000/Configuration::getInstance().memSpec.clk.to_double())  *  Configuration::getInstance().memSpec.DataRate   *  Configuration::getInstance().memSpec.bitWidth * Configuration::getInstance().NumberOfDevicesOnDIMM ) / ( 1024 );
-        cout << name() << string("\tTotal Time: \t")            <<(endTime-startTime).to_string() << endl;
-        //cout << name() << string("\tTotal IDLE: \t")            <<idleTime.to_string() << endl;
-        //cout << name() << string("\tTotal Active DataBus: \t")          << activeTime.to_string() << endl;
-        cout << name() << string("\tAVG BW: \t")         <<std::fixed<<std::setprecision(2) << ((bandwidth/100)*maxBandwidth)  << " Gibit/s (" << bandwidth << " %)" << endl;
-        cout << name() << string("\tAVG BW/IDLE: \t")    <<std::fixed<<std::setprecision(2) << ((bandwidth_IDLE/100)*maxBandwidth) <<" Gibit/s ("<< (bandwidth_IDLE) << " %)" << endl;
-        cout << name() << string("\tMAX BW: \t")         <<std::fixed<<std::setprecision(2) <<maxBandwidth << " Gibit/s" << endl;
+
+        double maxBandwidth = (
+            // clk in Mhz e.g. 800 [MHz]:
+            (1000000/Configuration::getInstance().memSpec.clk.to_double())
+            // DataRate e.g. 2
+            * Configuration::getInstance().memSpec.DataRate
+            // BusWidth e.g. 8 or 64
+            * Configuration::getInstance().memSpec.bitWidth
+            //   Number of devices on a DIMM e.g. 8
+            * Configuration::getInstance().NumberOfDevicesOnDIMM ) / ( 1024 );
+
+        cout << name() << string("  Total Time:     ")
+             << (endTime-startTime).to_string()
+             << endl;
+        cout << name() << string("  AVG BW:         ")
+             << std::fixed<<std::setprecision(2)
+             << ((bandwidth/100)*maxBandwidth)
+             << " Gibit/s (" << bandwidth << " %)"
+             << endl;
+        cout << name() << string("  AVG BW/IDLE:    ")
+             << std::fixed<<std::setprecision(2)
+             << ((bandwidth_IDLE/100)*maxBandwidth)
+             << " Gibit/s ("<< (bandwidth_IDLE) << " %)"
+             << endl;
+        cout << name() << string("  MAX BW:         ")
+             << std::fixed << std::setprecision(2)
+             << maxBandwidth << " Gibit/s"
+             << endl;
         // Clean up:
         for (auto e : ememory) {
             delete e;
         }
+
+        tlmRecorder->closeConnection();
     }
 
     // When working with floats, we have to decide ourselves what is an
@@ -346,8 +390,9 @@ struct Dram : sc_module
         }
         else if (phase == BEGIN_WR)
         {
-
+#ifndef DRAMSYS_PCT
             assert(payload.get_data_length() == bytesPerBurst);
+#endif
 
             if(powerAnalysis == true){DRAMPower->doCommand(MemCommand::WR, bank, cycle);}
             numberOfTransactionsServed++;

DRAMSys/simulator/src/simulation/Setup.cpp

@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2017, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Matthias Jung
+ */
+
+#include "Setup.h"
+
+Setup::Setup(std::string uri,
+                       std::string & memspec,
+                       std::string & mcconfig,
+                       std::string & amconfig,
+                       std::string & simconfig,
+                       std::string & thermalconfig)
+{
+    // Load Simulation:
+    tinyxml2::XMLDocument simulationdoc;
+    loadXML(uri, simulationdoc);
+
+    tinyxml2::XMLElement* simulation =
+            simulationdoc.FirstChildElement("simulation");
+
+    std::string xmlNodeName(simulation->Name());
+    if( xmlNodeName != "simulation")
+        reportFatal("SimulationManager",
+                    "Cannot load simulation: simulation node expected");
+
+    // Load all sub-configuration XML files:
+    tinyxml2::XMLElement* s;
+
+    s = simulation->FirstChildElement("memspec");
+    memspec = s->Attribute("src");
+
+    s = simulation->FirstChildElement("mcconfig");
+    mcconfig = s->Attribute("src");
+
+    s = simulation->FirstChildElement("addressmapping");
+    amconfig = s->Attribute("src");
+
+    s = simulation->FirstChildElement("simconfig");
+    simconfig = s->Attribute("src");
+
+    s = simulation->FirstChildElement("thermalconfig");
+    thermalconfig = s->Attribute("src");
+
+}

DRAMSys/simulator/src/simulation/Setup.h

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2017, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Matthias Jung
+ */
+
+#ifndef SETUP_H
+#define SETUP_H
+
+#include <vector>
+#include <string>
+
+#include "../common/Utils.h"
+#include "TracePlayer.h"
+#include "StlPlayer.h"
+
+
+class Setup
+{
+public:
+    Setup(std::string uri,
+          std::string & memspec,
+          std::string & mcconfig,
+          std::string & amconfig,
+          std::string & simconfig,
+          std::string & thermalconfig);
+};
+
+#endif // SETUP_H

DRAMSys/simulator/src/simulation/Simulation.cpp

@@ -1,212 +0,0 @@
-/*
- * Copyright (c) 2015, University of Kaiserslautern
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
- * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors:
- *    Janik Schlemminger
- *    Matthias Jung
- *    Eder F. Zulian
- *    Felipe S. Prado
- */
-
-#include <stdlib.h>
-#include <iostream>
-#include <fstream>
-#include <vector>
-
-#include "Simulation.h"
-#include "../common/TlmRecorder.h"
-#include "../common/DebugManager.h"
-#include "../common/xmlAddressdecoder.h"
-#include "../controller/core/ControllerCore.h"
-#include "../controller/core/configuration/ConfigurationLoader.h"
-#include "../common/Utils.h"
-#include "../simulation/TemperatureController.h"
-#include "../controller/Controller.h"
-
-using namespace std;
-
-Simulation::Simulation(sc_module_name __attribute__((unused)) name, string pathToResources, string traceName, DramSetup setup,
-                       std::vector<Device> devices) : traceName(traceName), dramSetup(setup)
-{
-    SC_THREAD(stop);
-
-    // XXX: The xmlAddressDecoder MUST be initialized before calling the
-    // ConfigurationLoader because some information from the xmlAddressDecoder
-    // is needed to assure the coherence of the configuration.
-    xmlAddressDecoder::Initialize(setup.addressmapping);
-    xmlAddressDecoder::getInstance().print();
-
-    ConfigurationLoader::loadMCConfig(Configuration::getInstance(), setup.mcconfig);
-    ConfigurationLoader::loadMemSpec(Configuration::getInstance(), setup.memspec);
-    ConfigurationLoader::loadSimConfig(Configuration::getInstance(), setup.simconfig);
-    ConfigurationLoader::loadTemperatureSimConfig(Configuration::getInstance(), setup.thermalsimconfig);
-
-    instantiateModules(traceName, pathToResources, devices);
-    bindSockets();
-    setupDebugManager(traceName);
-}
-
-void Simulation::setupDebugManager(const string& traceName)
-{
-    auto& dbg = DebugManager::getInstance();
-    dbg.writeToConsole = true;
-    dbg.writeToFile = true;
-    if(dbg.writeToFile)
-        dbg.openDebugFile(traceName + ".txt");
-}
-
-void Simulation::setupTlmRecorders(const string &traceName, const string &pathToResources, const std::vector<Device> &devices)
-{
-    // Create TLM Recorders, one per channel.
-    for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) {
-        std::string sqlScriptURI = pathToResources + string("scripts/createTraceDB.sql");
-        std::string dbName = traceName + string("_channel") +  std::to_string(i) + ".tdb";
-        std::string recorderName = "tlmRecorder" + std::to_string(i);
-        TlmRecorder *tlmRecorder = new TlmRecorder(recorderName.c_str(), sqlScriptURI.c_str(), dbName.c_str(), Configuration::getInstance().DatabaseRecording);
-
-        tlmRecorder->recordMCconfig(Configuration::getInstance().mcconfigUri);
-        tlmRecorder->recordMemspec(Configuration::getInstance().memspecUri);
-
-        tlmRecorders.push_back(tlmRecorder);
-
-        std::string traceNames;
-        for (size_t i = 0; i < devices.size(); i++) {
-            traceNames.append(devices[i].trace);
-            if (i == devices.size() - 1)
-                continue;
-            traceNames.append(",");
-        }
-        tlmRecorder->recordTracenames(traceNames);
-    }
-}
-
-void Simulation::instantiateModules(const string &traceName, const string &pathToResources, const std::vector<Device> &devices)
-{
-    // The first call to getInstance() creates the Temperature Controller.
-    // The same instance will be accessed by all other modules.
-    TemperatureController::getInstance();
-
-    // Create and properly initialize TLM recorders. They need to be ready before creating some modules.
-    setupTlmRecorders(traceName, pathToResources, devices);
-
-    arbiter = new Arbiter("arbiter");
-    arbiter->setTlmRecorders(tlmRecorders);
-
-
-    for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) {
-        std::string str = "controller" + std::to_string(i);
-        Controller *controller = new Controller(str.c_str(), tlmRecorders[i]);
-        controllers.push_back(controller);
-
-        str = "dram" + std::to_string(i);
-        Dram *dram = new Dram(str.c_str());
-        dram->setTlmRecorder(tlmRecorders[i]);
-        dram->setDramController(controllers[i]);
-        drams.push_back(dram);
-
-        if(Configuration::getInstance().CheckTLM2Protocol) {
-            str = "TLMCheckerController"+ std::to_string(i);
-            tlm_utils::tlm2_base_protocol_checker<> * controllerTlmChecker = new tlm_utils::tlm2_base_protocol_checker<>(str.c_str());
-            controllersTlmCheckers.push_back(controllerTlmChecker);
-        }
-    }
-}
-
-void Simulation::bindSockets()
-{
-        tSocket.bind(arbiter->tSocket);
-        if(Configuration::getInstance().CheckTLM2Protocol) {
-
-            for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) {
-                arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket);
-                controllersTlmCheckers[i]->initiator_socket.bind(controllers[i]->tSocket);
-                controllers[i]->iSocket.bind(drams[i]->tSocket);
-            }
-        } else {
-            for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) {
-                arbiter->iSocket.bind(controllers[i]->tSocket);
-                controllers[i]->iSocket.bind(drams[i]->tSocket);
-            }
-        }
-}
-
-Simulation::~Simulation()
-{
-
-    delete arbiter;
-
-    for (auto controller : controllers) {
-        delete controller;
-    }
-
-    for (auto dram : drams) {
-        delete dram;
-    }
-
-    for (auto rec : tlmRecorders) {
-        delete rec;
-    }
-
-    for (auto tlmChecker : controllersTlmCheckers) {
-        delete tlmChecker;
-    }
-}
-
-
-void Simulation::stop()
-{
-    wait(terminateSimulation);
-
-    unsigned int pending_payloads = 0;
-    do {
-        pending_payloads = 0;
-        for (auto controller : controllers) {
-            pending_payloads += controller->getTotalNumberOfPayloadsInSystem();
-        }
-        wait(sc_time(200, SC_NS));
-    } while(pending_payloads != 0);
-
-    for (auto controller : controllers) {
-        controller->terminateSimulation();
-    }
-    wait(sc_time(200, SC_NS));
-    for (auto rec : tlmRecorders) {
-        rec->closeConnection();
-    }
-    sc_stop();
-}
-
-
-void Simulation::report(string message)
-{
-    DebugManager::getInstance().printDebugMessage(this->name(), message);
-    cout << message << endl;
-}

DRAMSys/simulator/src/simulation/SimulationManager.cpp

@@ -1,310 +0,0 @@
-/*
- * Copyright (c) 2015, University of Kaiserslautern
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
- * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors:
- *    Janik Schlemminger
- *    Matthias Jung
- *    Eder F. Zulian
- */
-
-#include <sys/wait.h>
-#include <boost/filesystem.hpp>
-
-#include "SimulationManager.h"
-#include "../common/Utils.h"
-
-using namespace std;
-using namespace tinyxml2;
-
-SimulationManager::SimulationManager(string resources) : resources(resources)
-{
-}
-
-SimulationManager::~SimulationManager()
-{
-    for (auto player : players) {
-        delete player;
-    }
-#if USE_EXAMPLE_INITIATOR
-    delete init;
-    delete exampleInitiatorTlmChecker;
-#endif
-
-    for (auto tlmChecker : playersTlmCheckers) {
-        delete tlmChecker;
-    }
-}
-
-void SimulationManager::loadSimulationsFromXML(string uri)
-{
-    cout << "\n\nload simulation-batch:" << endl;
-    cout << headline << endl;
-
-    exportPath = getFileName(uri);
-    loadXML(uri, simulationdoc);
-
-    cout << "\t-> parsing simulation objects .." << endl;
-
-    XMLElement* simulation = simulationdoc.FirstChildElement("simulation");
-    string xmlNodeName(simulation->Name());
-    if( xmlNodeName != "simulation")
-        reportFatal("SimulationManager", "simulation node expected");
-    parseSimulationBatch(simulation);
-
-    cout << "\t-> simulation batches loaded successfully!\n" << endl;
-
-    for (auto batch : simulationBatches)
-    {
-        batch.print();
-    }
-}
-
-void SimulationManager::runSimulations()
-{
-    for (auto& batch : simulationBatches)
-    {
-        boost::filesystem::path dir(exportPath);
-        boost::filesystem::create_directories(dir);
-
-        for (auto& dramSetup : batch.dramSetups)
-        {
-            for (auto& traceSetup : batch.traceSetups)
-            {
-                string exportname = exportPath + "/" + traceSetup.first;
-                instantiateModules(exportname, dramSetup, traceSetup.second);
-                bindSockets();
-                runSimulation(exportname);
-            }
-        }
-    }
-}
-
-void SimulationManager::parseSimulationBatch(XMLElement* simulation)
-{
-    SimulationBatch batch;
-
-    XMLElement* simconfig = simulation->FirstChildElement("simconfig");
-
-    XMLElement *thermalsimconfig = simulation->FirstChildElement("thermalsimconfig");
-
-    XMLElement* memspecs = simulation->FirstChildElement("memspecs");
-    if(memspecs == NULL) memspecs = simulation;
-
-    XMLElement* addressmappings = simulation->FirstChildElement("addressmappings");
-    if(addressmappings == NULL) addressmappings = simulation;
-
-    XMLElement* mcconfigs = simulation->FirstChildElement("mcconfigs");
-    if(mcconfigs == NULL) mcconfigs = simulation;
-
-    for (XMLElement* memspec = memspecs->FirstChildElement("memspec"); memspec != NULL;
-            memspec = memspec->NextSiblingElement("memspec"))
-    {
-
-        for (XMLElement* addressmapping = addressmappings->FirstChildElement("addressmapping"); addressmapping != NULL;
-                addressmapping = addressmapping->NextSiblingElement("addressmapping"))
-        {
-
-            for (XMLElement* mcconfig = mcconfigs->FirstChildElement("mcconfig");
-                    mcconfig != NULL; mcconfig = mcconfig->NextSiblingElement("mcconfig"))
-            {
-                batch.dramSetups.push_back(DramSetup(memspec, mcconfig, simconfig, addressmapping, thermalsimconfig));
-            }
-        }
-    }
-
-    addTraceSetups(batch, simulation);
-
-    simulationBatches.push_back(batch);
-}
-
-void SimulationManager::instantiateModules(string traceName, DramSetup dramSetup, vector<Device> traceSetup)
-{
-
-    simulation = new Simulation("sim", resources, traceName, dramSetup, traceSetup);
-
-#if USE_EXAMPLE_INITIATOR
-    init = new ExampleInitiator("init");
-    if(Configuration::getInstance().CheckTLM2Protocol) {
-        string str = "ExampleInitiatorTLMChecker";
-        exampleInitiatorTlmChecker = new tlm_utils::tlm2_base_protocol_checker<>(str.c_str());
-    }
-#else
-    for (size_t i = 0; i < Configuration::getInstance().NumberOfTracePlayers; i++) {
-        std::string playerStr = "tracePlayer" + std::to_string(i);
-        TracePlayer *player;
-        sc_time playerClk;
-
-        // The clock frequency for the player can be specified in the
-        // configuration file like in the example below (200 MHz):
-        //
-        // <tracesetups>
-        //     <tracesetup id="fifo">
-        //         <device clkMhz="200">chstone-adpcm_32.stl</device>
-        //     </tracesetup>
-        // </tracesetups>
-        //
-        // If it is not specified in the configuration, the player will be
-        // configured to use the memory clock frequency got from the memory
-        // specs.
-        if (traceSetup[i].clkMhz == 0)
-            playerClk = Configuration::getInstance().memSpec.clk;
-        else
-            playerClk = FrequencyToClk(traceSetup[i].clkMhz);
-        const string pathToResources = resources;
-        player = new StlPlayer(playerStr.c_str(), pathToResources + string("traces/") + traceSetup[i].trace,  playerClk, this);
-        if(Configuration::getInstance().SimulationProgressBar)
-        {
-            totalTransactions += player->getNumberOfLines(pathToResources + string("traces/") + traceSetup[i].trace);
-        }
-        players.push_back(player);
-
-        if(Configuration::getInstance().CheckTLM2Protocol) {
-            string str = "TLMCheckerPlayer"+ std::to_string(i);
-            tlm_utils::tlm2_base_protocol_checker<> * playerTlmChecker = new tlm_utils::tlm2_base_protocol_checker<>(str.c_str());
-            playersTlmCheckers.push_back(playerTlmChecker);
-        }
-    }
-    remainingTransactions = totalTransactions;
-#endif /* USE_EXAMPLE_INITIATOR */
-}
-
-void SimulationManager::bindSockets()
-{
-#if USE_EXAMPLE_INITIATOR
-    if(Configuration::getInstance().CheckTLM2Protocol) {
-        init->socket.bind(exampleInitiatorTlmChecker->target_socket);
-        exampleInitiatorTlmChecker->initiator_socket.bind(simulation->tSocket);
-
-    }
-    else {
-        init->socket.bind(simulation->tSocket);
-#else
-    if(Configuration::getInstance().CheckTLM2Protocol) {
-        for (size_t i = 0; i < players.size(); i++) {
-            players[i]->iSocket.bind(playersTlmCheckers[i]->target_socket);
-            playersTlmCheckers[i]->initiator_socket.bind(simulation->tSocket);
-        }
-
-    }
-    else {
-        for (auto player : players) {
-            player->iSocket.bind(simulation->tSocket);
-        }
-
-#endif
-    }
-}
-
-void SimulationManager::runSimulation(string traceName)
-{
-    report("\n\nStarting simulation:");
-    report(headline);
-    report("  -> setup: \t\t" + getFileName(traceName));
-    report("  -> memspec: \t\t" + Configuration::getInstance().memSpec.MemoryId);
-    cout << endl;
-    simStartTime = clock();
-
-    for (auto player : players) {
-        player->nextPayload();
-    }
-
-    sc_set_stop_mode(SC_STOP_FINISH_DELTA);
-    sc_start();
-    double elapsed_secs = double(clock() - simStartTime) / CLOCKS_PER_SEC;
-    report("\nSimulation took " + to_string(elapsed_secs) + " seconds\n");
-    delete simulation;
-}
-
-void SimulationManager::startTraceAnalyzer()
-{
-    string p = getenv("trace");
-    string run_tpr = p + " -f ";
-    run_tpr += "&";
-    system(run_tpr.c_str());
-}
-
-void SimulationManager::addTraceSetups(SimulationBatch &batch, tinyxml2::XMLElement *simulation)
-{
-    vector<Device> devices;
-    XMLElement *tracesetups = simulation->FirstChildElement("tracesetups");
-    XMLElement *simconfig = simulation->FirstChildElement("simconfig");
-    unsigned int numberOfTracePlayers = 1;
-    XMLElement *ntp = simconfig->FirstChildElement("NumberOfTracePlayers");
-    if (ntp != NULL)
-        ntp->QueryUnsignedAttribute("value", &numberOfTracePlayers);
-
-    for (XMLElement *tracesetup = tracesetups->FirstChildElement("tracesetup"); tracesetup != NULL; tracesetup = tracesetup->NextSiblingElement("tracesetup")) {
-        for (XMLElement *device = tracesetup->FirstChildElement("device"); device != NULL; device = device->NextSiblingElement("device")) {
-            devices.push_back(Device(device->GetText(), device->IntAttribute("clkMhz"), device->IntAttribute("bl")));
-        }
-
-        // This step is done here to add a default device in case the user haven't specified a trace file to be executed by one or more trace players.
-        while (devices.size() < numberOfTracePlayers) {
-            devices.push_back(Device());
-        }
-
-        batch.traceSetups.emplace(tracesetup->Attribute("id"), devices);
-        devices.clear();
-    }
-}
-
-void inline SimulationManager::tracePlayerTerminates()
-{
-    static unsigned int finishedTracePlayers = 0;
-    finishedTracePlayers++;
-
-    if (finishedTracePlayers == Configuration::getInstance().NumberOfTracePlayers)
-        simulation->terminateSimulation.notify();
-}
-void inline  SimulationManager::transactionFinished()
-{
-    remainingTransactions--;
-    loadbar(totalTransactions - remainingTransactions, totalTransactions);
-    if (remainingTransactions == 0)
-    {
-        cout << endl;
-    }
-}
-void SimulationManager::report(string message)
-{
-    cout << message << endl;
-}
-
-void SimulationBatch::print()
-{
-    for (auto& s : traceSetups)
-    {
-        cout << "trace-setup " + s.first + ":\n";
-        for (Device d : s.second)
-            cout << "\t(" << d.burstLength << ") " << d.trace << ";" << endl;
-        cout << endl;
-    }
-}

DRAMSys/simulator/src/simulation/StlPlayer.cpp

@@ -39,7 +39,12 @@
 
 #include "StlPlayer.h"
 
-StlPlayer::StlPlayer(sc_module_name, string pathToTrace, sc_time playerClk, TracePlayerListener *listener) : TracePlayer(listener), file(pathToTrace)
+StlPlayer::StlPlayer(sc_module_name,
+                     string pathToTrace,
+                     sc_time playerClk,
+                     TracePlayerListener *listener) :
+                     TracePlayer(listener),
+                     file(pathToTrace)
 {
     if (!file.is_open())
         SC_REPORT_FATAL(0, (string("Could not open trace ") + pathToTrace).c_str());
@@ -62,11 +67,16 @@ void StlPlayer::nextPayload()
             line.clear();
     }
 
-    if (!file) {
+    if (!file)
+    {
         // The file is empty. Nothing more to do.
-        this->terminate();
+        this->finish();
         return;
     }
+    else
+    {
+        numberOfTransactions++;
+    }
 
     // Allocate a generic payload for this request.
     gp *payload = this->allocatePayload();

DRAMSys/simulator/src/simulation/StlPlayer.h

@@ -49,7 +49,10 @@ using namespace tlm;
 struct StlPlayer: public TracePlayer
 {
 public:
-    StlPlayer(sc_module_name /*name*/, string pathToTrace, sc_time playerClk, TracePlayerListener *listener);
+    StlPlayer(sc_module_name /*name*/,
+              string pathToTrace,
+              sc_time playerClk,
+              TracePlayerListener *listener);
 
     void nextPayload();
 

DRAMSys/simulator/src/simulation/TraceGenerator.h

@@ -60,25 +60,25 @@ public:
 
     virtual void nextPayload() override
     {
-            if(transCounter >= 1000) // TODO set limit!
-            {
-                this->terminate();
-            }
+        if(transCounter >= 1000) // TODO set limit!
+        {
+            this->terminate();
+        }
 
-            gp* payload = this->allocatePayload();
+        gp* payload = this->allocatePayload();
 
-            unsigned char * dataElement = new unsigned char[16]; // TODO: column / burst breite
+        unsigned char * dataElement = new unsigned char[16]; // TODO: column / burst breite
 
-            payload->set_address(0x0);
-            payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
-            payload->set_dmi_allowed(false);
-            payload->set_byte_enable_length(0);
-            payload->set_streaming_width(this->burstlenght);
-            payload->set_data_ptr(dataElement);
-            payload->set_data_length(16);
-            payload->set_command(TLM_READ_COMMAND);
-            transCounter++;
-            this->payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
+        payload->set_address(0x0);
+        payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
+        payload->set_dmi_allowed(false);
+        payload->set_byte_enable_length(0);
+        payload->set_streaming_width(this->burstlenght);
+        payload->set_data_ptr(dataElement);
+        payload->set_data_length(16);
+        payload->set_command(TLM_READ_COMMAND);
+        transCounter++;
+        this->payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
     }
 
 private:

DRAMSys/simulator/src/simulation/TracePlayer.cpp

@@ -39,7 +39,12 @@
 #include "TracePlayer.h"
 
 TracePlayer::TracePlayer(TracePlayerListener* listener) :
-        payloadEventQueue(this, &TracePlayer::peqCallback), transactionsSent(0), listener(listener)
+        payloadEventQueue(this, &TracePlayer::peqCallback),
+        transactionsSent(0),
+        transactionsReceived(0),
+        listener(listener),
+        numberOfTransactions(0),
+        finished(false)
 {
     iSocket.register_nb_transport_bw(this, &TracePlayer::nb_transport_bw);
 }
@@ -49,6 +54,11 @@ gp *TracePlayer::allocatePayload()
     return memoryManager.allocate();
 }
 
+void TracePlayer::finish()
+{
+    finished = true;
+}
+
 void TracePlayer::terminate()
 {
     cout << sc_time_stamp() << " " << this->name() << " terminated " << std::endl;
@@ -87,6 +97,14 @@ void TracePlayer::peqCallback(tlm_generic_payload &payload, const tlm_phase &pha
         payload.release();
         if(Configuration::getInstance().SimulationProgressBar)
             listener->transactionFinished();
+
+        transactionsReceived++;
+
+        // If all answers were received:
+        if(finished == true && numberOfTransactions == transactionsReceived)
+        {
+            this->terminate();
+        }
     }
     else if (phase == END_RESP)
     {
@@ -97,6 +115,11 @@ void TracePlayer::peqCallback(tlm_generic_payload &payload, const tlm_phase &pha
     }
 }
 
+void TracePlayer::setNumberOfTransactions(unsigned int n)
+{
+    numberOfTransactions = n;
+}
+
 unsigned int TracePlayer::getNumberOfLines(string pathToTrace)
 {
     ifstream newFile;

DRAMSys/simulator/src/simulation/TracePlayer.h

@@ -67,8 +67,11 @@ public:
 protected:
     gp* allocatePayload();
     tlm_utils::peq_with_cb_and_phase<TracePlayer> payloadEventQueue;
+    void finish();
     void terminate();
     void printDebugMessage(std::string message);
+    void setNumberOfTransactions(unsigned int n);
+    unsigned int numberOfTransactions;
 
 private:
     tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay);
@@ -81,7 +84,9 @@ private:
     }
     MemoryManager memoryManager;
     unsigned int transactionsSent;
+    unsigned int transactionsReceived;
     TracePlayerListener* listener;
+    bool finished;
 };
 
 #endif /* TRACEPLAYER_H_ */

DRAMSys/simulator/src/simulation/TraceSetup.cpp

@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2017, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Matthias Jung
+ */
+
+#include "TraceSetup.h"
+
+traceSetup::traceSetup(std::string uri,
+                       std::string pathToResources,
+                       std::vector<StlPlayer *> * devices)
+{
+    // Load Simulation:
+    tinyxml2::XMLDocument simulationdoc;
+    loadXML(uri, simulationdoc);
+
+    tinyxml2::XMLElement* simulation =
+            simulationdoc.FirstChildElement("simulation");
+
+    std::string xmlNodeName(simulation->Name());
+    if( xmlNodeName != "simulation")
+        reportFatal("traceSetup",
+                    "Cannot load simulation: simulation node expected");
+
+    // Load TracePlayers:
+    tinyxml2::XMLElement *tracesetup =
+            simulation->FirstChildElement("tracesetup");
+
+    for (tinyxml2::XMLElement *device =
+         tracesetup->FirstChildElement("device");
+         device != NULL;
+         device = device->NextSiblingElement("device"))
+    {
+        sc_time playerClk;
+        unsigned int frequency = device->IntAttribute("clkMhz");
+
+        if (frequency == 0)
+        {
+            reportFatal("traceSetup","No Frequency Defined");
+        }
+        else
+        {
+            playerClk = FrequencyToClk(frequency);
+        }
+
+        std::string name = device->GetText();
+        std::string stlFile =  pathToResources + string("traces/") + name;
+        std::string moduleName = name;
+
+        // replace all '.' to '_'
+        std::replace( moduleName.begin(), moduleName.end(), '.', '_');
+
+        StlPlayer * player = new StlPlayer(moduleName.c_str(),
+                                           stlFile,
+                                           playerClk,
+                                           this);
+
+        devices->push_back(player);
+
+        if(Configuration::getInstance().SimulationProgressBar)
+        {
+            totalTransactions += player->getNumberOfLines(stlFile);
+        }
+    }
+
+    remainingTransactions = totalTransactions;
+    NumberOfTracePlayers = devices->size();
+}
+
+
+
+void traceSetup::tracePlayerTerminates()
+{
+    finishedTracePlayers++;
+
+    if (finishedTracePlayers == NumberOfTracePlayers)
+    {
+        sc_stop();
+    }
+}
+void traceSetup::transactionFinished()
+{
+    remainingTransactions--;
+
+    loadbar(totalTransactions - remainingTransactions, totalTransactions);
+
+    if (remainingTransactions == 0)
+    {
+        cout << endl;
+    }
+}

DRAMSys/simulator/src/simulation/TraceSetup.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015, University of Kaiserslautern
+ * Copyright (c) 2017, University of Kaiserslautern
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -30,80 +30,35 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * Authors:
- *    Janik Schlemminger
  *    Matthias Jung
- *    Eder F. Zulian
  */
 
-#ifndef SIMULATIONMANAGER_H_
-#define SIMULATIONMANAGER_H_
+#ifndef TRACESETUP_H
+#define TRACESETUP_H
 
 #include <vector>
 #include <string>
-#include <map>
-#include "Simulation.h"
+
+#include "../common/Utils.h"
 #include "TracePlayer.h"
 #include "StlPlayer.h"
-#include "../controller/core/configuration/ConfigurationLoader.h"
-#include "../common/third_party/tinyxml2/tinyxml2.h"
-#include "ExampleInitiator.h"
-#include "../common/tlm2_base_protocol_checker.h"
 
-#define USE_EXAMPLE_INITIATOR 0
 
-struct SimulationBatch
-{
-    std::vector<DramSetup> dramSetups;
-    std::map<std::string, std::vector<Device>> traceSetups;
-    void print();
-};
-
-class SimulationManager: public TracePlayerListener
+class traceSetup : public TracePlayerListener
 {
 public:
-    SimulationManager(std::string resources);
-    ~SimulationManager();
-
-    void loadSimulationsFromXML(std::string uri);
-
-    void runSimulations();
-    void startTraceAnalyzer();
+    traceSetup(std::string uri,
+               std::string pathToResources,
+               std::vector<StlPlayer*> * devices);
 
     virtual void tracePlayerTerminates() override;
     virtual void transactionFinished() override;
 
 private:
-    std::string resources;
-    std::string exportPath;
-    std::string basePath;
-
-    tinyxml2::XMLDocument simulationdoc;
-
-    std::vector<SimulationBatch> simulationBatches;
-
-    // A vector of pointers to all trace player (devices which acquire the bus
-    // and initiate transactions targeting the memory)
-    std::vector<TracePlayer*> players;
-    Simulation* simulation;
-    clock_t simStartTime;
-    //TLM 2.0 Protocol Checkers
-    std::vector<tlm_utils::tlm2_base_protocol_checker<>*> playersTlmCheckers;
-
+    unsigned int NumberOfTracePlayers;
     unsigned int totalTransactions = 0;
     unsigned int remainingTransactions;
-
-#if USE_EXAMPLE_INITIATOR
-    ExampleInitiator *init;
-    tlm_utils::tlm2_base_protocol_checker<>* exampleInitiatorTlmChecker;
-#endif
-    void instantiateModules(std::string traceName, DramSetup dramSetup, std::vector<Device> traceSetup);
-    void bindSockets();
-    void runSimulation(string traceName);
-    void parseSimulationBatch(tinyxml2::XMLElement* simulation);
-    void addTraceSetups(SimulationBatch &batch, tinyxml2::XMLElement *element);
-
-    void report(std::string message);
-
+    unsigned int finishedTracePlayers = 0;
 };
 
-#endif /* SIMULATIONMANAGER_H_ */
+#endif // TRACESETUP_H

DRAMSys/simulator/src/simulation/main.cpp

@@ -40,7 +40,8 @@
 #include <utility>
 #include <vector>
 
-#include "SimulationManager.h"
+#include "DRAMSys.h"
+#include "TraceSetup.h"
 
 using namespace std;
 
@@ -56,43 +57,53 @@ int main(int argc, char **argv)
     return sc_main(argc, argv);
 }
 
-
-void logo()
-{
-#define REDTXT(s) string(("\033[0;31m"+string((s))+"\033[0m"))
-#define BOLDBLUETXT(s) string(("\033[1;34m"+string((s))+"\033[0m"))
-    cout << endl;
-    cout << REDTXT("  |||") << endl;
-    cout << REDTXT(" +---+   Microelectronic Systems") << endl;
-    cout << REDTXT("=|   |=  Design Research Group") << endl;
-    cout << REDTXT("=|   |=  ") << BOLDBLUETXT("University of Kaiserslautern") << endl;
-    cout << REDTXT(" +---+   ") << endl;
-    cout << REDTXT("  |||    ") << "DRAMSys - Approximately-Timed TLM Models for DDR and Wide I/0 DRAM -" << endl;
-    cout << endl;
-#undef REDTXT
-#undef BOLDBLUETXT
-}
-
 int sc_main(int argc, char **argv)
 {
     sc_set_time_resolution(1, SC_PS);
-    resources = pathOfFile(argv[0]) + string("/../../DRAMSys/simulator/resources/");
 
-    cout << "Resources directory is " << resources << endl;
-    string simulationToRun;
+    // Get path of resources:
+    resources = pathOfFile(argv[0])
+              + string("/../../DRAMSys/simulator/resources/");
+
+    string SimulationXML;
     if(argc > 1)
-        simulationToRun = argv[1];
+    {
+        SimulationXML = argv[1];
+    }
     else
-        simulationToRun = resources + "simulations/sim-batch.xml";
-    cout << "Simulation file is " << simulationToRun << endl;
+    {
+        SimulationXML = resources + "simulations/ddr3-example.xml";
+    }
 
-    SimulationManager manager(resources);
+    std::vector<StlPlayer*> players;
 
-    logo();
-    cout << "Simulation file: \"" << simulationToRun << "\"";
-    manager.loadSimulationsFromXML(simulationToRun);
-    manager.runSimulations();
+    // Instantiate DRAMSys:
+    DRAMSys dramSys("DRAMSys", SimulationXML, resources);
+
+    // Instantiate STL Players:
+    traceSetup(SimulationXML, resources, &players);
+
+    // Bind STL Players with DRAMSys:
+    for(auto& p : players)
+    {
+        p->iSocket.bind(dramSys.tSocket);
+    }
+
+    // Store the starting of the simulation in wallclock time:
+    clock_t simStartTime = clock();
+
+    // Kickstart the players:
+    for (auto& p : players)
+    {
+        p->nextPayload();
+    }
+
+    // Start SystemC Simulation:
+    sc_set_stop_mode(SC_STOP_FINISH_DELTA);
+    sc_start();
+
+    double elapsed_secs = double(clock() - simStartTime) / CLOCKS_PER_SEC;
+    cout << "Simulation took " + to_string(elapsed_secs) + " seconds" << endl;
 
     return 0;
 }
-

README.md

@@ -87,7 +87,7 @@ They are:
 
   For further information refer to [this](http://qwt.sourceforge.net/)
 
-- python3.5
+- python3.5 or 3.6
 
   In Debian like distros:
   
@@ -96,14 +96,6 @@ They are:
   $ sudo apt-get install python3.5-dev
   ```
 
-- libboost_filesystem and libboost_system
-
-  In Debian like distros:
-  
-  ```bash
-  $ sudo apt-get install libboost-all-dev
-  ```
-
 - Others
    
   Some basic libraries may be already installed in your system. If not you can
@@ -135,8 +127,6 @@ export PYTHON_HOME=<path>
 export PYTHON_HEADERS=<path>
 export LIBQWT_HOME=<path>
 export LIBQWT_HEADERS=<path>
-export LIBBOOST_HOME=<path>
-export LIBBOOST_HEADERS=<path>
 ```
 
 Users interested in thermal simulation can also add some extra environment
@@ -276,26 +266,6 @@ export PATH
 $ cd /Library/Frameworks
 $ sudo ln -s /opt/qwt-6.1.2/lib/qwt.framework/ .
 ```
-
-- The boost library can be installed manually or through homebrew:
-
-Manually: Install boost lib (filesystem & system) in /opt/boost
-
-``` bash
-$ ./bootstrap.sh --prefix=/opt/boost --with-libraries=filesystem,system
-$ sudo ./b2 install
-```
-
-Homebrew: Install boost lib (all, which consumes large storage) in 
-```
-/usr/local/Cellar 
-```
-
-``` bash
-$ brew install boost
-```
-
-
 - Export correct Environment Variables in your terminal's profile, e.g:
 
 ``` bash
@@ -317,12 +287,6 @@ export PYTHON_HEADERS=/Library/Frameworks/Python.framework/Versions/3.5/Headers
 
 export LIBQWT_HOME=/opt/qwt-6.1.4/lib
 export LIBQWT_HEADERS=/opt/qwt-6.1.4/lib/qwt.framework/Headers
-export LIBBOOST_HOME=/opt/boost/lib
-export LIBBOOST_HEADERS=/opt/boost/include
-
-# Add Boost Lib into Dynamic Lib Path
-DYLD_LIBRARY_PATH="/opt/boost/lib:${DYLD_LIBRARY_PATH}"
-export DYLD_LIBRARY_PATH
 ```
 
 -  For the trace analyzer the file:
@@ -474,105 +438,6 @@ The IP address and the port number related to the server shall be informed in
 DRAMSys' configuration to subsequent use by DRAMSys to access the thermal
 simulation server.
 
-#### Usage Example
-
-The DRAMSys' main configuration file is presented below.
-
-``` xml
-<simulation>
-    <!-- General Simulator Configuration (used for all simulation setups) -->
-    <simconfig>
-        <Debug value="1" />
-        <DatabaseRecording value="1" />
-        <PowerAnalysis value="1" />
-        <EnableWindowing value = "1" />
-        <WindowSize value="1000" />
-        <NumberOfTracePlayers value="1"/>
-        <NumberOfMemChannels value="4"/>
-        <ControllerCoreDisableRefresh value="0"/>
-        <ThermalSimulation value="1"/>
-        <SimulationProgressBar value="1"/>
-        <NumberOfDevicesOnDIMM value = "1" />
-        <CheckTLM2Protocol value = "0" />  
-    </simconfig>
-
-    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
-    <thermalsimconfig>
-        <TemperatureScale value="Celsius" />
-        <StaticTemperatureDefaultValue value="23" />
-        <ThermalSimPeriod value="100" />
-        <ThermalSimUnit value="us" />
-        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
-        <IceServerIp value="127.0.0.1" />
-        <IceServerPort value="11880" />
-        <SimPeriodAdjustFactor value="10" />
-        <NPowStableCyclesToIncreasePeriod value="5" />
-        <GenerateTemperatureMap value="1" />
-        <GeneratePowerMap value="1" />
-    </thermalsimconfig>
-
-    <memspecs>
-        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
-    </memspecs>
-
-    <addressmappings>
-        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
-    </addressmappings>
-
-    <memconfigs>
-        <memconfig src="../../DRAMSys/simulator/resources/configs/memconfigs/fr_fcfs.xml"/>
-    </memconfigs>
-
-    <tracesetups>
-        <tracesetup id="fifo">
-            <device clkMhz="1000">../../../tests/error/test_error.stl</device>
-        </tracesetup>
-    </tracesetups>
-
-</simulation>
-```
-
-Enable the error model in fr_fcfs.xml.
-
-``` xml
-<memconfig>
-    <BankwiseLogic value="0"/>
-    <OpenPagePolicy value="1" />
-    <MaxNrOfTransactions value="8" />
-    <Scheduler value="FR_FCFS" />
-    <Capsize value="5" />
-    <PowerDownMode value="NoPowerDown"/>
-    <PowerDownTimeout value="100" />
-    <!-- Error Model: -->
-    <ErrorChipSeed value="42" />
-    <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
-    <StoreMode value="ErrorModel" />
-</memconfig>
-```
-
-Generate the input trace file for DRAMSys.
-
-``` bash
-$ cd DRAMSys/tests/error/
-$ ./generateErrorTest.pl > test_error.stl 
-```
-
-Start the 3D-ICE server providing the stack file and the port number.
-
-``` bash
-$ cd DRAMSys/simulator/resources/configs/thermalsim
-$ 3D-ICE-Server stack.stk 11880
-```
-
-In another terminal or terminal tab start DRAMSys. Here the program's output
-is redirected to a file.
-
-``` bash
-$ cd build/simulator/
-$ ./dramSys > output
-```
-
 ### DRAMSys Configuration
 
 The **dramSys** executable supports one argument which is a XML file that
@@ -583,72 +448,32 @@ The XML code below shows a typic configuration:
 
 ``` xml
 <simulation>
-
-    <!-- General Simulator Configuration (used for all simulation setups) -->
-    <simconfig>
-        <Debug value="1"/>
-        <DatabaseRecording value="1"/>
-        <PowerAnalysis value="1"/>
-        <EnableWindowing value = "1" />
-        <WindowSize value="1000" />
-        <NumberOfTracePlayers value="5"/>
-        <NumberOfMemChannels value="1"/>
-        <ControllerCoreDisableRefresh value="0"/>
-        <ThermalSimulation value="0"/>
-        <SimulationProgressBar value="1"/>
-        <NumberOfDevicesOnDIMM value = "1" /> 
-        <CheckTLM2Protocol value = "0" />       
-    </simconfig>
-
-    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
-    <thermalsimconfig>
-        <TemperatureScale value="Celsius" />
-        <StaticTemperatureDefaultValue value="89" />
-        <ThermalSimPeriod value="100" />
-        <ThermalSimUnit value="ms" />
-        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/power_thresholds.xml"/>
-        <IceServerIp value="127.0.0.1" />
-        <IceServerPort value="11880" />
-        <SimPeriodAdjustFactor value="10" />
-        <NPowStableCyclesToIncreasePeriod value="5" />
-        <GenerateTemperatureMap value="1" />
-        <GeneratePowerMap value="1" />
-    </thermalsimconfig>
-
-    <!-- Memory Specifications -->
-    <memspecs>
-        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
-    </memspecs>
-
-    <!-- Address Mappings -->
-    <addressmappings>
-        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
-    </addressmappings>
-
-    <!-- Memory Configurations -->
-    <memconfigs>
-        <memconfig src="../../DRAMSys/simulator/resources/configs/memconfigs/fifo.xml"/>
-    </memconfigs>
-
-    <!-- Trace Setups -->
-    <tracesetups>
-        <!-- Multiple trace setups are allowed for the same simulation setup -->
-        <tracesetup id="fifo">
-            <!--
-            Specify here a trace file for each of the trace players. Trace
-            players without a file will not generate transactions.
-            It is also possible to choose "cklMhz" and the "bl" for every
-            player.
-            -->
-            <device clkMhz="200">voco2.stl</device>
-            <device clkMhz="200">voco2.stl</device>
-            <device clkMhz="200">voco2.stl</device>
-        </tracesetup>
-    </tracesetups>
-
+    <!-- Configuration for the DRAMSys Simulator -->
+    <simconfig src="ddr3.xml" />
+    <!-- Temperature Simulator Configuration -->
+    <thermalconfig src="config.xml" />
+    <!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
+    <memspec src="MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
+    <!-- Addressmapping Configuration of the Memory Controller -->
+    <addressmapping src="am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml"></addressmapping>
+    <!-- Memory Controller Configuration: -->
+    <mcconfig src="fifoStrict.xml"/>
+    <!--
+    The following trace setup is only used in standalone mode.
+    In library mode e.g. in Platform Architect the trace setup is ignored.
+    -->
+    <tracesetup>
+        <!--
+        Specify here a trace file for each of the trace players. Trace
+        players without a file will not generate transactions.
+        It is also possible to choose "cklMhz" and the "bl" for every
+        player.
+        -->
+        <device clkMhz="200">ddr3_example.stl</device>
+        <device clkMhz="200">ddr3_example.stl</device>
+    </tracesetup>
 </simulation>
 ```
-
 Some configuration fields reference other XML files which contain more
 specialized chunks of the configuration like memory specification, address
 mapping and memory configurations.
@@ -668,18 +493,25 @@ each of the simulation setups.
 A single **trace setup** is composed of an id string and one or more
 **devices**.
 
-The **device** configuration consists of two configuration fields - clkMhz
-(operation frequency for this device) and bl (burst length) - and a
-**trace file**.
+The **device** configuration consists of two parameters - clkMhz
+(operation frequency for this device) - and a **trace file**.
 
 A **trace file** is a pre-recorded file containing memory transactions. Each
 memory transaction has a timestamp that tells the simulator when it shall
 happen, a transaction type (e.g. read, write) and a memory address.
 
-A **trace player** is **equivalent** to a bus master **device** (i.e. a device
-that locks a bus and generates memory transactions). By adding device elements
-into the trace setup section one can specify the operation frequency, the
-burst length and the trace file to be used by trace players.
+Here is an example syntax:
+```
+31:	read	0x400140
+33:	read	0x400160
+56:	read	0x7fff8000
+81:	read	0x400180
+```
+
+A **trace player** is **equivalent** to a bus master **device**
+(e.g. a processor). By adding device elements into the trace setup section
+one can specify the operation frequency, the burst length and the trace file
+to be used by trace players.
 
 Trace players without a corresponding device configuration do not generate
 transactions.
@@ -689,13 +521,34 @@ providing **flexibility** for **exhaustive explorations.**
 
 #### Configuration File Sections
 
-The main configuration file is divided into self-contained sections, each of
-these sections is a set of logically related configuration aspects for the
-simulation.
+The main configuration file is divided into self-contained sections. Each of
+these sections refers to sub-configuration files.
 
-Below are listed the configuration sections and configuration fields.
+Below, the sub-configurations are listed and explained.
 
 - **Simulator Configuration**
+
+  The content of
+  [ddr3.xml](DRAMSys/simulator/resources/configs/simulator/ddr3.xml) is
+  presented below as an example.
+
+  ```xml
+  <simconfig>
+      <SimulationName value="ddr3" />
+      <Debug value="0" />
+      <DatabaseRecording value="1" />
+      <PowerAnalysis value="1" />
+      <EnableWindowing value = "1" />
+      <WindowSize value="100" />
+      <ThermalSimulation value="0"/>
+      <SimulationProgressBar value="1"/>
+      <NumberOfMemChannels value="1"/>
+      <NumberOfDevicesOnDIMM value = "8" />
+  </simconfig>
+  ```
+
+  - *SimulationName* (boolean)
+    - Give the name of the simulation for distingushing from other simulations.
   - *Debug* (boolean)
     - "1": enables debug output on console
     - "0": disables debug output
@@ -714,9 +567,6 @@ Below are listed the configuration sections and configuration fields.
     - Number of trace players
   - *NumberOfMemChannels* (unsigned int)
     - Number of memory channels
-  - *ControllerCoreDisableRefresh* (boolean)
-    - "1": disables refreshes
-    - "0": normal operation (refreshes enabled)
   - *ThermalSimulation* (boolean)
     - "1": enables thermal simulation
     - "0": static temperature during simulation
@@ -730,6 +580,27 @@ Below are listed the configuration sections and configuration fields.
     - "0": disables the TLM 2.0 Protocol Checking 
 
 - **Temperature Simulator Configuration**
+
+  The content of
+  [config.xml](DRAMSys/simulator/resources/configs/thermalsim/config.xml) is
+  presented below as an example.
+
+  ```xml
+  <thermalsimconfig>
+      <TemperatureScale value="Celsius" />
+      <StaticTemperatureDefaultValue value="89" />
+      <ThermalSimPeriod value="100" />
+      <ThermalSimUnit value="us" />
+      <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
+      <IceServerIp value="127.0.0.1" />
+      <IceServerPort value="11880" />
+      <SimPeriodAdjustFactor value="10" />
+      <NPowStableCyclesToIncreasePeriod value="5" />
+      <GenerateTemperatureMap value="1" />
+      <GeneratePowerMap value="1" />
+  </thermalsimconfig>
+  ```
+
   - *TemperatureScale* (string)
     - "Celsius"
     - "Fahrenheit"
@@ -764,8 +635,8 @@ Below are listed the configuration sections and configuration fields.
 
 - **Memory Specification**
 
-  A file with memory specifications. This information comes from datasheet and
-  usually does not change.
+  A file with memory specifications. This information comes from datasheets and
+  measurements, and usually does not change.
 
 - **Address Mapping**
 
@@ -808,19 +679,26 @@ Below are listed the configuration sections and configuration fields.
   presented below as an example.
 
   ``` xml
-  <memconfig>
-    <BankwiseLogic value="0"/>
-    <OpenPagePolicy value="1"/>
-    <MaxNrOfTransactions value="8"/>
-    <Scheduler value="FIFO_STRICT"/>
-    <Capsize value="5"/>
-    <PowerDownMode value="NoPowerDown"/>
-    <PowerDownTimeout value="100"/>
-    <!-- Error Modelling -->
-    <ErrorChipSeed value="42"/>
-    <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
-    <StoreMode value="NoStorage"/>
-  </memconfig>
+  <mcconfig>
+      <BankwiseLogic value="0"/>
+      <OpenPagePolicy value="1" />
+      <MaxNrOfTransactions value="8" />
+      <Scheduler value="FIFO" />
+      <Capsize value="5" />
+      <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+      <PowerDownMode value="NoPowerDown" />
+      <PowerDownTimeout value="100" />
+      <!-- Error Modelling -->
+      <ErrorChipSeed value="42" />
+      <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
+      <!-- Modes:
+          - NoStorage,
+          - Store (store data without errormodel),
+          - ErrorModel (store data with errormodel)
+      -->
+      <StoreMode value="NoStorage" />
+      <ControllerCoreDisableRefresh value="0"/>
+  </mcconfig>
   ```
 
   - *BankwiseLogic* (boolean)
@@ -856,17 +734,13 @@ Below are listed the configuration sections and configuration fields.
     - "NoStorage": no storage
     - "Store": store data without error model
     - "ErrorModel": store data with error model [6]
+  - *ControllerCoreDisableRefresh* (boolean)
+    - "1": disables refreshes
+    - "0": normal operation (refreshes enabled)
 
 - **Trace Setups**
-  - *id* (string)
-    - Trace setup id. Two kinds of output files are generated by DRAMSys:
-      SQLite databases containing transactions related to each memory channel
-      (.tdb) and a text file (.txt) with the program output. The base name for
-      these files comes from this field.
   - *clkMhz* (unsigned int)
     - Speed of the trace player
-  - *bl* (unsigned int)
-    - Burst length
   - *trace file*
     - A pre-recorded file containing memory transactions to be executed by a
       trace player.
@@ -894,6 +768,77 @@ A description of the content each directory follows.
   - **traces**: trace files for simulations. They contain accesses to memory
     in certain known scenarios.
 
+#### Usage Example with Thermal Simulation
+
+The DRAMSys' main configuration file is presented below.
+
+``` xml
+<simulation>
+    <!-- Configuration for the DRAMSys Simulator -->
+    <simconfig src="wideio_thermal.xml" />
+    <!-- Temperature Simulator Configuration -->
+    <thermalconfig src="confi.xml" />
+    <!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
+    <memspec src="WideIO.xml"></memspec>
+    <!-- Addressmapping Configuration of the Memory Controller -->
+    <addressmapping src="am_wideio.xml"></addressmapping>
+    <!-- Memory Controller Configuration: -->
+    <mcconfig src="fr_fcfs.xml"/>
+    <!--
+    The following trace setup is only used in standalone mode.
+    In library mode e.g. in Platform Architect the trace setup is ignored.
+    -->
+    <tracesetup>
+        <!--
+        This device mimics an image processing application
+        running on an FPGA with 200 Mhz.
+        -->
+        <device clkMhz="1000">test_error.stl</device>
+    </tracesetup>
+</simulation>
+```
+
+Enable the error model in fr_fcfs.xml.
+
+``` xml
+<memconfig>
+    <BankwiseLogic value="0"/>
+    <OpenPagePolicy value="1" />
+    <MaxNrOfTransactions value="8" />
+    <Scheduler value="FR_FCFS" />
+    <Capsize value="5" />
+    <PowerDownMode value="NoPowerDown"/>
+    <PowerDownTimeout value="100" />
+    <!-- Error Model: -->
+    <ErrorChipSeed value="42" />
+    <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
+    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
+    <StoreMode value="ErrorModel" />
+</memconfig>
+```
+
+Generate the input trace file for DRAMSys.
+
+``` bash
+$ cd DRAMSys/tests/error/
+$ ./generateErrorTest.pl > test_error.stl
+```
+
+Start the 3D-ICE server providing the stack file and the port number.
+
+``` bash
+$ cd DRAMSys/simulator/resources/configs/thermalsim
+$ 3D-ICE-Server stack.stk 11880
+```
+
+In another terminal or terminal tab start DRAMSys. Here the program's output
+is redirected to a file.
+
+``` bash
+$ cd build/simulator/
+$ ./dramSys > output
+```
+
 #### DRAMsys Diagrams
 
 - **Payload Extension information**