TLM 2.0 Compliance Test

DRAMSys/tests/TLM_compliance/fifoStrict.xml

@@ -0,0 +1,15 @@
+<memconfig>
+    <BankwiseLogic value="0"/>
+    <OpenPagePolicy value="1" />
+    <MaxNrOfTransactions value="8" />
+    <Scheduler value="FIFO_STRICT" />
+    <Capsize value="5" />
+    <PowerDownMode value="NoPowerDown" />
+    <PowerDownTimeout value="100" />
+    <!-- Error Modelling -->
+    <ErrorChipSeed value="42" />
+    <ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
+    <!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
+    <StoreMode value="NoStorage"/>
+</memconfig>
+

DRAMSys/tests/TLM_compliance/sim-batch.xml

@@ -0,0 +1,51 @@
+<simulation>
+    <!-- General Simulator Configuration (used for all simulation setups) -->
+    <simconfig>
+        <Debug value="0" />
+        <DatabaseRecording value="1" />
+        <PowerAnalysis value="1" />
+        <EnableWindowing value = "0" />
+        <WindowSize value="1000" />
+        <NumberOfTracePlayers value="1"/>
+        <NumberOfMemChannels value="4"/>
+        <ControllerCoreDisableRefresh value="0"/>
+        <ThermalSimulation value="0"/>
+        <SimulationProgressBar value="1"/>
+        <NumberOfDevicesOnDIMM value = "1" />
+        <CheckTLM2Protocol value = "1" />
+    </simconfig>
+
+    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
+    <thermalsimconfig>
+        <TemperatureScale value="Celsius" />
+        <StaticTemperatureDefaultValue value="89" />
+        <ThermalSimPeriod value="10" />
+        <ThermalSimUnit value="ms" />
+        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
+        <IceServerIp value="127.0.0.1" />
+        <IceServerPort value="11880" />
+        <SimPeriodAdjustFactor value="10" />
+        <NPowStableCyclesToIncreasePeriod value="5" />
+        <GenerateTemperatureMap value="1" />
+        <GeneratePowerMap value="1" />
+    </thermalsimconfig>
+
+    <memspecs>
+        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
+    </memspecs>
+
+    <addressmappings>
+        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
+    </addressmappings>
+
+    <memconfigs>
+        <memconfig src="../../DRAMSys/tests/TLM_compliance/fifoStrict.xml"/>
+    </memconfigs>
+
+    <tracesetups>
+        <tracesetup id="TLM_compliance_test">
+            <device clkMhz="200">chstone-adpcm_32.stl</device>
+        </tracesetup>
+    </tracesetups>
+
+</simulation>

DRAMSys/tests/TLM_compliance/test.pl

@@ -0,0 +1,88 @@
+#!/usr/bin/perl -w
+# Copyright (c) 2015, University of Kaiserslautern
+# All rights reserved.
+# 
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+# 
+# 1. Redistributions of source code must retain the above copyright notice,
+#    this list of conditions and the following disclaimer.
+# 
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 
+# 3. Neither the name of the copyright holder nor the names of its
+#    contributors may be used to endorse or promote products derived from
+#    this software without specific prior written permission.
+# 
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# 
+# Authors:
+#    Matthias Jung, Felipe S. Prado
+#
+
+# Test TLM Compliance:
+# This test runs the simulation with standard configuration
+
+# Run Simulation:
+
+$numberOfCores = `cat /proc/cpuinfo | grep processor | wc -l`;
+
+chdir("../../../build/simulator/");
+
+$exampleInitiatorLine = `grep -n '#define USE_EXAMPLE_INITIATOR' ../../DRAMSys/simulator/src/simulation/Simulation.h | cut -d: -f 1`;
+chomp $exampleInitiatorLine;
+
+system("sed -i '" . $exampleInitiatorLine . "s^.*^#define USE_EXAMPLE_INITIATOR 1^' ../../DRAMSys/simulator/src/simulation/Simulation.h");
+
+`make -j$numberOfCores > /dev/null 2>&1`;
+
+$storeModeLine = `grep -n '<StoreMode value=' ../../DRAMSys/tests/TLM_compliance/fifoStrict.xml | cut -d: -f 1`;
+chomp $storeModeLine;
+
+system("sed -i '" . $storeModeLine . "s^.*^    <StoreMode value=\"Store\"/>^' ../../DRAMSys/tests/TLM_compliance/fifoStrict.xml");
+
+`./dramSys ../../DRAMSys/tests/TLM_compliance/sim-batch.xml &> ../../DRAMSys/tests/TLM_compliance/output.txt`;
+
+if("" ne `grep "Error: tlm2_protocol_checker" ../../DRAMSys/tests/TLM_compliance/output.txt`)
+{
+    exit -1;
+}
+
+system("sed -i '" . $exampleInitiatorLine . "s^.*^#define USE_EXAMPLE_INITIATOR 0^' ../../DRAMSys/simulator/src/simulation/Simulation.h");
+
+`make -j$numberOfCores > /dev/null 2>&1`;
+
+system("sed -i '" . $storeModeLine . "s^.*^    <StoreMode value=\"NoStorage\"/>^' ../../DRAMSys/tests/TLM_compliance/fifoStrict.xml");
+
+`rm -f sim-batch/TLM_compliance_test*.tdb`;
+
+`./dramSys ../../DRAMSys/tests/TLM_compliance/sim-batch.xml &> ../../DRAMSys/tests/TLM_compliance/output.txt`;
+
+if("" ne `grep "Error: tlm2_protocol_checker" ../../DRAMSys/tests/TLM_compliance/output.txt`)
+{
+    exit -1;
+}
+exit 0;
+
+
+
+
+
+
+
+
+
+

DRAMSys/tests/tests.pri

@@ -22,6 +22,11 @@ OTHER_FILES += tests/timing_compliance/sim-batch.xml
 OTHER_FILES += tests/timing_compliance/fifoStrict.xml
 OTHER_FILES += tests/timing_compliance/test.pl
 
+# TLM compliance test
+OTHER_FILES += tests/TLM_compliance/sim-batch.xml
+OTHER_FILES += tests/TLM_compliance/fifoStrict.xml
+OTHER_FILES += tests/TLM_compliance/test.pl
+
 # python unit tests
 OTHER_FILES += tests/unit/unit_test.py
 OTHER_FILES += tests/unit/mem_util.py