Add LPDDR5 regression test
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/*
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* Copyright (c) 2021, RPTU Kaiserslautern-Landau
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors:
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* Derek Christ
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*/
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#include <DRAMSys/config/DRAMSysConfiguration.h>
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#include <DRAMSys/util/json.h>
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#include <fstream>
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#include <iostream>
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using namespace DRAMSys::Config;
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DRAMSys::Config::AddressMapping getAddressMapping()
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{
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return DRAMSys::Config::AddressMapping{
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{{0, 1}},
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{{2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12}},
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{{16}},
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{{13, 14, 15}},
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{{17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32}},
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{{33}},
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{{}},
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{{}}
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};
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}
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DRAMSys::Config::McConfig getMcConfig()
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{
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return McConfig{
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PagePolicy::Open,
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Scheduler::FrFcfs,
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0,
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0,
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SchedulerBuffer::Bankwise,
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8,
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CmdMux::Oldest,
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RespQueue::Fifo,
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RefreshPolicy::AllBank,
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0,
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0,
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PowerDownPolicy::NoPowerDown,
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Arbiter::Simple,
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128,
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{}
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};
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}
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DRAMSys::Config::SimConfig getSimConfig()
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{
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return DRAMSys::Config::SimConfig{
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0, false, true, false, false, {"error.csv"},
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42, false, {"ddr5"}, true, DRAMSys::Config::StoreMode::NoStorage, false, false,
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1000};
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}
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DRAMSys::Config::TracePlayer getTracePlayer()
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{
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DRAMSys::Config::TracePlayer player;
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player.clkMhz = 100;
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player.name = "mytrace.stl";
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return player;
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}
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DRAMSys::Config::TraceGenerator getTraceGeneratorOneState()
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{
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DRAMSys::Config::TraceGenerator gen;
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gen.clkMhz = 100;
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gen.name = "MyTestGen";
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DRAMSys::Config::TraceGeneratorTrafficState state0;
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state0.numRequests = 1000;
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state0.rwRatio = 0.5;
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state0.addressDistribution = DRAMSys::Config::AddressDistribution::Random;
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state0.addressIncrement = {};
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state0.minAddress = {};
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state0.maxAddress = {};
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state0.clksPerRequest = {};
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gen.states.emplace(0, state0);
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return gen;
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}
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DRAMSys::Config::TraceGenerator getTraceGeneratorMultipleStates()
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{
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DRAMSys::Config::TraceGenerator gen;
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gen.clkMhz = 100;
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gen.name = "MyTestGen";
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gen.maxPendingReadRequests = 8;
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DRAMSys::Config::TraceGeneratorTrafficState state0;
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state0.numRequests = 1000;
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state0.rwRatio = 0.5;
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state0.addressDistribution = DRAMSys::Config::AddressDistribution::Sequential;
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state0.addressIncrement = 256;
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state0.minAddress = {};
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state0.maxAddress = 1024;
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state0.clksPerRequest = {};
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DRAMSys::Config::TraceGeneratorTrafficState state1;
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state1.numRequests = 100;
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state1.rwRatio = 0.75;
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state1.addressDistribution = DRAMSys::Config::AddressDistribution::Sequential;
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state1.addressIncrement = 512;
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state1.minAddress = 1024;
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state1.maxAddress = 2048;
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state1.clksPerRequest = {};
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gen.states.emplace(0, state0);
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gen.states.emplace(1, state1);
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DRAMSys::Config::TraceGeneratorStateTransition transistion0{1, 1.0};
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gen.transitions.emplace(0, transistion0);
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return gen;
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}
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DRAMSys::Config::TraceHammer getTraceHammer()
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{
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DRAMSys::Config::TraceHammer hammer;
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hammer.clkMhz = 100;
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hammer.name = "MyTestHammer";
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hammer.numRequests = 4000;
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hammer.rowIncrement = 2097152;
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return hammer;
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}
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DRAMSys::Config::TraceSetup getTraceSetup()
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{
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using namespace DRAMSys::Config;
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std::vector<std::variant<TracePlayer, TraceGenerator, TraceHammer>> initiators;
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initiators.emplace_back(getTracePlayer());
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initiators.emplace_back(getTraceGeneratorOneState());
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initiators.emplace_back(getTraceGeneratorMultipleStates());
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initiators.emplace_back(getTraceHammer());
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return DRAMSys::Config::TraceSetup{initiators};
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}
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DRAMSys::Config::Configuration getConfig(const DRAMSys::Config::MemSpec &memSpec)
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{
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return DRAMSys::Config::Configuration{
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getAddressMapping(),
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getMcConfig(),
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memSpec,
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getSimConfig(),
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"std::string_simulationId",
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// {{}, false}, works too
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getTraceSetup(),
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};
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}
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int main()
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{
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DRAMSys::Config::Configuration conf = DRAMSys::Config::from_path("ddr5.json");
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std::ofstream fileout("myjson.json");
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json_t j_my;
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j_my["simulation"] = getConfig(conf.memSpec); // just copy memspec over
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fileout << j_my.dump(4);
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std::ifstream file2("hbm2.json");
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json_t hbm2_j = json_t::parse(file2, nullptr, false);
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json_t hbm2_config = hbm2_j.at("simulation");
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DRAMSys::Config::Configuration hbm2conf = hbm2_config.get<DRAMSys::Config::Configuration>();
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std::ofstream filehbm2("myhbm2.json");
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json_t j_myhbm2;
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j_myhbm2["simulation"] = hbm2conf;
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filehbm2 << j_myhbm2.dump(4);
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std::ifstream file3("myjson.json");
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json_t ddr5_old = json_t::parse(file3, nullptr, false);
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json_t ddr5_old_conf = ddr5_old.at("simulation");
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DRAMSys::Config::Configuration ddr5_old_config = ddr5_old_conf.get<DRAMSys::Config::Configuration>();
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std::ofstream fileoldout("myjson2.json");
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json_t j_oldconfconv;
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j_oldconfconv["simulation"] = ddr5_old_config;
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fileoldout << j_oldconfconv.dump(4);
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}
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