Merge branch 'push-mzklqwzqwlxw' into 'develop'

Update to SystemC 3.0.1

See merge request ems/astdm/modeling.dram/dram.sys.5!125

CMakeLists.txt

@@ -116,13 +116,10 @@ if (DRAMSYS_USE_FETCH_CONTENT)
 
         FetchContent_Declare(
             SystemCLanguage
-            URL https://github.com/accellera-official/systemc/archive/refs/tags/2.3.4.tar.gz
+            URL https://github.com/accellera-official/systemc/archive/refs/tags/3.0.1.tar.gz
             OVERRIDE_FIND_PACKAGE
         )
 
-        # TODO: remove with SystemC 3.0
-        set(CMAKE_CXX_STANDARD ${CMAKE_CXX_STANDARD} CACHE STRING "")
-
         FetchContent_MakeAvailable(SystemCLanguage)
 
         # Set include directories to SYSTEM to suppress warnings

src/libdramsys/DRAMSys/controller/Controller.h

@@ -76,7 +76,6 @@ public:
                const SimConfig& simConfig,
                const AddressDecoder& addressDecoder,
                TlmRecorder* tlmRecorder);
-    SC_HAS_PROCESS(Controller);
 
     [[nodiscard]] bool idle() const { return totalNumberOfPayloads == 0; }
     void registerIdleCallback(std::function<void()> idleCallback);

src/libdramsys/DRAMSys/simulation/Arbiter.h

@@ -73,7 +73,6 @@ protected:
             const McConfig& mcConfig,
             const MemSpec& memSpec,
             const AddressDecoder& addressDecoder);
-    SC_HAS_PROCESS(Arbiter);
 
     void end_of_elaboration() override;
 
@@ -117,7 +116,6 @@ public:
                   const McConfig& mcConfig,
                   const MemSpec& memSpec,
                   const AddressDecoder& addressDecoder);
-    SC_HAS_PROCESS(ArbiterSimple);
 
 private:
     void end_of_elaboration() override;
@@ -134,7 +132,6 @@ public:
                 const McConfig& mcConfig,
                 const MemSpec& memSpec,
                 const AddressDecoder& addressDecoder);
-    SC_HAS_PROCESS(ArbiterFifo);
 
 private:
     void end_of_elaboration() override;
@@ -158,7 +155,6 @@ public:
                    const McConfig& mcConfig,
                    const MemSpec& memSpec,
                    const AddressDecoder& addressDecoder);
-    SC_HAS_PROCESS(ArbiterReorder);
 
 private:
     void end_of_elaboration() override;

src/libdramsys/DRAMSys/simulation/DRAMSys.h

@@ -71,7 +71,6 @@ class DRAMSys : public sc_core::sc_module
 public:
     tlm_utils::multi_passthrough_target_socket<DRAMSys> tSocket{"DRAMSys_tSocket"};
 
-    SC_HAS_PROCESS(DRAMSys);
     DRAMSys(const sc_core::sc_module_name& name, const Config::Configuration& config);
 
     ~DRAMSys() override;

src/libdramsys/DRAMSys/simulation/Dram.h

@@ -93,7 +93,6 @@ public:
          const SimConfig& simConfig,
          const MemSpec& memSpec,
          TlmRecorder* tlmRecorder);
-    SC_HAS_PROCESS(Dram);
 
     Dram(const Dram&) = delete;
     Dram(Dram&&) = delete;

src/simulator/simulator/Cache.h

@@ -63,7 +63,6 @@ public:
           sc_core::sc_time cycleTime,
           std::size_t hitCycles,
           DRAMSys::MemoryManager& memoryManager);
-    SC_HAS_PROCESS(Cache);
 
 private:
     void peqCallback(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase);

src/simulator/simulator/EccModule.h

@@ -55,7 +55,6 @@ public:
     tlm_utils::simple_target_socket<EccModule> tSocket;
 
     EccModule(sc_core::sc_module_name const& name, DRAMSys::AddressDecoder const& addressDecoder);
-    SC_HAS_PROCESS(EccModule);
 
 private:
     using Block = uint64_t;

src/simulator/simulator/request/RequestIssuer.h

@@ -60,7 +60,6 @@ public:
                   std::optional<unsigned int> maxPendingWriteRequests,
                   std::function<void()> transactionFinished,
                   std::function<void()> terminate);
-    SC_HAS_PROCESS(RequestIssuer);
 
     uint64_t totalRequests() { return producer->totalRequests(); };
 

tests/tests_dramsys/b_transport/b_transport.cpp

@@ -83,7 +83,6 @@ struct BlockingInitiator : sc_core::sc_module
         SC_THREAD(readAccess);
         SC_THREAD(writeAccess);
     }
-    SC_HAS_PROCESS(BlockingInitiator);
 
     void readAccess()
     {

tests/tests_simulator/cache/ListInitiator.h

@@ -43,7 +43,6 @@ class ListInitiator : public sc_core::sc_module
 public:
     tlm_utils::simple_initiator_socket<ListInitiator> iSocket;
 
-    SC_HAS_PROCESS(ListInitiator);
     ListInitiator(const sc_core::sc_module_name& name, DRAMSys::MemoryManager& memoryManager);
 
     struct TestTransactionData

tests/tests_simulator/cache/TargetMemory.h

@@ -46,7 +46,6 @@ class TargetMemory : public sc_core::sc_module
 {
 public:
     tlm_utils::simple_target_socket<TargetMemory> tSocket;
-    SC_HAS_PROCESS(TargetMemory);
     TargetMemory(const sc_core::sc_module_name& name,
                  sc_core::sc_time acceptDelay,
                  sc_core::sc_time memoryLatency,

tests/tests_simulator/cache/tests_cache.cpp

@@ -44,7 +44,10 @@
 class SystemCTest : public testing::Test
 {
 public:
-    ~SystemCTest() override { sc_core::sc_get_curr_simcontext()->reset(); }
+    ~SystemCTest() override { 
+        sc_core::sc_curr_simcontext = new sc_core::sc_simcontext();
+        sc_core::sc_default_global_context = sc_core::sc_curr_simcontext;
+    }
 };
 
 class DirectMappedCache : public SystemCTest

vcpkg.json

@@ -14,11 +14,5 @@
     },
     "systemc"
   ],
-  "overrides": [
-    {
-      "name": "systemc",
-      "version": "2.3.4"
-    }
-  ],
   "builtin-baseline": "ce613c41372b23b1f51333815feb3edd87ef8a8b"
 }