derek/DRAMSys
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tracerecorder, refresh and stuff

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This commit is contained in:
robert
2014-03-29 00:26:21 +01:00
parent 35ba108cf7
commit 04e38d6663
40 changed files with 417 additions and 362 deletions
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20
dram/src/core/ControllerState.cpp
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@@ -46,29 +46,21 @@ void ControllerState::change(const ScheduledCommand& scheduledCommand)
lastCommandsOnBus[scheduledCommand.getCommand()][scheduledCommand.getBank()] = scheduledCommand;
lastCommandsOnBus[scheduledCommand.getCommand()][scheduledCommand.getBank()].invalidateTransaction();
//TODO do in refresh manager
/*if(scheduledCommand.getCommand() == Refresh)
{
for(unsigned int i = 0; i < bankStates.getNumberOfBanks(); ++i)
{
lastCommandsOnBus[scheduledCommand.getCommand()][Bank(i)] = scheduledCommand;
}
}*/
switch (scheduledCommand.getCommand())
{
case Refresh:
case Command::AutoRefresh:
bankStates.closeRowBuffer(scheduledCommand.getBank());
break;
case Activate:
case Command::Activate:
bankStates.openRowInRowBuffer(scheduledCommand.getBank(), scheduledCommand.getRow());
nActivateWindow.put(scheduledCommand.getStart());
break;
case Precharge:
case Command::Precharge:
bankStates.closeRowBuffer(scheduledCommand.getBank());
break;
case Command::PrechargeAll:
bankStates.closeAllRowBuffers();
break;
default:
break;
}