\DeclareAcronym{pim}{
    short = PIM,
    long = processing-in-memory,
}
\DeclareAcronym{dnn}{
    short = DNN,
    long = deep neural network,
}
\DeclareAcronym{cnn}{
    short = CNN,
    long = convolutional neural network,
}
\DeclareAcronym{mlp}{
    short = MLP,
    long = multilayer perceptron,
}
\DeclareAcronym{rnn}{
    short = RNN,
    long = recurrent neural network,
}
\DeclareAcronym{blas}{
    short = BLAS,
    long = Basic Linear Algebra Subprograms,
}
\DeclareAcronym{gemv}{
    short = GEMV,
    long = matrix-vector multiplication,
}
\DeclareAcronym{dram}{
    short = DRAM,
    long = Dynamic Random Access Memory,
}
\DeclareAcronym{fimdram}{
    short = PIM-HBM,
    alt = FIMDRAM,
    long = Fun\-ction-In-Memory DRAM,
}
\DeclareAcronym{hbm}{
    short = HBM,
    long = High Bandwidth Memory,
}
\DeclareAcronym{hbm2}{
    short = HBM2,
    long = High Bandwidth Memory 2,
}
\DeclareAcronym{simd}{
    short = SIMD,
    long = single-instruction multiple-data,
}
\DeclareAcronym{pch}{
    short = pCH,
    long = pseudo channel,
}
\DeclareAcronym{fpu}{
    short = FPU,
    long = floating-point unit,
}
% \DeclareAcronym{fp}{
%     short = FP,
%     long = floating-point,
% }
\DeclareAcronym{crf}{
    short = CRF,
    long = command register file,
}
\DeclareAcronym{grf}{
    short = GRF,
    long = general register file,
}
\DeclareAcronym{srf}{
    short = SRF,
    long = scalar register file,
}
\DeclareAcronym{fp16}{
    short = FP16,
    long = 16-bit floating-point,
}
\DeclareAcronym{ssa}{
    short = SSA,
    long = secondary sense amplifier,
}
\DeclareAcronym{pu}{
    short = PU,
    long = processing unit,
}
\DeclareAcronym{sb}{
    short = SB,
    long = Single-Bank,
}
\DeclareAcronym{ab}{
    short = AB,
    long = All-Bank,
}
\DeclareAcronym{abp}{
    short = AB-PIM,
    long = All-Bank-PIM,
}
\DeclareAcronym{act}{
    short = ACT,
    long = activate,
}
\DeclareAcronym{pre}{
    short = PRE,
    long = precharge,
}
\DeclareAcronym{rd}{
    short = RD,
    long = read,
}
\DeclareAcronym{wr}{
    short = WR,
    long = write,
}
\DeclareAcronym{risc}{
    short = RISC,
    long = reduced instruction set computer,
}
\DeclareAcronym{ld}{
    short = LD,
    long = load,
}
\DeclareAcronym{st}{
    short = ST,
    long = store,
}
\DeclareAcronym{aam}{
    short = AAM,
    long = address aligned mode,
}
% \DeclareAcronym{mac}{
%     short = MAC,
%     long = multiply-accumulate,
% }
\DeclareAcronym{haxpy}{
    short = HAXPY,
    long = half precision $a \cdot x + y$,
}
\DeclareAcronym{relu}{
    short = ReLU,
    long = rectified linear unit,
}
% \DeclareAcronym{gpu}{
%     short = GPU,
%     long = graphics processing unit,
% }
% \DeclareAcronym{fpga}{
%     short = FPGA,
%     long = field-programmable gate array,
% }
\DeclareAcronym{edp}{
    short = EDP,
    long = energy-delay product,
}
\DeclareAcronym{hmc}{
    short = HMC,
    long = Hybrid Memory Cube,
}
\DeclareAcronym{llm}{
    short = LLM,
    long = large language model,
}
\DeclareAcronym{dpu}{
    short = DPU,
    long = DRAM processing unit,
}
% \DeclareAcronym{vp}{
%     short = VP,
%     long = virtual prototype,
% }
