54 lines
1.2 KiB
Rust
54 lines
1.2 KiB
Rust
#![no_std]
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#![no_main]
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extern crate alloc;
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use aarch64_cpu::asm::barrier;
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use alloc::boxed::Box;
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use core::fmt::Write;
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use half::f16;
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use nalgebra::SVector;
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use pim_isa::BankMode;
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use pim_os::{
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kernel::vmul,
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pim::{self, vector::F16x1},
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uart::Uart0,
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};
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const ROWS: usize = 2048;
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#[no_mangle]
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pub extern "C" fn main() {
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pim::state::set_kernel(&vmul::KERNEL);
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let a = Box::new(pim::continuous_array::Vector(
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SVector::<F16x1, ROWS>::from_fn(|_, _| F16x1(f16::from_f32(2 as _))),
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));
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let b = Box::new(pim::continuous_array::Vector(
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SVector::<F16x1, ROWS>::from_fn(|_, _| F16x1(f16::from_f32(3 as _))),
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));
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// writeln!(Uart0, "{}+{}=", a.0, b.0).unwrap();
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let mut c = Box::new(pim::continuous_array::Vector(
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SVector::<F16x1, ROWS>::zeros(),
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));
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let dummy = Box::new(0);
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// Verify everything is correctly initialized before PIM operation
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barrier::dsb(barrier::SY);
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// Execute kernel
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{
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pim::state::set_bank_mode(BankMode::PimAllBank);
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vmul::execute(&a.0, &b.0, &mut c.0, dummy.as_ref());
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pim::state::set_bank_mode(BankMode::SingleBank);
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}
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// writeln!(Uart0, "{}", c.0).unwrap();
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writeln!(Uart0, "Done").unwrap();
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}
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