From dfa773b8396ea56aaa31d7236add24dabb0a99e2 Mon Sep 17 00:00:00 2001 From: Derek Christ Date: Tue, 26 Dec 2023 13:03:33 +0100 Subject: [PATCH] Fix unwanted cache evictions during PIM operation --- pim-os/src/pim/array.rs | 48 ++++++++++++++------------------- pim-os/src/pim/kernel.rs | 57 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+), 29 deletions(-) diff --git a/pim-os/src/pim/array.rs b/pim-os/src/pim/array.rs index 06555ca..e45663e 100644 --- a/pim-os/src/pim/array.rs +++ b/pim-os/src/pim/array.rs @@ -80,31 +80,31 @@ pub trait PimRegion { fn bank_ptr_mut(&mut self, bank_index: usize) -> *mut f16; fn execute_instruction_read_single_bank(&self) { - for i in (0..Self::OCCUPIED_ROWS).map(|i| i * NUMBER_OF_BANKS) { + for i in 0..Self::OCCUPIED_ROWS { if !cfg!(feature = "cacheless") { - self.invalidate_bank(EVEN_BANK_INDEX + i); + self.invalidate_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } // Read from first bank - self.read_data_bank(EVEN_BANK_INDEX + i); + self.read_data_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } } fn execute_instruction_read_dual_bank(&self) { - for i in (0..Self::OCCUPIED_ROWS).map(|i| i * NUMBER_OF_BANKS) { + for i in 0..Self::OCCUPIED_ROWS { if !cfg!(feature = "cacheless") { - self.invalidate_bank(EVEN_BANK_INDEX + i); - self.invalidate_bank(ODD_BANK_INDEX + i); + self.invalidate_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); + self.invalidate_bank(ODD_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } // Read from first and second bank - self.read_data_bank(EVEN_BANK_INDEX + i); - self.read_data_bank(ODD_BANK_INDEX + i); + self.read_data_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); + self.read_data_bank(ODD_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } @@ -112,28 +112,23 @@ pub trait PimRegion { fn read_data_bank(&self, bank_index: usize) { let bank = self.bank_ptr(bank_index); - - // For some reason, this is needed... - use core::fmt::Write; - write!(&mut crate::uart::Uart0 {}, "").unwrap(); - unsafe { core::ptr::read_volatile(bank); } } fn execute_instruction_write_single_bank(&mut self) { - for i in (0..Self::OCCUPIED_ROWS).map(|i| i * NUMBER_OF_BANKS) { + for i in 0..Self::OCCUPIED_ROWS { if !cfg!(feature = "cacheless") { - self.preload_zero_bank(EVEN_BANK_INDEX + i); + self.preload_zero_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } // Write to first bank - self.write_data_bank(EVEN_BANK_INDEX + i); + self.write_data_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); if !cfg!(feature = "cacheless") { - self.invalidate_flush_bank(EVEN_BANK_INDEX + i); + self.invalidate_flush_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); } barrier::dsb(barrier::SY); @@ -141,20 +136,20 @@ pub trait PimRegion { } fn execute_instruction_write_dual_bank(&mut self) { - for i in (0..Self::OCCUPIED_ROWS).map(|i| i * NUMBER_OF_BANKS) { + for i in 0..Self::OCCUPIED_ROWS { if !cfg!(feature = "cacheless") { - self.preload_zero_bank(EVEN_BANK_INDEX + i); - self.preload_zero_bank(ODD_BANK_INDEX + i); + self.preload_zero_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); + self.preload_zero_bank(ODD_BANK_INDEX + i * NUMBER_OF_BANKS); barrier::dsb(barrier::SY); } // Write to first and second bank - self.write_data_bank(EVEN_BANK_INDEX + i); - self.write_data_bank(ODD_BANK_INDEX + i); + self.write_data_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); + self.write_data_bank(ODD_BANK_INDEX + i * NUMBER_OF_BANKS); if !cfg!(feature = "cacheless") { - self.invalidate_flush_bank(EVEN_BANK_INDEX + i); - self.invalidate_flush_bank(ODD_BANK_INDEX + i); + self.invalidate_flush_bank(EVEN_BANK_INDEX + i * NUMBER_OF_BANKS); + self.invalidate_flush_bank(ODD_BANK_INDEX + i * NUMBER_OF_BANKS); } barrier::dsb(barrier::SY); @@ -163,11 +158,6 @@ pub trait PimRegion { fn write_data_bank(&mut self, bank_index: usize) { let bank = self.bank_ptr_mut(bank_index); - - // For some reason, this is needed... - use core::fmt::Write; - write!(&mut crate::uart::Uart0 {}, "").unwrap(); - unsafe { core::ptr::write_volatile(bank, Default::default()); } diff --git a/pim-os/src/pim/kernel.rs b/pim-os/src/pim/kernel.rs index e770ea6..344565a 100644 --- a/pim-os/src/pim/kernel.rs +++ b/pim-os/src/pim/kernel.rs @@ -100,3 +100,60 @@ pub const TEST_KERNEL: Kernel = Kernel([ Instruction::NOP, Instruction::NOP, ]); + +// pub const TEST_KERNEL: Kernel = Kernel([ +// Instruction::MOV { +// src: File::Bank, +// dst: File::GrfA { index: 0 }, +// }, +// Instruction::MOV { +// src: File::Bank, +// dst: File::GrfA { index: 1 }, +// }, +// Instruction::ADD { +// src0: File::Bank, +// src1: File::GrfA { index: 0 }, +// dst: File::GrfA { index: 0 }, +// aam: false, +// }, +// Instruction::ADD { +// src0: File::Bank, +// src1: File::GrfA { index: 1 }, +// dst: File::GrfA { index: 1 }, +// aam: false, +// }, +// Instruction::FILL { +// src: File::GrfA { index: 0 }, +// dst: File::Bank, +// }, +// Instruction::FILL { +// src: File::GrfA { index: 1 }, +// dst: File::Bank, +// }, +// Instruction::EXIT, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// Instruction::NOP, +// ]);